Download 20 " LCD TV

TV
SERVICE MANUAL
DOCUMENTATION TECHNIQUE
TECHNISCHE DOKUMENTATION
DOCUMENTAZIONE TECNICA
DOCUMENTACION TECNICA
WARNING :
ATTENTION :
ACHTUNG :
ATTENZIONE :
IMPORTANTE :
LCD03B
Before servicing this chassis please read the safety recommendations.
Avant toute intervention sur ce châssis, lire les recommandations de sécurité.
Vor jedem Eingriff auf diesem Chassis, die Sicherheitsvorschriften lesen.
Prima di intervenire sullo chassis, leggere le norme di sicurezza.
Antes de cualquier intervención, leer las recomendaciones de seguridad.
Code :357 510 10 - 0304 / 6M -LCDB03B Print.
No copying, translation, modification on other use authorized. All rights reserved worldwide. • Tous droits de reproduction, de traduction, d'adaptation et d'exécution réservés pour tous les pays. • Sämtliche Urheberrechte an diesen Texten und Zeichnungen stehen uns zu. Nachdrucke,
Vervielfältigungen - auch auszugsweise - nur mit unserer vorherigen Zustimmung zulässig. Alle Rechte vorbehalten. • I diritti di riproduzione, di traduzione, e esecuzione sono riservati per tutti i paesi. • Derechos de reproduccion, de traduccion, de adaptacion y de ejecucion reservados para todos los paises.
LIST OF ABBREVIATIONS - LISTE DES ABREVIATIONS - ABKÜRZUNGEN
LISTA DELLE ABBREVIAZIONI - LISTA DE ABREVIACIONES
Do not disconnect modules when they are energized!
Repairs on power supply section are to be carried out only with isolating transformer.
Ne pas retirer les modules lorsqu' ils sont sous tension. N'effectuer les travaux de maintenance sur la partie reliée
au secteur (Switch Mode) qu'au travers d'un transformateur d'isolement.
● AQR_ON
Module nicht bei eingeschaltetem Gerät entfernen!
Servicearbeiten am Netzteil nur unter Verwendung eines Regeltrenntrafos durchführen.
DISABLE AQUISITION MODE REGUL.
● IR
INFRARED RECEIVER
ENABLE PWM PULSE
● LED
LED DISPLAY
Non scollegare le piastre quando sono alimentate!
Per le riparazioni sulla sezione alimentatore, utilizzare un trasformatore isolatore.
● AUDIO_MUTE
MUTES AUDIO AMPLFIERS
● LFBH
LOW FEEDBACK BLUE HORIZONTAL
● AV1_8
PIN_8 DETECTOR
● LFBV
LOW FEEDBACK BLUE VERTICAL
No desconectar los módulos cuando están activados. Las reparaciones en la sección de alimentación de energía
deben ser ejecutadas solamente con un transformador de separación.
● AV_LINK
AV_LINK DATAS VCR/TV
● LFGV
LOW FEEDBACK GREEN VERTICAL
● AV_R_ OUT
AUDIO RIGHT-OUT
● LFGH
LOW FEEDBACK GREEN HORIZONTAL
● AV_L_ OUT
AUDIO LEFT-OUT
● LFRV
LOW FEEDBACK RED VERTICAL
● AV_R_ IN
AUDIO RIGHT-IN
● LFRH
LOW FEEDBACK RED HORIZONTAL
● AV_L_ IN
AUDIO LEFT-IN
● M_RES#
MAIN RESET SIGNAL
● AV_B
BLUE SIGNAL FROM AV
● NMI
NON MASKABLE INTERRUPT
● AV_G
GREEN SIGNAL FROM AV
● PHI2_REF
PHI2 REFERENCE SIGNAL
Indicates critical safety components, and identical components should be used for replacement. Only then can the
operational safety be garanteed.
Le remplacement des éléments de sécurité (repérés avec le symbole
) par des composants non homologués selon la
Norme CEI 65 entraine la non-conformité de l'appareil. Dans ce cas, la responsabilité du fabricant n'est plus engagée.
Wenn Sicherheitsteile (mit dem Symbol
Haftung des Herstellers.
gekennzeichnet) nicht durch Original - Ersatzteile ersetzt werden, erlischt die
● AV_R
RED SIGNAL FROM AV
● PKS
PEAK SENSING
La sostituzione dei componenti di sicurezza (evidenziati con il segno
) con componenti non omologati secondo la
norma CEI 65 comporta la non conformitá dell'apparecchio. In tal caso è "esclusa la responsabilità " del costruttore.
● AV_C_ IN
CHROMA-IN
● PO
POWER ON
● AV_FB
FAST BLANK SIGNAL FROM AV SCART
● PWM
PULSE WIDTH MODULATION
La sustitución de elementos de seguridad (marcados con el simbolo
) por componentes no homologados segun la
norma CEI 65, provoca la no conformidad del aparato. En ese caso, el fabricante cesa de ser responsable.
● AV_Y_ IN
VIDEO-IN
● RESET
RESET TO MICROPROCESSOR
● BEAM_INFO
BEAM CURRENT INFORMATION
● RF_CVBS
DEMODULATED TERRESTRIAL TUNER SIGNAL
● BH
BLUE HORIZONTAL DRIVE
● ROTATION
OUTPUT OF EARTH FIELD CORRECTION STAGE
● BV
BLUE VERTICAL DRIVE
● R_OUT
RED SIGNAL TO VIDEO AMPLIFIER
● BLKCURR
CUT OFF CURRENT
● R_TXT
RED SIGNAL OUTPUT (TEXT)
● B_TXT
BLUE SIGNAL OUTPUT (TEXT)
● RH
RED HORIZONTAL DRIVE
● B_OUT
BLUE SIGNAL TO VIDEO AMPLIFIER
● RV
RED VERTICAL DRIVE
● BREATHING
COMPENSATE BREATHING PICTURE SIGNAL
● SIF
SOUND IF OUTPUT
● BSVM
BEAM SCAN VELOCITY MODULATION
● SSC_V_GUARD SAFETY DATA GENERATED BY THE
● CMP
COMPONENT INPUT SIGNALS
● CNT1_20V
SAFETY SIGNAL TO INSURE A GOOD CONNECTION
● TUBE DETECTION INFORMATION FOR TUBE FORMAT
BETWEEN SIGNAL BOARD AND POWER BOARD
● +USYS
SYSTEM VOLTAGE
(BV001- BL111)
● +/- UA
SOUND VOLTAGE
SAFETY SIGNAL TO INSURE A GOOD CONNECTION
● +UVERT
POSITIVE SUPPLY VERTICAL VOLTAGE
BETWEEN SIGNAL BOARD AND POWER BOARD
● -UVERT
NEGATIVE SUPPLY VERTICAL VOLTAGE
(BP500- BP005)
● +UVFB
POSITIVE SUPPLY VOLTAGE FOR
MEASUREMENT CONDITIONS - CONDITIONS DE MESURES - MESSBEDINGUNGEN
CONDIZIONI DI MISURA - CONDICIONES DE MEDIDAS
RECEIVER :
On UHF,input level : 1 mV, bar test pattern :
- PAL, I standard, 100% white.
RECEPTEUR :
En UHF, niveau d'entrée 1 mV mire de barres
- SECAM, Norm L, Blanc 100%.
EMPFÄNGER :
Bei UHF Eingangspegel 1 mV, Farbbalken :
- PAL, Norm G, Weiss 100%.
Via the scart socket, input level : 1 Vpp, bar test pattern :
Par la prise Péritélévision, niveau d'entrée 1 Vcc, mire de barres .
Über die Scartbuchse : Eingangspegel 1 Vss, Farbbalken :
Colour, contrast and brightness at mid-position, sound at minimum.
Programme selected : PR 01.
Couleur, contraste, lumière à mi-course, son minimum.
Programme affecté PR 01.
Farbe, Kontrast, Helligkeit in der Mitte des Bereichs, Ton auf Minimum.
Zugeordnetes Programm PR 01.
DC voltages measured between the point and earth using a digital
voltmeter.
Tensions continues relevées par rapport à la masse avec un
voltmètre numérique.
Gleichspannungen mit einem digitalen Voltmeter zur Masse gemessen.
RICEVITORE :
In UHF, livello d'entrata 1 mV, monoscopio barre :
- PAL, norma G. bianco 100%.
RECEPTOR :
En UHF, nivel de entrada 1 mV, mira de barras :
- PAL, norma G, blanco 100%.
Via SCART, livello d'entrata 1 Vpp, monoscopio barre :
Por la toma Peritelevision, nivel de entrada 1 Vpp mira de barra.
Colore, Contrasto, Luminositá media, Suono minimo.
Programma selezionato PR 01.
Color, Contraste, luz a mitad de carrera, Sonido minimo.
Programa afectado PR 01.
Tensioni continue rilevate rispetto alla massa con un voltmetro digitale.
Tensiones continuas marcadas en relacion a la masa con un voltimetro digital.
ENGLISH
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
NOTE :
MAIN ... etc. identifies each
pcb module.
NOTE :
MAIN ... etc. repères des
platines constituant l'appareil.
HINWEIS :
MAIN ... usw. Kennzeichnung
der Platinen, aus denen das
Gerät zusammengesetzt ist.
NOTA :
MAIN ... ecc. sigla delle
piastre dell' apparecchio.
NOTA :
MAIN ... etc. marcas de las
placas que constituyen el
aparato.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
: INPUT - ENTRÉE - EINGANG - ENTRATA - ENTRADA •
FRANÇAIS
DEUTSCH
● CNT2_20V
ITALIANO
ESPAÑOL
AUDIO "R"
AUDIO "D"
AUDIO "R"
AUDIO "D"
AUDIO "D"
AUDIO "R"
AUDIO "D"
AUDIO "R"
AUDIO "D"
AUDIO "D"
AUDIO "L"
AUDIO "G"
AUDIO "L"
AUDIO "S"
AUDIO "I"
AUDIO
AUDIO
AUDIO
AUDIO
AUDIO
"BLUE"
"BLEU"
"BLAU"
"BLU"
"AZUL"
AUDIO "L" MONO
AUDIO "G" MONO
AUDIO "L" MONO
AUDIO "S" MONO
AUDIO "I" MONO
"BLUE"
"BLEU"
"BLAU"
BLU
AZUL
SLOW SWITCH
COMMUT. LENTE
AV
UMSCHALTUNG
"COMMUTAZIONE
LENTA"
"CONMUTACION
LENTA"
VERTICAL AMPLIFIER TDA8177F
● CRT
CATHODE RAY TUBE
● CVBS
VIDEO
● +UVIDEO
VIDEO VOLTAGE FOR THE CRT BOARD
● CVBS_TXT
TEXT VIDEO
● U_OUT
U TO VIDEO PART
● DEFMOD
MODULATION VOLTAGE GENERATED ON DFB
● V_OUT
V TO VIDEO PART
MODULE
● Y_OUT
Y TO VIDEO PART
● DEGAUSS
DEGAUSS SIGNAL
● +UVFB
POSITIVE SUPPLY VOLTAGE FOR VERTICAL
● DPC
DYNAMIC PHASE COMPENSATION SIGNAL
● EFC
EARTH FIELD CORRECTION
● EHT
EXTREMELY HIGH TENSION
● EHT INFO
HORIZONTAL DEFLECTION PROTECTION
● E.W_DRIVE
EAST - WEST DRIVE SIGNAL
VERTICAL POWER STAGE
POWER STAGE
● 1V8_UC
SUPPLIES 1V81H / 1V82H POWER SUPPLY
UP CONVERTER PART OF SIGNAL BOARD
● 3V3_UC
3V3 POWER SUPLY UP CONVERTER PART
OF SIGNAL BOARD
"GREEN"
"VERT"
"GRÜN"
"VERDE"
"VERDE"
AV LINK
AV LINK
AV LINK
AV LINK
AV LINK
● EW_PROT
SAFETY SIGNAL FROM DIODE MODULATOR
● 5 V_A / 5V_V
"VERDE"
● FB DETEC
FAST BLANKING DETECT
● 5V_STBYL / 5V_RP MICROPROCESSOR SUPPLY VOLTAGE
● FB_TXT
FAST BLANKING (TEXT)
● 5V_STBY
5V STANDBY
● FW ADJ.
FULL WHITE ADJUSTMENT
● 6V
SUPPLIES THE 5V REGULATION AND 3V3 AND
● G_OUT
GREEN SIGNAL TO VIDEO AMPLIFIER
● G_TXT
GREEN SIGNAL OUTPUT (TEXT)
"GREEN"
"VERT"
"GRÜN"
"VERDE"
NC
"RED"
"ROUGE"
"ROSSO"
"ROT"
"ROJA"
NC
"RED"
"ROUGE"
5V POWER SUPPLY SIGNAL BOARD
1V8 REGULATORS ON THE SIGNAL BOARD.
● 10 V
SUPPLIES THE 8V_V REGULATORS ON SIGNAL
"ROT"
"ROSSO"
"ROJA"
"CONMUTACION
RAPIDA"
● GH
GREEN HORIZONTAL DRIVE
● GV
GREEN VERTICAL DRIVE
● 8V
8V SUPPLY SIGNAL BOARD
FAST SWITCH
COMMUT. RAPIDE
AUSTASTUNG
"COMMUTAZIONE
RAPIDA"
VIDEO
VIDEO
VIDEO
VIDEO
VIDEO
FAST SWITCH
COMMUT. RAPIDE
AUSTASTUNG
"COMMUTAZIONE
RAPIDA"
"CONMUTACION
RAPIDA"
● H_DRIVE
DRIVE SIGNAL FOR HORIZONTAL DEFLECTION
● 7V_STBY
7V STANDBY
VIDEO
VIDEO
VIDEO
VIDEO
VIDEO
● HEATER
HEATER OUTPUT FROM THE DST TO CRT
● 33V
SUPPLY VOLTAGE TUNER
VIDEO OR "SYNC"
VIDEO SYNCHRO
VIDEO O SINCRO
VIDEO O SINCRO
● IIC-CL-1
I2C CLOCK BUS 1
● 20V
SUPPLY VOLTAGE HORIZONTAL DRIVER
PLUG SCREEN
BOX
BLINDAGE PRISE
VIDEO ODER
SYNCHRO
ABSCHIRMUNG
DES STECKERS
INVOLUCRO METALLICO DELLA PRESA
BLINDAJE
DEL ENCHUFE
● IIC-CL-2
I2C CLOCK BUS 2
: OUTPUT - SORTIE - AUSGANG - USCITA - SALIDA •
: EARTH - MASSE - MASSE - MASSA - MASA
● INF_POW_FAIL POWER FAIL INFORMATION
BOARD
AND BSVM CRT
INFORMATION - INFORMATIONS - INFORMATIONEN
INFORMAZIONE - INFORMACIONES
EN
Chassis group table
1 - The electronic chassis configuration (modules) and schematic diagram page numbers.
2 - The chassis configuration.
FR
Le tableau ci-dessous regroupe :
1 - L’environnement électronique de chaque chassis (modules) et le numéro de page où il est décrit.
2 - La désignation des chassis
DE
Die nachstehendeTabelle umfaßt:
1 - Die elektronischen Baugruppen (Module) der Chassis varianten und die Seiten auf der sie beschrieben werden
2 - Die Chassisbezeichnung
IT
La tabella qui di seguito contiene:
1 - l’ambiente elettronico di ogni telaio (moduli) e il numero di pagina nella quale è descritto.
2 - La descrizione dei telai
ES
El cuadro siguiente agrupa:
1 - El entorno electrónico de cada chasis (módulos) y el número de página donde está descrito.
2 - La designación de los chasis
Chassis LCD03B
Reference
15LCDM03B
20LCDM03B
20LCDB03B
Information
Desassembly.
-
Service
Mode
FCB
-
KDB
-
Inverter
DC/DC
--
Audio
Board
Earphone
Board
Main
Video
3
3
3
6to7
6to7
8to9
10to15
10to15
10to15
“
“
“
16to18
16to18
16to18
23to24
23to24
-
19to20
21to22
21to22
25
25
25
26
26
26
27to41
27to41
27to41
42to58
42to58
42to58
LCD03B
First issue 04 / 04
3
BLOCK DIAGRAM - SCHEMA SYNOPTIQUE - BLOCKSCHALTBILD - SCHEMA A BLOCCHI - ESQUEMA DE BLOQUES
15" ,20"
System Block Diagram (EU version)
2
pin
8
pin
PFC/DC+DC/Audio Board
LCD Panel
Control
Board
12 pin
8
pin
Inverter
50 pin*
40 pin**
2
pin
30 pin**
Power
Connector
20 pin
12 pin
50 pin*
40 pin**
20" model only*
30 pin**
20 pin
15" model only**
Keypad/IR Interface
DDC
Tuner
AD
AD9883
Audio Processor
TDA7440D
Scaller
PW113
Flash
AT49BV8192A
Tuner Module
EEPROM
14 pin
Main Board
60 pin golden finger
D-Sub
Audio Input
Audio Line Out
De-Interlace
Chipset
PW1230
Video
Decoder
VPC3230D
60 pin
Video Board
14 pin
Teltext
SDA555XFL
SCART
S-Video
LCD03B
First issue 10 / 03
Composite
Video
L/R Audio
Input
BLOCK DIAGRAM - SCHEMA SYNOPTIQUE - BLOCKSCHALTBILD - SCHEMA A BLOCCHI - ESQUEMA DE BLOQUES
20" BI
5
pin
20"BiSonic System Bolck
Diagram(EU version)
Inverter
10
pin
10
pin
IR
Board
8
pin
8
pin
5
pin
Keypad Board
EarPhone Jack
2
pin
PFC/DC+DC/Audio Board
2
pin
LCD Panel
12 pin
50 pin
20 pin
12 pin
50 pin
20 pin
Pow er
Connector
Keypad/IR Interface
Main Board
DD C
AD
AD9883
Tuner
Audio Processor
MSP3412G
Scaller
PW113
Flash
AT49BV8192A
Tuner Module
EEPROM
14 pin
80 pin golden finger
D-Sub
Audio Input
Audio Line Out
De-Interlace
Chipset
PW1230
SCART
Video
Decoder
VPC3230D
80 pin
Video Board
14 pin
Teltext
SDA555XFL
S-Video
Composit e L/R Audio
Video
Input
LCD03B
First issue 10 / 03
Disassembly
process
15LCDM03B
Page N°1
15 " LCD TV
Revision 1.0
Page N°2
15 " LCD TV
Revision 1.0
Page N°3
15 " LCD TV
Revision 1.0
Page N°4
15 " LCD TV
PC board
Power board
Slider to extract
The AV module
AV module :
video and tuner boards
Revision 1.0
Page N°5
15 " LCD TV
Revision 1.0
Page N°6
15 " LCD TV
Revision 1.0
Page N°7
15 " LCD TV
Revision 1.0
Page N°8
15 " LCD TV
Revision 1.0
Page N°9
15 " LCD TV
Revision 1.0
Page N°10
15 " LCD TV
Revision 1.0
Page N°11
15 " LCD TV
Revision 1.0
Page N°12
Disassembly
process
20LCDM03B
Page N°1
20 " LCD TV
Revision 1.0
Page N°2
20 " LCD TV
Revision 1.0
Page N°3
20 " LCD TV
Revision 1.0
Page N°4
20 " LCD TV
Boards overview
PC board
Power board
Inverter board
Earphone board
Power board
Control board
Revision 1.0
Page N°5
AV module
20 " LCD TV
Revision 1.0
Page N°6
20 " LCD TV
Revision 1.0
Page N°7
20 " LCD TV
AV module
Revision 1.0
Page N°8
20 " LCD TV
Revision 1.0
Page N°9
20 " LCD TV
Revision 1.0
Page N°10
20 " LCD TV
Revision 1.0
Page N°11
20 " LCD TV
Revision 1.0
Page N°12
20 " LCD TV
Revision 1.0
Page N°13
SERVICE MODE - MODE SERVICE - SERVICE-MODE - MODO SERVICIO
Overview
EN
Service Mode Operation Manual
Sound
Model support: 15” 20” and 20” bi-sonic
Picture
Service Mode
1. Press the “menu” button, and then the screen display will
appear “Overview” OSD, below as Figure Overview OSD.
Then press the “info” button and ”1”, ”0”and ”3” buttons
step by step to enter Service Mode. And Figure
Service mode will appear on the screen display.
Preferences
Installation
Figure Overview OSD
IT
FR
Manuale Procedura Service Mode
Mode Service
1.Presser la touche “Menu” l’ecran de selection ci-dessus apparait
Prenez la touche “Info”, la touche “1” puis les touches “0” et “3” pour
acceder au “Mode Service”
Modelli: 15” 20” e 20” bi-colonna
Service Mode
1. Premere il tasto “menu” per far visualizzare il menu “Sommario”,
vedi pagina OSD.
Poi premere sequenzialmente i tasti “info” , “1”, “0” e “3” per entrare in
Service mode. Il menu di Service mode verrà visualizzata sullo schermo.
Per cambiare pagina premere il tasto “Menu”.
Menu Sommario
DE
ES
Manual de operación del Modo Servicio
Anleitung Service Mode
Para modelos de : 15”, 20” y 20” bi-columna
Modo Servicio
1. Pulsar la tecla “menú”, en la pantalla se mostrará
el menú “OVERVIEW (ÍNDICE)”, como se muestra en
la figura MENU OVERVIEW (ÍNDICE).
A continuación, pulsar las teclas “info”, ”1”, ”0” y ”3” una tras otra
para entrar en Modo Servicio y se mostrará
la primera página del Modo Servicio en la pantalla.
Für Modelle: 15“, 20“ und 20“ bi-sonic
Service Mode
1. Drücken sie die „MENU“ – Taste. Es erscheint das „Übersicht“
–Menü (siehe Abbildung 1). Drücken sie dann nacheinander die Tasten
„INFO“, „1“, „0“, und „3“. Die erste Seite des Service-Modes wird
angezeigt (siehe Abbildung 2).
NAVIGATION INSIDE THE SERVICE MODE - DEPLACEMENT DANS LE MODE SERVICE
SUCHE IN SERVICE MODE - OPZIONI NEL SERVICE MODE - BUSQUEDA EN MODO SERVICIO
REMOTE CONTROL - TELECOMMANDE - FERNBEDIENUNG
TELECOMANDO - MANDO A DISTANCIA
Changing page - Changement de page
Seitenwechsel - Cambiare Pagina - Cambio de página
- Press "Menu" button
- Appuyer sur la touche "Menu"
- Taste "Menu"
- Premere " Menu"
- Pulse "Menu"
Choosing a setting from the menu / setting e value
Choix d'un réglage dans un menu / Réglage d'une valeur
Wahl einer einstellung in einem menü / Einstellung eines wertes
Scegliere una Regolazione dal Menu / Selezione di un valore
Eleccion de un Ajuste en un menu / Ajuste de un valor
Color temp
P-W
P-N
P-C
V-N
Green Drive
-
+ - 123 -
Blue Drive
-
+ - 123 -
Green Offset
➠
+ - 123 -
Blue Offset
P-W
P-C
V-N
V-C
-
+ - 123 -
Green Drive
-
+ - 123 -
Blue Drive
-
+ - 123 -
Red Offset
-
+ - 123 -
-
+ - 123 -
-
+ - 123 -
Blue Offset
190247
Reset To Default
Reset To Default
P-N
Red Drive
➠
-
Red Offset
Color temp
V-C
Red Drive
Green Offset
-
+ - 123 -
-
+ - 123 + - 123 -
-
190247
Calibration...
Tuner 1D
Eu 20L0BI
Calibration...
Tuner 1D
Eu 20L0BI
Auto Turn on
on
Ver 09171I
Auto Turn on
on
Ver 09171I
off
Naviagation up
- “Change“ value
- Réglage de la valeur
- Wert “änden“
- “Cambiare“ valore
- “Cambiar“ valor
off
Naviagation down
>
VALUE
<
VALUE
LCD03B
10
First issue 04 / 04
Color temp
P-W
P-N
P-C
V-N
V-C
Red Drive
-
+ - 123 -
Green Drive
-
+ - 123 -
Blue Drive
-
+ - 123 -
Red Offset
-
+ - 123 -
Green Offset
-
+ - 123 -
Blue Offset
-
+ - 123 190247
Reset To Default
Calibration...
Tuner 1D
Eu 20L0BI
Auto Turn on
on
Ver 09171I
off
Page1 on service mode
EN
1. Color Temp: P-N means “Normal” on YpbPr, V-N means “Normal” on
Video mode. Each item decide different gamma curve.
2. Red drive, Green drive and blue drive means gamma RGB gain.
Control by scaler
3. Red offset, Green offset and blue offset means gamma RGB offset.
Control by scaler
4. Reset To Default: press OK will load all default value on User OSD
5. Calibration: press this botton guide to calibrate A/D converter white
and black level on PC input. Also guide to calibrate A/D converter PbPr
offset on YpbPr input
6. Auto Turn On: toggle on/off control auto turn on . this function for
factory burn-in sets . Only active on selection PC input then main power
off.
7. Green lable: Tuner s/w version, time while compiling s/w, model
name, main s/w version.
FR
1. Color Temp: Temperature des couleurs.
P-N correspond à un reglage “Normal” /YpPr
V-N correspond à un reglage “normal” / mode vidéo
chaque item permet de règler la courbe de gamma.
2. Red drive, Green drive and blue drive: green drive et Bleu drive
correspond aux reglages de gain
du gamma RVB ( controlé par le scaler).
3. Red offset, green offset et blue offset: correspond aux réglage
d’offset du gamma RVB ( controlé par le scaler ).
4. Reset To Default: Appuyer sur “OK”.
Charger les valeurs par defaut sur le menu OSD.
5. Calibration: Appuyer sur “OK” pour valider.
Etalonne les niveaux blanc et noir du convertisseur A/D de l’ entrée PC
Etalonne egalement les offset Pb/Pr du convertisseur A/D sur l’ entrée
Ypb Pr
6. Auto Turn On: Option On/OFF valide le reglage usine,
le démarrage automatique. Seulement active sur l’entrée PC.
7. Green lable Indication dans les fenêtres vertes: Version software
tuner, temps de compilation software , nom du modele, version, version
du software principal.
DE
Seite 1 des Service-Modes
1. Color Temp: P-W steht für „Warm im YPbPr-Mode, P-N steht für
„Neutral“ bei YPbPr-Mode, P-C steht für „Kalt“ im YPbPr,-Mode, V-W
steht für „Warm“ im Video-Mode, V-N steht für „Neutral“ im Video-Mode,
V-C steht für „Kalt“ im Video-Mode. Alle Modi haben unterschiedliche
Gamma-Kennlinien.
2. Red Drive, Green Drive und Blue Drive: Einstellung der RGBVerstärkung
3. Red Offset, Green Offset und Blue Offset: Einstellung des RGBOffsets
4. Reset to Default: Durch Drücken der “OK”-Taste werden die
Benutzerdaten gelöscht und die Defaultwerte geladen.
5. Calibration: Kalibrieren der Schwarz- und Weißpegel des ADWandlers des PC-Eingangs
6. Auto Turn On: Aktivierung des automatischen Einschalten des
Gerätes über den PC-Eingang. (nur für den Burn-In in der Farbrik
vorgesehen).
7. Grün markierte Felder: Software-Version Tuner, Compiler-Daten,
interne Modellbezeichnung, Version der Hauptsoftware.
LCD03B
First issue 04 / 04
IT
1. Color Temp: P-N significa “Normale” in funzione YPbPr, V-N significa
“Normale” in funzione Video. Ogni selezione determina una differente
curva di risposta.
2. Red Drive, Green Drive e Blue Drive significa guadagno gamma
RGB. Controllato da una scala.
3. Red Offset, Green Offset e Blue Offset significa Offset gamma RGB.
Controllato da una scala.
4. Reset To Default: premendo OK verranno caricati tutti i valori di
Default nel Menu Utente.
5. Calibration: premere questo tasto guida per calibrare il livello Bianco
/Nero del convertitore A/D dell’ingresso PC. Calibra anche l’offset del
convertitore A/D PbPr dell’ingresso YpbPr.
6. Auto Turn On: Commutatore controllo automatico On/Off. Funzione
utile per le prove di bruciatura in fabbrica. Attivando On si attiva lo
spegnimento automatico in base al segnale di ingresso PC.
7. Caselle in Verde: Versione Software Tuner, Data compilazione
Software, Nome modello, Versione software Main.
ES
1. Color Temp: P-N significa “Normal” en modo YpbPr, V-N significa
“Normal” en modo Video. Cada elemento tiene una curva de gamma
distinta.
2. Red drive, Green drive y Blue drive ajustan la ganancia de la gamma
RGB.
3. Red offset, Green offset y Blue offset ajustan el offset de la gamma
RGB.
4. Reset To Default: Al pulsar OK se cargarán todos los valores por
defecto del menú de usuario
5. Calibration: Pulsando este botón ayuda a calibrar el convertidor A/D
de nivel de blanco y negro
para la entrada de PC. También sirve para calibrar el offset del
convertidor A/D PbPr en la entrada YpbPr
6. Auto Turn On: Selecciona el control del autoencendido. Sólo activo
en la selección de entrada de PC y desconexión de red.
7. Casillas en verde: versión de software del sintonizador, datos de
compilación del s/w, modelo, versión del s/w principal
OSD Position
Factory Save...
Auto Adjustment
Video Int Gain
-
+ - 123 -
Colour
-
+ - 123 -
Tuner Set V-Level
Tuner Get V-Level
Set First INstallation
NotEnabled...
Tuner Set Factory Programs
Exit
Page2 on service mode
EN
8. OSD position: OSD position selection.
9. Factory Save: press OK save all parameters on service mode.
10. Auto Adjustment: auto adjustment new timing(position ,phase…etc).
Only active on PC mode.
11. Video int Gain: this slider bar used to align brightness spec of Video
mode. Larger value bring to brighter. Control by Video decoder VPC3230
12. Colour: adjust color saturation. Same funct ion on User OSD. Control
by Video
decoder VPC3230.
13. Tuner Set V-Level: not used
14. Tuner Get V-Level: not used.
15. Set First Installation: “Enable” means TV will pop-up installation
OSD at next power-on.
16. Tuner Set Factory Programs: not used.
17. EXIT: exit service mode.
FR
8. OSD position: Selection de la position OSD.
9. Factory Save: pressez la touche “OK” pour sauvegarder tous les
parametres du mode service
10.Auto Adjustment: Actif seulement en mode PC. Auto réglage des
nouveaux parametres de temps ( Position, phase..).
11. Video int Gain: Réglage de la lumière en mode vidéo.
Contrôle par le décodeur vidéo VP¨C 3230.
La position élevèe du curseur augmente la lumière.
12. Colour: Régle la saturation de la couleur.
13. Tuner Set V-Level:Pas utilisé.
14. Tuner Get V-Level: Pas utilisé.
15. Set First Installation: Signifie que la TV à la prochaine mise sous
tension affichera le menu d’ installation.
16. Tuner Set Factory Programs: Pas utilisé.
17. EXIT: Sortie du mode Service.
IT
8. OSD position: Selezione posizione OSD.
9. Factory Save: Premere OK per salvare tutti i parametri del service
Mode.
10. Auto Adjustment: Auto regolazione nuove temporizzazioni
( posizione, fase ... etc). Attivo solo in funzione PC.
11. Video int Gain: Regola il livello di luminosità in funzione Video. Più
alto è il valore più l’immagine è luminosa. Controllo tramite il Decoder
Video VPC3230.
12. Colour: Regola la saturazione del colore. Stessa funzione del Menu
utente. Controllo tramite Video Decoder VPC3230.
13. Tuner Set V-Level: Non utilizzato.
14. Tuner Get V-level: Non utilizzato.
15. Set First Installation: “Enable” significa abilitazione, all’accensione,
del menu di prima installazione.
16. Tuner Set factory Programs: Non utilizzato.
17. EXIT: Uscita dal Service Mode.
ES
8. OSD position: Selecciona la posición del OSD.
9. Factory Save: Al pulsar OK, se guardan todos los parámetros del
modo servicio.
10. Auto Adjustment: Autoajuste de nuevo timing (posición, fase…etc).
Sólo activo en modo PC.
11. Video int Gain: Esta barra deslizante se utiliza para ajustar las
especificaciones del brillo en el modo Video. Cuanto mayor sea el valor,
más brillante. Control por el descodificador de Video VPC3230
12. Colour: ajusta la saturación del color. Es la misma función que el
menú de usuario. Control por el descodificador de Video VPC3230.
13. Tuner Set V-Level: no utilizado.
14. Tuner Get V-Level: no utilizado.
15. Set First Installation: “Enable” significa que la próxima vez que se
conecte el TV aparecerá el menú de primera instalación.
16. Tuner Set Factory Programs: no utilizado.
17. EXIT: Salida del Modo Servicio.
DE
Seite 2 des Service-Modes
8. OSD Position: Wahl der Menü-Position auf dem Bildschirm
9. Factory Save: Drücken der „OK“-Taste speichert alle Einstellungen
des Service-Modes ab.
10. Auto Adjustment: Automatischer Abgleich von Timing, Lage, Phase
usw. im PC-Mode
11. Video Int Gain: Helligkeitsvoreinsteller für den Video-Mode.
Steuerung über den Videodecoder VPC3230.
12. Colour: Einstellung der Farbsättigung; gleiche Funktion wie die
Benutzersteuerung. Steuerung über den Videodecoder VPC3230.
13. Tuner Set V-Level: nicht benutzt
14. Tuner Get V-Level: nicht benutzt
15. Set First Installation: „Enable“ lässt beim nächsten Einschalten des
Gerätes nach einer Netztrennung das Installationsmenü erscheinen.
16. Tuner Set Factory Programs: nicht benutzt.
17. Exit: Verlassen des Service-Modes.
LCD03B
First issue 04 / 04
Pw Gamma
Automatic
Scale Mode
VPC AGC ON
VPC AGC OFF
HV Lock Sensitivity -
+ - 123 -
Color Delay
-
+ - 123 -
Audio Gain
-
+ - 123 -
Pb Offset
- NotEnabled...
+ - 123 -
Pr Offset
-
+ - 123 -
Enter PW1230 Adjustment Page...
EN
Page3 on service mode
18. PW Gamma: gamma curve selection. “Automatic” means pick-up
proper gamma curve automatically when user choose Normal, Warm and
Cool. Value change is not recommended.
19. Scale Mode: screen ratio selection.
20. VPC AGC ON: turn on Video decoder “Auto gain control” (analog input
level adjustment.).
21. VPC AGC OFF: turn off Video decoder “Auto gain control”.
22. HV Lock Sensitivity: Tuner HV sync sensitivity. Value change is not
recommended. Fake programme be detected or Real programme be
skipped.
23. Color Delay: Color timing delay which only impact on Video mode. For
development only. Value change is not recommended
24. Audio gain: not used.
25. Pb offset: adjust Pb offset on YpbPr input.
26. Pr offset: adjust Pr offset on YpbPr input.
These 2(25,26) Functions above could be automatically done by
“Calibration” page1.
27. Enter PW1230 Adjustment page: Deinterlacer parameters control. For
development only. Value change is not recommended.
FR
18. PW Gamma: Selection de la courbe de gamma “Automatic”
correspont à l’optention de la courbe de gamma appropriée quand
l’utilisateur choisit la position froide, neutre, chaude ou le rendu des
couleurs est meilleur.
il est deconseillé de sélectionner la position “value Change”.
19. Scale Mode: Selection format d’ecran.
20. VPC AGC ON:Active le Vidéo décodeur. Sélectionnez “ Auto gain
Control” ( réglage du niveau d’entrée analogique ).
21. VPC AGC OFF:Désactive le Vidéo décodeur. Sélectionnez “ Auto
gain Control”.
22. HV Lock Sensitivity: Sensibilité de la Synch. HV tuner.
Il est imperatif de ne pas modifier sa valeur.
Le tuner détectera les mauvais progrmmes ou passera les programmes
corréctes.
23. Color Delay: Réglage du “délai” couleur en mode vidéo.
Réglage usine, ne pas modifier.
24. Audio gain: Non utilisé.
25. Pb offset: Réglage de l’offset Pb sur l’ entrée Ypb Pr.
26. Pr offset: Réglage de l’offset Pr sur l’entée Ypb Pr.
Ces 2 réglages ( 25, 26 ) sont automatiquement effectues par
“calibration” de la page 1 du mode service.
27. Enter PW1230 Adjustment page: Ne pas modifier. Réglage usine
Contrôle les parametres “ Deinterlacer”.
DE
18. PW Gamma: Auswahl der Gamma-Kennlinie: Bei Einstellung
„Automatic“ wird automatisch die jeweilige Kennlinie gewählt, wenn der
Benutzer zwischen Warm, Neutral oder Kalt umschaltet. Eine Änderung
dieser Grundeinstellung ist nicht empfehlenswert.
19. Scale Mode: Wahl des Bildformates
20. VPC AGC ON: Aktiviert die automatische Verstärkungsregelung des
Videodecoders (Anpassung der Pegel der Analogeingänge)
21. VPC AGC OFF: Deaktiviert die automatische Verstärkungsregelung
des Videodecoders.
22. HV Lock Sensitivity: Empfindlichkeit des Synchrondetektors im
Tuner. Eine Änderung dieser Grundeinstellung ist nicht empfehlenswert,
da sonst der Sendersuchlauf falsche Ergebnisse liefern könnte.
23. Color Delay: Einstellung Farbversatz. Eine Änderung dieser
Grundeinstellung ist nicht empfehlenswert.
24 Audio Gain: nicht benutzt
25. Pb Offset: Einstellung des Pb Offsets bei YPbPr.
26. Pr Offset: Einstellung des Pr Offsets bei YPbPr.
Zu 26 und26: Der Abgleich dieser Funktionen kann automatisch mit der
Funktion „Calibration“ auf der Service-Mode Seite 1 durchgeführt werden.
27. Enter PW1230 Adjustment Page: Abgleich der Parameter des
Deinterlacers. Eine Änderung dieser Grundeinstellungen ist nicht
empfehlenswert.
LCDB03B
First issue 04 / 04
IT
18. PW Gamma: Selezione curva gamma. In “Automatic” viene
selezionata automaticamente la curva gamma ideale, in base alla scelta
utente Calda, Fredda o Neutra, nella funzione Tonalità . Si consiglia di
non cambiare valore.
19. Scale Mode: Selezione Rapporto schermo.
20. VPC AGC ON: Attiva, nel Decoder Video, il Controllo automatico del
Guadagno (Regolazione livello ingresso analogico).
21. VPC AGC OFF: Disabilita, nel Decoder Video, il Controllo Automatico
del Guadagno.
22. HV Lock Sensitivity: Sensibilità Sync HV Tuner. Si consiglia di non
cambiare valore. Livello soglia per saltare eventuali emittenti con segnale
debole.
23. Color Delay: Regola il ritardo colore rispetto al segnale video.
Utilizzato per la fabbrica. Si consiglia di non cambiare valore.
24. Audio Gain: Non utilizzato.
25. Pb offset: Regola l’offset Pb sul segnale YpbPr in ingresso.
26. Pr offset: Regola l’offset Pr sul segnale YpbPr in ingresso.
Le regolazioni menzionate nei punti 25 e 26 possono essere eseguite
automaticamente come indicato nella riga “Calibration” di pagina 1.
27. Enter PW Adjustment page: Controllo parametric Deinterlacer.
Utilizzato in fabbrica. Si consiglia di non cambiare valore.
ES
18. PW Gamma: Selección de la curva de gamma. “Automatic” quiere
decir que recuperará automáticamente la curva ideal de gamma cuando
el usuario seleccione Normal, Cálido o Frío. No se recomienda cambiar
este valor.
19. Scale Mode: selecciona la relación de pantalla.
20. VPC AGC ON: activa el "control automático de ganancia" del
descodificador de video (ajuste del nivel de entrada analógica).
21. VPC AGC OFF: desactiva el "control automático de ganancia" del
descodificador de video.
22. HV Lock Sensitivity: Sensibilidad de los sincronismos HV del
sintonizador para la búsqueda de emisoras. No se aconseja cambiar este
valor. Los canales reales pueden ser ignorados o los falsos
memorizados.
23. Color Delay: Retardo del color en modo Video. No se recomienda
cambiar este valor
24. Audio gain: no utilizado.
25. Pb offset: ajuste del offset de Pb en la entrada YpbPr.
26. Pr offset: ajuste del offset de Pr en la entrada YpbPr.
Estas 2 funciones anteriores (25,26) serán hechas automáticamente en
“Calibration” de la página 1.
27. Enter PW1230 Adjustment page: control de los parámetros de
Deinterlacer. No se recomienda cambiar este valor.
36. V. Position: ajusta la posición Vertical sobre la entrada PC.
Video Format
NTSC-M
Scale Mode
RGB Filter
Video Filter
Monitor Sync
On
Off
Reset All Nvram
Test Pattern
- NotEnabled...
+ - 123 -
H.position
-
+ - 123 -
V.position
Page4 on service mode
EN
28. Video Format: select Video standard. Force to “Auto”.
29. Default Language: set default language. Same function on User
OSD.
30. RGB filter: sharpness filter of PC port of scaler. Impact on PC and
YpbPr input
31. Video filter: sharpness filter of Video of scaler. Impact on TV Video
and YcbCr.
32. Monitor Sync: force to “On”. So that Video format can auto
detection.
33. Reset All Nvram: press “OK” will reset all parameters on service
mode, including color temp settings, brightness setting….etc.
34. Test Pattern: display test-pattern which generate by scaler. Only
active on PC source.
35. H.Position: adjust horizontal position while PC source in
36. V.Position: adjust Vertical position while PC source in
FR
28. Video Format: selectionne le standard Vidéo. Forcer à “Auto”.
29. Default Language: Selectionne la langue par défaut. Même fonction
que le réglage utilisateur.
30. RGB filter: Filtre Contour RGB du Port PC.
Agit sur les entrées PC et Ypb Pr.
31. Video filter: filtre contour Vidéo. Agit sur les entrées TV Vidéo et
Ye bCr.
32. Monitor Sync: Forcé à ON Auto détection du format Vidéo.
33. Reset All Nvram: Appui sur “OK”.
Reset De tous les parametres du “MODE SERVICE” incluant la
tempèrature de couleur, Contour... etc.
34. Test Pattern: Affichage de la mire interne. Actif seulement en mode
PC
35. H.Position: Réglage Horizontal en mode PC.
36. V.Position: Réglage Vertical en mode PC.
IT
28. Video Format: Seleziona lo standard Video. Forzato su “Auto”.
29. Default language: Seleziona la lingua. Stessa funzione del Menu
Utente.
30. RGB Filter: Definizione filtro del demoltiplicatore (scaler) della porta
PC. Influisce sugli ingressi PC e YpbPr.
31. Video Filter: Definizione filtro del demoltiplicatore del segnale Video.
Influisce sui segnali TV Video e YcbCr.
32. Monitor Sync: Forzato su “On”. In questo modo può essere rilevato
automaticamente il Formato Video.
33. Reset All Nvram: Premendo “OK” verranno resettati tutti I
parametri del Service Mode, inclusi regolazione Temp. Colore,
Regolazione Luminosità, ... ecc.).
34. Test Pattern: Attivazione serie di segnali test. Attivo solo con
ingresso PC.
35. H. Position: Regola la posizione Orizzontale in ingresso PC.
36. V. Position: Regola la posizione Verticale in ingresso PC.
ES
28. Video Format: selecciona el estándar de Video. “Auto” fuerza a
modo automático.
29. Default Language: selecciona el idioma por defecto. Hace la misma
función que el menú "Usuario".
30. RGB filter: filtro de nitidez. Válido para las entradas de PC e YpbPr.
31. Video filter: filtro de nitidez. Válido para las entradas de TV, Video e
YcbCr.
32. Monitor Sync: forzado a “On”. El formato de video puede ser
autodetectado.
33. Reset All Nvram: pulsando “OK” se borrarán todos los parámetros
del Modo Servicio, incluyendo los ajustes de temperatura de color,
ajustes de brillo y contraste....., etc.
34. Test Pattern: muestra unas cartas de ajuste generadas
internamente. Activo solamente en modo PC.
35. H. Position: ajusta la posición horizontal sobre la entrada PC.
36. V. Position: ajusta la posición Vertical sobre la entrada PC.
DE
28. Video Format: Auswahl des Videostandards. Sollte auf „Auto“
stehen.
29. Default Language: Auswahl der Menüsprache; gleiche Funktion wie
die Benutzersteuerung.
30. RGB Filter: Abgleich des Schärfefilters des Scalers für PC-Mode und
YPbPr.
31. Video Filter: Abgleich des Schärfefilters des Scalers für den VideoMode.
32. Monitor Sync: Sollte immer auf „On“ stehen damit das Videoformat
automatisch erkannt wird.
33. Reset All Nvram: Drücken der „OK“-Taste setzt alle Parameter im
Service-Mode ( auch Farbtemparatur, Helligkeit usw.) zurück.
34. Test Pattern: Zeigt ein vom Scaler erzeugtes Testmuster auf dem
Bildschirm. Nur im PC-Mode.
35. H.Position: Horizontallage für PC-Eingang.
36. V.Position: Vertikallage für PC-Eingang.
LCD03B
First issue 04 / 04
Life Time
Project Code
Panel Resolution
NvRam Ver.
HXV Res / HFreq
HXV Total
Mode Num
DCLK
00034:10
EU20L03B
800 X 600
OC / 14
649 X 548
864 X 625
55
41.0 M
Factory Save...
00033:35
15,52
Tuner: 1D
Page5 on service mode
EN
37. Life Time: The left item means the time added by stand by + TV on
The right item display the time of TV-on only.
38. Project Code: as title
39. Panel Resolution: as title
40. NvRam Ver. Display EEPROM data veriosn.
41. HXV Res / Hfreq: timing information. Resolution and H clock
42. HXV Total: timing information.
43. Mode Num: timing information. Sequence of Timing chart.
44. DCLK: timing information. Data clock
These 4(41,42,43,and 44) items above are for development check only.
45. Factory save: save factory parameters.
46. Green label: display tuner s/w version.
FR
37. Life Time:
-Indication de gauche:
indique le temps fonctionnement total du TV: On+ Stand by.
-Indication de droite:
Indique le temps de fonctionnement du TV en On seulement.
38. Project Code: Info code.
39. Panel Resolution: Resolution du panneau d’écran.
40. NvRam Ver. Version EEPROM.
41. HXV Res / Hfreq: Information de temps resolution et Horloge H.
42. HXV Total: Information de temps.
43. Mode Num: Information de temps
44. DCLK: Information de temps.
Data clock.
Ces 4 lignes d’information sont utilisées en développement.
45. Factory save: Sauvegarde les paramétres usine.
46. Green label: Affiche la version de Software du tuner.
DE
Seite 5 des Service-Modes
37. Life Time: Betriebsstundenzähler, links: Summe Standby-Zeit und
TV-Ein, rechts: nur TV-Ein-Zeit.
38. Project Code:
39. Panel Resolution: Auflösung der LCD-Panels
40. NvRam Ver. : Version EEPROM-Daten
41. HXV Res / HFreq:Timing-Information (Auflösung und H-Clock)
42. HXV Total: Timing Information
43. Mode Num Timing Information
44. DCLK: Timing Information Data Clock
45. Factory Save: Daten des Service-Modes speichern.
46. Grün hinterlegtes Feld: Version Tuner-Software
LCD03B
First issue 04 / 04
IT
37. Life Time: Il contatore a sinistra indica il tempo totale di
funzionamento in Stand By + apparecchio acceso. Il contatore a destra
indica il tempo totale di funzionamento ad apparecchio acceso (ON).
38. Project code: Codice progetto.
39. Panel Resolution: Risoluzione pannello.
40. NvRam Ver: Versione EEPROM.
41. HXV res / Hfreq: Informazione timing. Risoluzione e Clock H.
42. HXV Total: Informazioni timing.
43. Mode Num: Informazioni Timing. Sequenza carta tempi.
44. DCLK: Informazioni Timing. Clock Data.
I valori menzionati nei punti 41, 42 43 e 44 sono solo per la fabbrica
45. Factory save: Parametri memorizzati in fabbrica.
46. Casella verde: Versione software Tuner
ES
37. Life Time: Los números de la izquierda muestran la suma de las
horas en stand-by + TV encendido. Los de la derecha indican sólo las
horas de TV encendido.
38. Project Code: informativo
39. Panel Resolution: informativo
40. NvRam Ver. Indica la versión de la EEPROM.
41. HXV Res / Hfreq: información de timing. Resolución y frecuencia H.
42. HXV Total: información de timing.
43. Mode Num: información de timing.
44. DCLK: información de timing. Frecuencia del reloj.
Estas 4 funciones anteriores (41,42,43,y 44) son informativas. Sólo son
para comprobación.
45. Factory save: memoriza los valores de fábrica.
46. Casilla en verde: indica la versión de software del sintonizador.
CONTROL SCHEMATIC DIAGRAM - SCHEMA DES CIRCUITS COMMANDES - SCHALTBILD BEDIENTEIL - SCHEMA DEI CIRCUITI COMANDI - ESQUEMA DE LOS CIRCUITOS MANDOS
CONTROL 20” BI)
R1
R9
10K
1K
Q1
2N3 906
+ C1 5
100U
16V
12V
+ C1 6
100U
16V
2
12V
R5
1
16V
10U
C9
6
5
100U
16V
16V
C4
4
51.1KF
D2
D5
D6
2
4
5
3
3
3
Q2
2N3 904
1
20L1033010
10
9
8
7
6
5
4
3
2
1
TP 6
TP 7
TP 8
TP 9
TP 10
TP 11
TP 12
TP 13
TP 14
TP 15
1
Q3
2N3904
KP D0
KP D1
KP D2
KP D3
KP D4
KP D5
R4
10K
2
1N4148
2
R3
10K
V5S
G2
2
4
5
TZMC 5V 1
TZMC1 1
D7
G1
7
6
1
R1 4
47K
J3
10
9
8
7
6
5
4
3
2
1
7
6
1
2210165091
D3
TZMC 5V 1
D4
TZMC 5V 1
+ C1 3
100U
16V
+ C1 2
100U
16V
D1
TZMC 5V 1
R7
1K
R1 3
4.7
C7
0.1U
25V K
10K
C3
100 0P
39
TZMC 11
C6
0.1U
25V K
TDA2 822D
U1
R2
R8
1K
C2
1000P
R6
C1 1
3
+
G1
+
-
10U
R1 2 39
4.7
-
51.1KF
R1 1
12V
16V
100U
8
Audio_L
J1
C1
1000P
C1 0
+
+
EAR_MUTE
A udio_R
TP 1
TP 2
TP 3
TP 4
TP 5
5
4
3
2
1
7
+
R1 0
+
G2
J2
+ C1 4
100U
16V
R1 5
10K
V5S
1
1
SW6
2
2
5
SW5
3
1
3
SW4
1
3
SW3
1
1
3
SW2
3
SW1
3
4
5
4
2
5
2
4
5
4
2
5
2
4
5
4
20L 0BI
Optical
H1
HOLE -V8
LCD03B
First issue 10 / 03
H2
HOLE -V 8
6
2
7
3
7
3
8
4
8
4
9
5
9
5
1
2
1
6
KEY PA D BOAR
48.M2302.A00
Points
W ednesday , Septem ber 24, 2003
OP1
OP
OP2
OP
OP3
OP
OP4
OP
OP5
OP
OP6
OP
OP7
OP
OP8
OP
OP9
OP
OP10
OP
OP11
OP
OP12
OP
OP13
OP
OP14
OP
IR PREAMPLIFIER - IR PREAMPLIFICATEUR - IR VORVERSTARKER - PREAMPLICATORE IR
( IR PREAMPLIFIER 20”BI )
IR Sensor P/N :05.04856.010 for the USA
IR Sensor P/N :05.04833.010 for the EU
U1
TSOP4856
33 0
LE D1
GREEN/RED
1
2
3
G
1
V5S
TP 1
TP 2 L2
TP 3 L3
TP 4 L4
TP 5 KP D0
TP 6 KP D1
TP 7 KP D2
KP D3
TP 8
KP D4
TP 9
TP 10 KP D5
20L1033012
V5S
+ C1
4.7U
25V
R3
5.1K
10
9
8
7
6
5
4
3
2
1
10
9
8
7
6
5
4
3
2
1
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20
12
11
10
9
8
7
6
5
4
3
2
1
2
J3
12
11
10
9
8
7
6
5
4
3
2
1
R2
330
1
R
2
V5S
VOUT
GND
VCC
33 0
3
R1
4
R4
G2
G2
G1
G1
J2
20L1033010
IR BOARD
H2
HOL E-V8
H1
HO LE-V 8
6
2
7
3
7
3
8
4
8
4
9
5
9
5
1
2
1
6
Optical Points
OP1
OP
LCD03B
First issue 10 / 03
OP2
OP
OP3
OP
OP4
OP
OP5
OP
OP6
OP
OP7
OP
AUDIO CHANNEL SCHEMATIC DIAGRAM - SCHEMA DES CIRCUITS AUDIO - SCHALTBILD MEHRKANAL AUDIO - SCHEMA DEI CIRCUITI AUDIO - ESQUEMA DE LOS CIRCUITOS AUDIO
(AUDIO 20” BI)
AUD_L
R566
2K
3VCC
AUD_L
C504
0,22µ
16V
R567
2K
13
4
OUT1+
IN1
PWR_GND
1
C501
1000P
50V
R503
10K
BD501
(0805)
(Bead)
7
S_GND
C511
0.1µ
16V
AUD_R
ST-BY
C503
10µ
16V
(EL)
R506
47K
ZD557
12V
IC501
TDA7266
P_GND
R501
26,1K
VCC 2
R565
2K
C506
0,1µ
25V
C505
470µ
25V
(ELI
C509
470µ
25V
IEL)
R505
47K
C510
0.1µ
16V
R564
2K
+19V
1
9
OUT1-
S_GND
R502
26,1K
2
BD503
S_GND
S_GND
Vref
(Bead)
12
IN2
C508
0.22µ
16V
OUT2+
15
OUT2-
14
MUTE
Q505
2N3904
R507
10K
R504
10K
C502
10009
50V
Q506
2N3904
MUTE
8
PW-GBD
R516
20K
C507
100µ
16V
(el)
P_GND
R517
20K
S_GND
Q501
2N3904
S_GND
R509
47K
+12V
VCC
AUD_L
S-GND
AUD_R
EAR_MUTE
CN602=>
CN602
R515
47K
R508
20K
R513
20K
R513
47K
Q504
2N3904
Q503
2N3904
Q502
2N3904
ZD 501
9.1V
R511
47K
R510
20K
R512
20K
R514
20K
S_GND
NOTES:
1. Resistor values are in ohm, K = 1,000 ohm, M = 1,1000 000 ohm
2. All resistors are SMD 0603 5% exept where otherwise indicated
S_GND
3. All capacitors are SMD 0603 5% exept where otherwise indicated
4.
LCD03B
First issue 10 / 03
BD502
2
(Bead)
3
BD504
(Bead)
6
R518
47K
CN601
Represents PCB common ground
4
DC - DC CONVERTER SCHEMATIC DIAGRAM - SCHEMA CONVERTISSEUR DC -DC -SCHALTBILD GLEICHSTROMUMFORMER - SCHEMA CONVERTITORE CC - CC
ESQUEMA CONVERTIDOR CC - CC
( DC/DC 15” )
POWER_ON
CN702
CN701
PWR-JACK
LCD03B
First issue 10 / 03
DC - DC CONVERTER SCHEMATIC DIAGRAM - SCHEMA CONVERTISSEUR DC -DC -SCHALTBILD GLEICHSTROMUMFORMER - SCHEMA CONVERTITORE CC - CC
ESQUEMA CONVERTIDOR CC - CC
( DC/DC 20” BI )
Q703
2N3904
F701
T 3A
R715
1,8K
UREF
R702
10K
R703
10K
C714
470P
50V
(NPD)
R729
47K
C707
0,1µ
25V
R723
3 01K
D703
RB060L-4D
R725
330
Q708
2N3904
R731
47K
R724
1K
ZD702
2MM 5,1V
R714
D701
RB060L-4D
C718
0.1µ
25V
Q704
2N3905
C715
1µ
16V
R704
20K
R706
10K
C705
220µ
25V
(EL)
C702
220µ
25V
(el)
UREF
R738
3K
C710
4700P
50V
VCC
R717
69.43001.101
Q707
FO59435
L701
150µ
POWER_ON
ZD702
R730
20K
+5VS
C704
47µ
16V
2MM 6,1V
16
15
14
13
C709
1µ
25V
C713
4700p
50V
11
10
+12V
R719
1.8K
C716
1µ
16V
9
R710
0
12V
R705
10k
R708
10k
R709
47k
Q706
2N3904
R726
8,66K
R728
2K
12V
CN702
+5VS
8
PWR_GND
7
LCD_BR
ON/OFF
5
C701
220µ
25V
4
C717
220µ
25V
R740
20K
LCD_ON
CN701=>CN502
BD501
(Bead)
4
3
BD502
(Bead)
+19V
PWR_ON
R743
20K
CN701<=CN502
+19V
VCC
R742
47K
(Bead)
1
2
MUTE
AUDIO_L
1
C564
0,1µ
25V
3
NOTES:
1. Resistor values are in ohm, K = 1,000 ohm, M = 1,1000 000 ohm
2. All resistors are SMD 0603 5% exept where otherwise indicated
1
GND
3. All capacitors are SMD 0603 5% exept where otherwise indicated
4.
LCD03B
First issue 10 / 03
Represents PCB common ground
L502
L503
(Bead)
2
C501
470µ
25V
(ELI)
+5VS
Q713
2N3904
+19V
2
LCD_ON
+12V
ON/OFF
R741
3K
3
PWR_GND
Q710
2N3904
Q710
2N3904
6
BD702
(Bead)
R734
47K
R733
3K
+12V
CN703
+15V
R732
20K
R727
1K
ZD704
Q712
2N3906
BD701
(Bead)
UREF
D704
RB060L-4D
D702
RB060L-4D
C719
0.1µ
25V
Q709
2N3906
C708
0,1µ
25V
DTC
ZD703
C706
220µ
25V
(el)
R721
0
R739
3K
R707
20k
L702
47µ
Q705
2N3904
UREF
VCC
2 FBK
12
Q702
IRFR5305
R713
47K
GND
1 OUT
2 OUT
8
1 DTC
7
2 DTC
1 FBK
6
TL1451AC
1 CN+
REF
SCP
IC701
5
1 CN-
4
2 CN-
SCP
3
1 CN+
2
CT
1
DTC
+19V
+5VS
Q701
IRFR5305
F702
T 2A
69.420D1.111
0,1µ
25V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
17
18
19
20
21
LCD_BR
PWR_GND
S_GND
L501
(Bead)
C562
0,1µ
25V
AUDIO_R
R737
20K
R735
47K
R736
20K
INVERTER SCHEMATIC DIAGRAM - SCHEMA DE LA PLATINE INVERSEUR - SCHALTBILD INVERTER - SCHEMA INVERTER - ESQUEMA DEL INVERSOR
( INVERTER 15” / 20” )
CN601
CN603
CN604
CN602
LCD03B
First issue 10 / 03
PC BOARD INTERFACE - INTERFACE PC BOARD - SCHALTBILD PC BOARD - SCHEMA DELLA PC BOARD INTERFAZ PC BOARD
( PC BOARD 1/7)
DN3
BAV9 9
R 110
75
U24
VCC
16
0
4
R 138
1K
C1
C2
D11
VR _GND
[P.1]
GREEN_IN
16 V
BLUE_ IN
C 125
0 .1U K
[P.2]
[P.2]
U25
1
*2
VY_ IN
R10
C3
C4
C5
75
75
75
47P
50V J
47 P
50V J
47 P
50V J
(For
MM1031XMR
4
R9
[P.1]
V Y_GND
0
R 139
[P.4]
[P.4]
[P.4]
[P.4]
[P.4]
1
U2
R1 6
4.7K
8
4.7K
GS CL
GS DA
VCC
A0
1
C1 1
0 .1U K
7
WP
A1
2
6
SCL
A2
3
GND
4
5
SDA
C1 0
0 .1U K
UART _RX
UAR T_TX
RX
TXD
[P.4]
RX [P.4]
TXD [P.4]
VY0
VY1
VY2
VY3
VY[0..7 ]
OPE N
0 .1U K
1N4148
16
15
14
13
12
11
10
9
VCC
GND
T1OUT
R 1IN
R1OUT
T1IN
T2IN
R2OUT
C1 37
100P
C1 38
100P
C1 39
100P
0.1U K
C1 +
V+
C1C2 +
C2VT2OUT
R2I N
OPE N
C8
D2
1
2
3
4
5
6
7
8
0.1U K C6
V CLK
VVS
VHS
V PEN
VF IELD
OPE N
0.1U K
1N4148
R1 5
2
4
U1
C7
[P.1]
VY4
VY5
VY6
VY7
SP 232ECN
[P.4]
V UV[0..7 ]
V UV0
V UV1
V UV2
V UV3
V UV4
V UV5
V UV6
V UV7
AT2 4C02A
[P.7]
[P.7]
[P.7]
[P.7]
Screw Holes
+12 V
+5VS
VC C
+9 V
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
8
3
7
2
6
9
5
4
8
3
7
2
6
9
5
4
8
4
8
3
7
3
7
2
6
2
6
1
5
1
9
1
4
1
1
5
3
9
Proj ct Code
4
8
99.M127 5.001
3
7
2
6
H1
H2
H3
H4
H5
HOLE-V8
HOLE- V8
HOLE- V8
HOLE-V8
HOLE- V8
Optical Points
OP1
OP
OP2
OP
OP3
OP
OP4
OP
OP5
OP
OP6
OP
OP7
OP
OP8
OP
OP9
OP
OP10
OP
OP1 1
OP
OP1 2
OP
OP1 3
OP
OP1 4
OP
OP15
OP
OP16
OP
[P.1]
[P.1]
[P.1]
[P.1]
[P.1]
[P.1]
[P.6]
[P.6]
[P.6]
[P.6]
[P.6]
[P.6]
[P.3]
[P.3]
[P.3]
INPUT_DET
AV_ DET
TV_DET
[P.4]
[P.4]
SDA
SCL
DECOE
PORTB3
VIDEO_RESE
AV_SEL
CVBS_ SEL
+12V
+5VS
VC C
+9 V
Model N am e
20L03B
Tuesday, Sept ember 23, 200
LCD03B
First issue 10 / 03
3
A udio Line out(22 10165031 )
VY _I N
VY_GND
VB_ IN
VB_ GND
VR _IN
V R_GND
RI 1
LI1
RI 2
LI2
RI 4
LI4
GF-60Pin
9
10 J 00P J
2
4
5
D17
G F60
5
10 00P
2
4
5
J5
47
47
+5VS
+5VS
VB_GN D
C1 31
[P.2]
[P.2]
100P J C1 36
1
1
P C_5V
17
R14
R13
C9
0
C1 30
7
6
1
D18
D16
+5VS
P C_5V
MM1031XMR
R 140
RGB_VS
RGB _HS
DN 9
BAV9 9
3
VB_IN
[P.1]
GND
1K
1K
D1
*2
J1
7
6
1
TZMC5V1
TZM C5V1
D7
R 120
75
1
EMI)
TZMC5V1
TZM C5V1
D5
D15
U26
TZMC5V1
TZMC5V1
D8
3
D14
R88 600 OHM
[P.6] Audio_ R_Line
VCC
BLUE_ IN
D12
R87 600 OHM
[P.6] Aud io_L_Lin e
TZMC5V1
TZMC5V1
R 136
R 137
D2 0
27V
D6
C 126
0 .1U K
R7
10K
[P.1]
GND
R8
RI 3
[P.6]
R6
10K
D13
R 115
75
VCC
3
G REEN_I N
2
16 V
[P.2]
1 1
47
RED_ IN
2
R5
TP8
16 V
2
B1
TP9
C 121
10 U
C 122
10 U
C 123
10 U
1 1
47
LI3
10 00P J10 00P J
2
47
R4
2
R2
TP6
D19
27 V
2
R3
MM1031XMR
OP5 V
2
R86 600 OHM
221 0165031
D-Sub15
1
3
TP4
TZM C5V1
15
DN 8
BAV99
3
3
1K
TZM C5V1
[P.1]
R1
TZM C5V1
14
GS CL
VR_ IN
R85 600 OHM
TZM C5V1
TZMC5V1
TP1 0
TP3
+
13
R1
G1
+
12
TP1 1
1
*2
GND
C90
47U
16V
[P.6]
TP2
OP5 V
6
1
7
2
8
3
9
4
10
5
+
GS DA
TP7
+
2
4
5
2
4
5
EMI)
J3
11
TP5
3
RED_ IN
D9
7
6
1
2
DN2
BAV99
C 124
0 .1U K
2
DN1
BAV99
OP5 V
R2 3
150
7
6
1
1 1
R22
150
(For
J2
2
input output
OP5 V
1 1
+9 V
+5VS
T
[P.3]
[P.4]
[P.4]
[P.4]
[P.4]
[P.7]
[P.7]
[P.7]
[P.7]
PC BOARD INTERFACE - INTERFACE PC BOARD - SCHALTBILD PC BOARD - SCHEMA DELLA PC BOARD INTERFAZ PC BOARD
( PC BOARD 2/7)
[P.4]
[P.1]
1
OE
RGB_ HS
2
A
3
GND
1
[P.1]
U2 0 74LVC1 G126
5
VCC
P C_AV
R GB_VS
V D33
R1 7
R18
R19
4
Y
A
3
GND
C13
PV DD
.039 U
16V K
3900 P
50V K
Trace and
Compon ents
Close IC
PV DD
A VDD
VD3 3
G VMI D
4
Y
C12
47
47
U2 1 74LVC1 G126
5
OE
VCC
2
3 .3K
C14
5
6
7
8
4
3
1
GBE[0.. 7]
[P.4]
[P.4]
1
2
3
GGE[0. .7]
22P
CN 3
8
22P
CN4
7
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
2
6
7
5
4
3
GGE0
GGE1
GGE2
GGE3
GGE4
GGE5
GGE6
GGE7
2
8
7
6
5
8
7
6
5
1
GND
VD
CLAMP
MIDSCV
GND
PVD
PVD
FIL T
GND
VSYNC
HSYNC
COAST
GND
VD
VD
GND
GND
VDD
VDD
GND
C1 9
0 .1U K
1
2 RN 3
3
47
4
1
2 RN 4
3
47
4
4
GVREF
A DGE0
A DGE1
A DGE2
A DGE3
A DGE4
A DGE5
A DGE6
A DGE7
6
SCL_C PU
SDA_CP U
0
0
0x98
GBE0
GBE1
GBE2
GBE3
GBE4
GBE5
GBE6
GBE7
5
R20
R21
r:
8
7
6
5
8
7
6
5
1
.047U R A IN
50V K
C18
RED_ IN
I2C Add
1
2 RN 1
3
47
4
1
2 RN 2
3
47
4
8
[P.4]
[P.4]
U3
AD98 83 KST-11 0
A DBE0
A DBE1
A DBE2
A DBE3
A DBE4
A DBE5
A DBE6
A DBE7
2
[P.1]
GND
B0
B1
B2
B3
B4
B5
B6
B7
VDD
GND
G0
G1
G2
G3
G4
G5
G6
G7
GND
7
.047U
GA IN
50V K
10 00P J SOGI N
50V
GND
VD
BAI N
GND
VD
VD
GND
GAI N
SOGI N
GND
VD
VD
GND
RAI N
A0
SCL
SDA
REF BYPASS
VD
GND
3
C16
C17
BA IN
4
GREEN_I N
.047U
50V K
CN2
22P
CN 1
22P
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
6
[P.1]
BLUE_ IN
C15
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
5
[P.1]
GCOAST
GND
VD
GND
VSOUT
SOGOUT
HSOUT
DATACK
GND
VDD
R7
R6
R5
R4
R3
R2
R1
R0
VDD
VDD
GND
[P.4]
8
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
0.1U K
V D33
VCPU3 3
L1
C41
C42
0 .1U K
0 .1U K
0 .1U K
0.1U K
0 .1U K
0 .1U K
0 .1U K
0 .1U K
0.1U K
0 .1U K
0.1U K
C45
0.1U K
C46
0.1U K
C47
0.1U K
C48
0.1U K
C49
C50
0.1U K
E0
E1
E2
E3
E4
E5
E6
E7
6
5
G RE[0..7 ]
1
[P.4]
+ C20
10 U
16 V
A VDD
U4
0.1U K
AD HS
R24
47
AD VS
R25
47
[P.4]
GCL K
[P.4]
GFB K
30 OHM
GVS
3
L3
42 OHM
VI N
VOUT
2
C21
[P.4]
0 .1U K
1
L4
GND
AD CK
C23
22P J
C27
C24
22P J
C25
22 P
OPE N
+
LD1117-3.3
V D33
2
0 .1U K
C44
GR
GR
GR
GR
GR
GR
GR
GR
8
7
6
5
478
7
6
5
47
+5VS
P VDD
C43
1
2 RN 5
3
4
1
2 RN 6
3
4
1
VD3 3
ADRE0
ADRE1
ADRE2
ADRE3
ADRE4
ADRE5
ADRE6
ADRE7
2
C40
4
C39
3
C38
2
C37
1
C36
CN6
22P
4
C3 5
3
C3 4
2
C3 3
1
CN 5
22P
7
8
5
6
8
AV DD
7
42 OHM
C26
22 P
OPE N
C2 2
47 U
16V
1R
1Q
1Q
13
4
9
10
2A
2B
2Q
2Q
5
12
11
2R
CX2
RCX2
3
8
GND
74LVC1G 126
4
14
15
1A
1B
LCD03B
First issue 10 / 03
6
7
74LV123PW
U7
R2 7
47K
+5VS
3
L6
R2 8
D3
360
GHSSOG
1N4148
D4
1N4148
C32
220 P
50V J
[P.4]
42 OHM
C2 9
R2 9
1K
0.1U K
+
V D33
R3 1 221K F
C3 1
1U
50V
R30
47K
P VDD
VI N
VOUT
2
1
Y
CX1
RCX1
1
2
+
LD1117-3.3
2
GND
5
GND
A
3
VCC
1K
1
OE
2
V D33
1
1
R26
C28
220 P
50V J
U5
2
MV_EN
VCC
[P.4]
A DSOG
VD3 3
U6
16
0.1U K
C3 0
47 U
16V
PC BOARD INTERFACE - INTERFACE PC BOARD - SCHALTBILD PC BOARD - SCHEMA DELLA PC BOARD INTERFAZ PC BOARD
( PC BOARD 3/7)
D[0 ..15]
VCPU 33
[P.4]
+5VS
VCPU 33
GND
GND
2
R3 6
1K
10K
R35
1K
R37
[P.3]
R40
1K
8
7
3
R38
Q3
2N39 04
1
LED1_SE L
CN 7
22P
Q2
2N3906
2
+5VS
1
2N3904
2N3906
6
1
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D1 0
D1 1
D1 2
D1 3
D1 4
D1 5
2
29
31
33
35
38
40
42
44
30
32
34
36
39
41
43
45
3
5
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A1 0
A1 1
A1 2
A1 3
A1 4
A15
A16
A1 7
A18
D1
D2
D3
D4
D5
D6
D7
D8
D9
D1 0
D1 1
D1 2
D1 3
D1 4
D1 5
D1 6
2
R3 4
3
25
24
23
22
21
20
19
18
8
7
6
5
4
3
2
1
48
17
16
VCC
37
4
A1
A2
A3
A4
A5
A6
A7
A8
A9
A1 0
A1 1
A1 2
A1 3
A1 4
A1 5
A1 6
A1 7
A1 8
A1 9
13
1
FWPn
VPP
42 OHM
L8
10K
R42
1K
10 K
R39
470
IR RCVR_3V
[P.4]
R41
R43
[P.3]
3
0
CE
OE
WE
RP
WP
BYTE
Q1
2N3906
Q4
2N3904
1
LED2_SE L
46
27
R44
1K
10 K
2
R3 3
26
28
11
12
14
47
+5VS
1
ROMOE n
ROMW En
RES ETn
3
3
[P.4]
[P.4]
[P.4]
U8
R32
2
O PEN
C51
0.1U K
10K
AT49BV8192A(T)
J6
FC En
R4 5
L ED1
L ED2
IR RCVR
K PD0
K PD1
K PD2
K PD3
K PD4
K PD5
VCPU 33
R46
1A 1
1A 2
1A 3
1A 4
2A 1
2A 2
2A 3
2A 4
2
4
6
8
11
13
15
17
1G
2G
1
19
74 AHC244
[P.4]
VCPU 33
CS1 n
R1 26
D1
D2
D3
D4
D5
D6
D7
D8
11
CL K
1
CLR
10K
+
C 360
10 U
16 V
20
VCC
3
4
7
8
13
14
17
18
C 359
0.1U K
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
2
5
6
9
12
15
16
19
GND
D0
D1
D2
D3
D4
D5
D6
D7
10
U22
74LVC27 3
DECOE
PWR_ ON
LED1_SE L
LED2_SE L
[P.1]
[P.7]
[P.3]
[P.3]
R 141
CS0 n
[P.4]
OP EN
AV_DET
INPUT_DET
TV_DET
[P.1]
[P.1]
[P.1]
R54
R55
R56
3.3K
5
6
7
5
4
3
2
6
7
8
1
4
3
1
NMI
[P.4]
U10
3.3K
20
D1
D0
1Y 1
1Y 2
1Y 3
1Y 4
2Y 1
2Y 2
2Y 3
2Y 4
A [1..19]
LCD03B
First issue 10 / 03
8
GND
10
D1 1
D1 0
18
16
14
12
9
7
5
3
GND
AMP/104549
27 ST
CONN ML 60P D1.
D8
D9
D10
D11
D12
D13
D14
D15
10
59
1
2
C53
0 .1U K
D7
D6
D1 3
D1 2
CN9
22 P
CN 8
22 P
10K
VCPU 33
ROMWEn
VCPU 33
R53
A13
A15
A16
A18
[P.4]
10K
20L 1023060
R52
[P.4]
74 AHC244
10K
RES ETn
CS0 n
10K
D3
D2
D9
D8
R51
D5
D4
CS 0n
10K
D15
D14
1
19
R50
[P.4]
1G
2G
K PD6
TP60
10K
ROMOE n
K PD0
K PD1
K PD2
K PD3
K PD4
K PD5
K PD6
FAN _DET
R49
A1 7
A1 9
A1
A3
A5
A7
A8
A10
2
4
6
8
11
13
15
17
10K
A1 2
A1 4
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
K PD[0..6 ]
1A 1
1A 2
1A 3
1A 4
2A 1
2A 2
2A 3
2A 4
R48
A9
A1 1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
U9
R47
60
J8
A2
A4
A6
1Y 1
1Y 2
1Y 3
1Y 4
2Y 1
2Y 2
2Y 3
2Y 4
2
VCPU 33
18
16
14
12
9
7
5
3
3.3K
VCPU 33
D0
D1
D2
D3
D4
D5
D6
D7
VCC
3.3K
VCC
3.3K
20
C52
0 .1U K
TP59
TP4 7
TP4 9
TP5 0
TP5 1
TP5 3
TP5 4
TP5 5
TP5 6
TP5 7
TP5 8
TP4 8
12
11
10
9
8
7
6
5
4
3
2
1
20L2 021012
PC BOARD INTERFACE - INTERFACE PC BOARD - SCHALTBILD PC BOARD - SCHEMA DELLA PC BOARD INTERFAZ PC BOARD
( PC BOARD 4/7)
V3 3
VCP U33
1
2
3
2
3
[P.2]
[P.2]
C5 5
22P J
RES ETn
[P.3]
L1 0 70 O HM
AT24C3 2A
SDA_CPU
VCPU 33
SCL_CP U
SDA_CP U
0 RPTR11
14 2
RES ETn
13 9
100 EXTRSTEN 28
R6 0
47
48
49
50
51
54
55
56
VYUV0
VYUV1
VYUV2
VYUV3
VYUV4
VYUV5
VYUV6
VYUV7
VY[0..7 ]
VC C
SDA_5V
Q1 2
BSN20
3
3
3.3K
[P.7]
[P.7]
[P.1]
[P.1]
[P.2]
[P.2]
[P.1]
[P.1]
Power and Ground
VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
1
3.3K
1
2
SCL_CPU
2
Q1 1
B SN20
16 9
17 0
XI
XO
R6 7
1.5M
X608
C59
18P
50V J
V UV[0..7 ]
V UV0
V UV1
V UV2
V UV3
V UV4
V UV5
V UV6
V UV7
19 5
19 4
19 6
19 7
19 8
19 9
PW113
D[0 ..15]
[P.3]
RDn
WR n
TP6 2
TP6 3
[P.3]
ROM OEn
[P.3]
ROMW En
[P.3]
CS0 n
[P.3]
CS1 n
CS 0n
CS 1n
PW113
MUTE
L CD_ON
VIDEO_RESET
PORTB3
MV_EN
P C_AV
AV_SEL
CVBS_SE L
39
40
41
42
43
44
45
46
PORTC0
PORTC1
PORTC2
PORTC3
PORTC4
PORTC5
PORTC6
PORTC7
57
58
59
60
61
62
63
64
PORTB0
PORTB1
PORTB2
PORTB3
PORTB4
PORTB5
PORTB6
PORTB7
PW11 3
2 SDA_CPU
VCP U33
[P.1]
LCD03B
First issue 10 / 03
RD
WR
ROMOE
ROMW E
CS0
CS1
U 12B
U 12E
[P.1]
1
30
53
73
87
105
124
141
172
1
3 3
2
SCL_5V
[P.1]
17
38
66
85
138
186
R7 1
R6 9
3.3K
1
U 12D PW113
Q1 0
B SN20
Q9
B SN20
3.3K
C61
0.1U K
VCP U33
NMI
PW113
Misc
A[1..19]
[P.3]
GPO Port
VC C
19 3
C5 8
14 .318MH Z
18 P
50V J
C60
VCP U33
TRST
TCK
TMS
TDI
TDO
X607
0.1U K
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
U1 2C
Y1
VSSPA1
VCL K
VVS
VH S
VFIEL D
VPEN
PW113 U1 2A
Graphics and
Vid eo Port
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D1 0
D1 1
D1 2
D1 3
D1 4
D1 5
16 3
16 2
16 1
16 0
15 9
15 8
15 7
15 6
15 5
15 4
15 3
15 2
15 1
15 0
14 9
14 8
RXD
TXD
L1 2
L11
71
74
75
69
70
147
14 6
14 5
14 4
14 3
NMI
VCP U18
GRE0
GRE1
GRE2
GRE3
GRE4
GRE5
GRE6
GRE7
A1
A2
A3
A4
A5
A6
A7
A8
A9
A1 0
A1 1
A1 2
A1 3
A1 4
A1 5
A1 6
A1 7
A1 8
A1 9
168
[P.1]
nents Close IC
VSSPA2
VY0
VY1
VY2
VY3
VY4
VY5
VY6
VY7
Trace and Compo
OPE N
10 K
C57
2.2U K
16 V
[P.3]
166
VCL K
VVS
VH S
VF IELD
VPE N
[P.7]
PORTA0
PORTA1
PORTA2
PORTA3
PORTA4
PORTA5
PORTA6
PORTA7
16
37
65
84
13 7
18 5
20
21
22
23
24
25
26
27
E0
E1
E2
E3
E4
E5
E6
E7
R1 30
R66
L CD_BR
20 7
20 6
20 5
20 4
20 3
20 2
20 1
20 0
1
2
3
4
5
6
GR
GR
GR
GR
GR
GR
GR
GR
R 128
20K
SDA_CPU
SCL_CPU
S DA2
S CL2
IR RCVR_3V
IN T
GPIOA6
PWM_BR
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
GGE0
GGE1
GGE2
GGE3
GGE4
GGE5
GGE6
GGE7
IR RCVR_3V
470
VDD PA3
V DDPD3
10
11
12
13
14
15
18
19
R 129
TV_DET
16 7
16 5
GGE0
GGE1
GGE2
GGE3
GGE4
GGE5
GGE6
GGE7
[P.1]
42 OH M
GBE0
GBE1
GBE2
GBE3
GBE4
GBE5
GBE6
GBE7
67
68
R65
TP1 2
TP1 3
[P.3]
19 2
19 1
19 0
18 9
18 8
18 7
18 4
18 3
18 2
18 1
18 0
17 9
17 8
17 7
17 6
17 5
17 4
17 3
16 4
TESTEN
RESET
EXTRSTEN
RXD
TXD
10K
470
R64
RX
TXD
GCOAST
VDDPA1_1.8V
VDDPA2_1.8V
G RE[0..7]
2
3
4
5
6
7
8
9
[P.1]
[P.1]
[P.2]
42 OH M
[P.1]
[P.1]
[P.1]
[P.1]
[P.1]
GGE[0. .7]
GBE0
GBE1
GBE2
GBE3
GBE4
GBE5
GBE6
GBE7
GCOAST
36
29
52
72
86
10 4
12 3
14 0
17 1
20 8
[P.2]
GVS
GH SSOG
G FBK
GBE[0. .7]
GCLK
GPEN
GVS
GHSSOG
GFBK
0
1
2
3
4
5
6
7
8
[P.2]
31
34
32
33
35
TP61
VDDQ3
VDDQ3
VDDQ3
VDDQ3
VDDQ3
VDDQ3
VDDQ3
VDDQ3
VDDQ3
[P.2]
[P.2]
[P.2]
[P.2]
GC LK
3.3K
3.3K
R6 3
[P.2]
A1
A2
A3
A4
A5
A6
A7
A8
A9
A1 0
A1 1
A1 2
A1 3
A1 4
A1 5
A1 6
A1 7
A1 8
A1 9
R59
3.3K
VCPU 33 VCPU 33 VCPU3 3 VCP U33
R6 1
2
SDA
Q8
B SN20
1
2
3
4
NC
NC
NC
GND
R1 2
1
3 3
Q7
BSN20
[P.1]
SCL_CPU
VCC
WP
SCL
SDA
R6 2
2
SCL
U1 1
8
7
6
5
1
[P.1]
C5 4
0.1U K
Q6
B SN20
Q5
B SN20
3.3K
3.3K
1
VCP U33
R1 1
V3 3
R58
R57
V3 3
VCP U18
C62
C63
C64
C65
C66
C6 7
C6 8
C69
C70
C71
C72
C73
C7 4
C75
C76
0.1U K
0.1U K
0 .1U K
0.1U K
0.1U K
0.1U K
0.1U K
0 .1U K
0.1U K
0.1U K
0 .1U K
0 .1U K
0.1U K
0.1U K
0 .1U K
Dis play Port
DCL KR
C5 6
22P J
[P.5]
DC LK
DCLK
DCLKNEG
DVS
DH S
DEN
10 6
107
10 8
109
110
DR0
DR1
DR2
DR3
DR4
DR5
DR6
DR7
103
102
101
100
99
98
97
96
DR 0
DR 1
DR 2
DR 3
DR 4
DR 5
DR 6
DR 7
95
94
93
92
91
90
89
88
DG0
DG1
DG2
DG3
DG4
DG5
DG6
DG7
DG[ 0..7]
DG0
DG1
DG2
DG3
DG4
DG5
DG6
DG7
83
82
81
80
79
78
77
76
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB [0..7]
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
136
135
134
133
132
131
130
129
DG
DG
DG
DG
DG
DG
DG
DG
R0
R1
R2
R3
R4
R5
R6
R7
DGR[ 0..7]
DGR0
DGR1
DGR2
DGR3
DGR4
DGR5
DGR6
DGR7
128
127
126
125
122
121
120
119
DG
DG
DG
DG
DG
DG
DG
DG
G0
G1
G2
G3
G4
G5
G6
G7
D GG[0..7 ]
DGG0
DGG1
DGG2
DGG3
DGG4
DGG5
DGG6
DGG7
118
117
116
115
114
113
112
111
DG
DG
DG
DG
DG
DG
DG
DG
B0
B1
B2
B3
B4
B5
B6
B7
D GB[0..7]
DGB0
DGB1
DGB2
DGB3
DGB4
DGB5
DGB6
DGB7
RVS
RH S
RD E
DC LK
[P.5]
RVS
[P.5]
RH S
[P.5]
RD E
DR[0.. 7]
[P.5]
[P.5]
[P.5]
[P.5]
[P.5]
[P.5]
PC BOARD INTERFACE - INTERFACE PC BOARD - SCHALTBILD PC BOARD - SCHEMA DELLA PC BOARD INTERFAZ PC BOARD
( PC BOARD 5/7)
DC LK
RVS
RH S
RD E
R73
R74
600 OHM
600 OHM
R75
600 OHM
R 142
0
DCL K15
R 143
0
DCL K20
15"
J9
DR
DR
DR
DR
DR
DR
DR
DR
6
5
4
3
4
4
3
4
3
2
1
4
3
5
6
7
8
5
6
7
8
DG
DG
DG
DG
DG
DG
DG
DG
CN 19
22 P
5
6
7
8
5
6
D BE0
D BE1
D BE2
D BE3
D BE4
D BE5
D BE6
D BE7
4
3
2
1
4
8
7
6
5
8
7
6
5
3
1
2
47
3
4
RN
17
1
2
47
3
4
RN 18
1
DR 0
DR 1
DR 2
DR 3
DR 4
DR 5
DR 6
DR 7
7
8
CN 18
22 P
2
DR[0. .7]
[P.4]
E0
E1
E2
E3
E4
E5
E6
E7
4
3
2
1
4
8
7
6
5
8
7
6
5
3
1
2
47
3
4
RN
15
1
2
47
3
4
RN 16
E0
E1
E2
E3
E4
E5
E6
E7
CN 16
22 P
1
DG0
DG1
DG2
DG3
DG4
DG5
DG6
DG7
CN 20
22 P
5
6
7
8
5
6
7
CN 21
22 P
8
DB O4
DB O5
DB O6
DB O7
TP7 9
TP8 1
TP8 3
TP8 5
DG
DG
DG
DG
O0
O1
O2
O3
TP8 7
TP8 9
TP9 1
TP9 3
DG
DG
DG
DG
O4
O5
O6
O7
TP9 5
TP9 7
TP9 9
TP101
DR
DR
DR
DR
O0
O1
O2
O3
TP103
TP105
TP107
TP109
DR
DR
DR
DR
O4
O5
O6
O7
TP111
TP112
TP113
TP114
DCL K15
TP115
DE N
TP116
J1 0
D BE0
D BE1
D BE2
D BE3
TP66
TP67
TP69
TP70
D BE4
D BE5
D BE6
D BE7
TP72
TP74
TP76
TP78
DG
DG
DG
DG
E0
E1
E2
E3
TP80
TP82
TP84
TP86
DG
DG
DG
DG
E4
E5
E6
E7
TP88
TP90
TP92
TP94
DR
DR
DR
DR
E0
E1
E2
E3
TP96
TP98
TP10 0
TP10 2
DR
DR
DR
DR
E4
E5
E6
E7
TP10
TP10
TP10
TP11
4
6
8
0
D BE0
D BE1
D BE2
D BE3
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
D BE4
D BE5
D BE6
D BE7
DG
DG
DG
DG
E0
E1
E2
E3
DG
DG
DG
DG
E4
E5
E6
E7
DR
DR
DR
DR
E0
E1
E2
E3
DR
DR
DR
DR
E4
E5
E6
E7
DCL K2 0
CON3 0P
DE N
DVS
DH S
TP20 1
VC C
20K 004904 0
5
6
7
2
DR
DR
DR
DR
DR
DR
DR
DR
8
7
6
5
8
7
6
5
2
DG[ 0..7]
TP7 1
TP7 3
TP7 5
TP7 7
5
6
3
2
1
8
1
Second Pixel
CN 17
22 P
[P.4]
DB O0
DB O1
DB O2
DB O3
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
20L2 04305 0
CN 14
22 P
4
3
2
1
1
2
47
3
4
1 RN 13
2
47
3
4
RN 14
2
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
1
[P.4]
7
8
5
4
DB O0
DB O1
DB O2
DB O3
DB O4
DB O5
DB O6
DB O7
8
7
6
5
8
7
6
5
C N15
22 P
DB[0 ..7]
O0
O1
O2
O3
O4
O5
O6
O7
CN 12
22 P
5
1
2
47
3
4
1 RN 11
2
47
3
4
RN 12
6
R0
R1
R2
R3
R4
R5
R6
R7
8
DG
DG
DG
DG
DG
DG
DG
DG
3
1
DGR[ 0..7]
2
1
4
3
DG
DG
DG
DG
DG
DG
DG
DG
C N13
22 P
[P.4]
O0
O1
O2
O3
O4
O5
O6
O7
CN 10
22 P
8
7
6
5
8
7
6
5
6
1
2
47
3
4
RN9
1
2
47
3
4
RN 10
2
1
G0
G1
G2
G3
G4
G5
G6
G7
8
SWAPRGB:
Display Data Swap
RGB Or der.
When SWA PBO=1,
RGB will be BGR.
DG
DG
DG
DG
DG
DG
DG
DG
7
[P.4]
7
8
5
6
8
7
6
5
8
7
6
5
7
1
2
47
3
4
1 RN7
2
47
3
4
RN8
8
B0
B1
B2
B3
B4
B5
B6
B7
J2 0
TP200
TP6 8
DG
DG
DG
DG
DG
DG
DG
DG
20"
V33
C7 9
22P
OPE N
C N11
22 P
D GG[0..7 ]
LCD03B
First issue 10 / 03
TP64
TP65
First Pixel
D GB[0..7]
SWAPEO:
Display D ata Swap
Even Odd Pixels.
When SW APEO=0,
DR, DG, DB : First Pixels
C78
22P
OPE N
C7 7
22 P
O PEN
SWAPEO:
[P.4]
Display Data Swap
Even Odd Pixels.
When SWAPEO=1,
the even and odd pixel
data will be swapped
at the pac kage pins.
DGR, DGG, DGB : First Pixels
DR, DG, DB : Second Pixels
20"
DC LK
DVS
DH S
DE N
2
SWAPRGB:
Display Data Swap
RGB Or der.
When SWA PBO=1,
RGB will be BGR.
[P.4]
[P.4]
[P.4]
[P.4]
7
15"
PC BOARD INTERFACE - INTERFACE PC BOARD - SCHALTBILD PC BOARD - SCHEMA DELLA PC BOARD INTERFAZ PC BOARD
( PC BOARD 6/7)
+9 V
R7 6 2 2
1
2
C8 0 +
10 U
16 V
[P.1]
[P.1]
[P.1]
[P.1]
[P.1]
RI 2
RI 1
LI1
LI2
LI3
LI4
C8 2
C8 3
C8 4
C8 5
C8 6
C8 8
C 135
0.47U Z
16 V
0 .47U Z
16 V
0 .47U Z
16 V
0 .47U Z
16 V
0 .47U Z
16 V
0 .47U Z
16 V
0 .47U Z
16 V
0.47U Z
16 V
1
R _IN 3
R_IN 4
28
2
R _IN 2
LOUT
27
L_OUT
ROUT
26
R _OUT
AGN D
25
Vs
24
4
L_IN 1
5
L_IN 2
6
L_IN 3
CREF
23
7
L_IN 4
SDA
22
SDA_5V
[P.4]
8
MUXOUTL
SCL
21
SCL_5V
[P.4]
9
IN_L
DIG_GN D
20
MUXOUTR
TREBLER
19
IN_R
TREBLEL
18
C96
C97
5600P K
50 V
5600P K
50 V
C92
C95
2.2 U Z 11
16 V
0.1U K 12
C99
0.1U K 13
10
14
C 101
0 .1U K
U1 3
TDA7440 D
BIN R
NC1
17
BOUTR
NC2
16
BOUTL
15
BIN L
I2C Add
C1 05 0 .1U K
LCD03B
First issue 10 / 03
470
R _IN 1
2.2 U Z
16 V
R8 1
5.6K
470
R78
3
C89
R79
5.6K
R77
r:
0x88
R 122
470
R 123
470
C 132
10 U 16V
1
2
+
[P.1]
RI 3
C 134
0.1U K
C8 7 1
10 U 16V
2
1
+
[P.1]
RI 4
+
[P.1]
C8 1
2
C 133
10 U 16V
R1 24
10K
R1 25
10K
AUD IO_L_OUT
[P.7]
AUDIO_ R_OUT
[P.7]
AU DIO_L_Line
[P.1]
AUDIO _R_Line
[P.1]
PC BOARD INTERFACE - INTERFACE PC BOARD - SCHALTBILD PC BOARD - SCHEMA DELLA PC BOARD INTERFAZ PC BOARD
( PC BOARD 7/7)
+19 V
VCC
+5VS
+12V
+12V +5VS
VC C
+19 V
J1 1
AU DIO_L_OUT
14
15
16
17
18
19
AUDIO_ R_OUT
U16
+5VS
3
20
C 142
C1 43
C1 44
220P J 220P J 22 0P J 220P J 220P J
C1 45
C 146
C 147
+
C 149
220P J 220P J 220P J 22 0P J
C1 50
C1 51
C 152
3
C 153
22 0P J 220P J 220P J 220P J 220P J
VI N
C 115
VOUT
R83
681F
J12
TP2 3
3
RT2
RT1
1
R84
301F
1
TP24
2
1
2
3
1
C 119
LCD03B
First issue 10 / 03
C 114
47U
16 V
C 116
C 118
47U
16 V
C 120
0.1U K
+ C1 17
10U
16 V
VI N
VOUT
2
+
LD1117-3. 3
2
0.1U K
0.1U K
V33
U18
VC C
+
2
EMI)
+12 V
C 113
1
(For
2
(For EMI)
C 111
47U
16 V
2
LM317 M
0.1U K
0.1U K
VCPU1 8
U17
C 148
C 110
2
GND
C 141
VOUT
LD1117-3. 3
0.1U K
C 108
47U
16 V
VCPU3 3
VI N
C 112
2072 06021 0
C 140
1
13
+
7809 ABD2 T
2
12
C 109
0.33U Z
1
11
GND
10
3
2
MUTE
9
VO
GND
[P.6]
TP12 6
8
+9V
VI
1
[P.6]
PWR _ON
7
t
[P.4]
TP12 5
6
2
[P.3]
5
U15
1
1
TP12 4
4
[P.4]
+12 V
1
TP12 3
3
L CD_BR
2
TP12 2
TP120
2
GND
1
TP12 1
1
TP11 9
L CD_ON
t
[P.4]
0.1U K
PC BOARD INTERFACE - INTERFACE PC BOARD - SCHALTBILD PC BOARD - SCHEMA DELLA PC BOARD INTERFAZ PC BOARD
( PC BOARD 1/7, 20”BI)
2
1
2
RED_ IN
1
*2
R9
C3
R1 0
C4
BL UE_I N
[P. 2]
C5
75
47P
50 V J
75
47P
50 V J
47P
50 V J
3
1
*2
[P. 1]
VY_I N
4
2
2
1
1 1
1
*2
0
[P. 4]
[P.
[P.
[P.
[P.
1
GSCL
GSDA
8
VCC
A0
1
7
WP
A1
2
0.1U K
6
SCL
A2
3
5
SDA
GND
4
C1 0
0.1U K
C1+
V+
C1C2+
C2VT2OUT
R2IN
16
15
14
13
12
11
10
9
VCC
GND
T1OUT
R1IN
R1OUT
T1IN
T2IN
R2OUT
4]
VVS
4]
VHS
4] VPEN
4] VFI EL D
[P .4 ]
UART_R X
UAR T_TX
RX
TX D
RX
TX D
[P. 4]
[P. 4]
GV0
GV1
GV2
GV3
GV[0 ..7]
OPEN
1
2
3
4
5
6
7
8
C6
C137
100P
C138
100P
C139
100P
0.1U K
0.1U K
C1 1
GV4
GV5
GV6
GV7
SP232 EC N
[P .4 ]
BU 0
BU 1
BU 2
BU 3
BU [0..7]
BU 4
BU 5
BU 6
BU 7
AT2 4C02A
[P. 4]
RY
RY
RY
RY
RY[0..7 ]
[P .7 ] +12V
S crew Holes
[P .7 ]
+5VS
[P .7 ]
VCC
[P .7 ]
4
3
7
2
6
9
5
8
4
3
7
2
6
9
5
8
4
3
7
2
6
1
5
8
1
9
1
4
1
5
8
3
2
2
D1 8
+9V
0
1
2
3
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
GF80
9
3
Audio Line ou t(2210165031)
[P. 1]
VCLK
C136
0.1U K
1N4148
U2
2
4
5
J5
[P. 2]
[P. 2]
47
47
0.1U K
VB _GND
OPEN
C8
2
4
5
MM1031X MR
OPEN
2
C7
D1 7
7
6
1
4
2
2
D7
D2
4.7K
[P. 1]
VB _IN
OPEN
1 1
D1 6
2
3
2
1
2
2
BLU E_IN
C131
1000 P J 1000 P J
GND
C9
4.7K
[P. 1]
R120
75
VCC
U1
R1 6
VY_GND
C130
7
6
1
TZMC5V1
2
0
U2 6
1N4148
R1 5
600 OHM
[P. 6]
OP5V
C126
0.1U K
RG B_VS
RG B_HS
PC _5V
Audio _R_Line
D1 5
R139
1K
1K
DN9
BAV99
3
600 OHM
R8 8
TZMC5V1
D8
TZMC5V1
27V
D6
TZMC5V1
D2 2
R8 7
TZMC5V1
27V
D1
1
D1 4
Audio_L_Line
TZMC5V1
17
D2 1
TZMC5V1
D2 3
TZMC5V1
PC _5V
83.27R03.036
+5VS
8
7
2
6
H2
H3
H4
H5
HO LE-V 8
HO LE-V 8
HO LE-V 8
HO LE-V 8
HO LE-V 8
PC BOA
48.M 2305 .A00
onday, September 08, 2003
9
3
H1
LCD03B
First issue 10 / 03
.6 ]
10K 10K
[P. 6]
MM1031X MR
+5VS
6
R7[P
R6
D1 3
2
[P. 1]
R115
75
VCC
+5VS
2
LI3
RI 3
J1
GREEN_ IN
R1 4
R1 3
7
1K
OP5V
C125
0.1U K
U2 5
75
VR_GND
[P. 2]
R140
3
R3
D1 2
2
0
R138
GREEN_ IN
2
R8
2
[P. 2]
RED_ IN
1 1
47
1
16V
1
16V
1
16V
2
R5
2
2
TP 8
2
1 1
B1
TP 9
C121
10 U
C122
10 U
C123
10 U
D5
2
3
2
47
27V
1
D1 1
4
47
R4
D2 0
4
C2
C1
1K
1000 P J1000 P J
[P. 1]
VR _IN
2
R2
TP 6
27V
5
R8 6
600 OHM
TP 4
R1
TZMC5V1
3
R8 5
R110
75
VCC
GND
DN8
BAV99
3
2
4
5
[P .6 ]
600 OHM
TP 2
2210165031
U2 4
D-Sub15
R136
R137
2
4
5
VB _IN
3
C124
0.1U K
C9 0
47U
16V
2
+
7
6
1
1 1
NC_R0603
7
6
1
TZMC5V1
15
VY_I N
OP5V
1
2
1
R529
BLU E_IN
J2
VR _IN
TZMC5V1
1
NC_R0603
TZMC5V1
16
D9
TZMC5V1
GSCL
TP 3
+
14
R1
G1
+
13
TP 11
NC_R0603
R528
MM1031X MR
6
1
7
2
8
3
9
4
10
5
12
TP 10
DN3
BAV99
3
R527
GREEN_ IN
GND
+
GSDA
TP 7
DN2
BAV99
3
R2 3
15 0
RED_ IN
J3
11
TP 5
2
DN1
BAV99
3
1
2
R2 2
15 0
OP5V
1 1
+9V
+5VS
Optical Points
OP1
OP
OP2
OP
OP3
OP
OP4
OP
OP5
OP
OP6
OP
OP7
OP
OP8
OP
OP9
OP
OP10
OP
OP11
OP
OP12
OP
OP13
OP
OP14
OP
OP15
OP
OP16
OP
GF-80Pin
VY_I N
VY_GND
VB _IN
VB _GND
VR _IN
VR _GND
RI 1
LI1
RI 2
LI2
RI 4
LI4
INPUT_D ET
AV_ DET
TV_DET
RY
RY
RY
RY
[P.
[P.
[P.
[P.
[P.
[P.
1]
1]
1]
1]
1]
1]
[P.
[P.
[P.
[P.
[P.
[P.
6]
6]
6]
6]
6]
6]
[P. 3]
[P. 3]
[P. 3]
SDA
SC L
[P. 4]
[P. 4]
DEC OE
POR TB3
VIDE O_RESET
AV_SEL
CVBS_SEL
[P.
[P.
[P.
[P.
[P.
4
5
6
7
RY[0..7 ]
+12V [P
+5VS
.7 ]
[P .7 ]
VCC
[P .7 ]
+9V
[P .7 ]
3]
4]
4]
4]
4]
[P .4 ]
PC BOARD INTERFACE - INTERFACE PC BOARD - SCHALTBILD PC BOARD - SCHEMA DELLA PC BOARD INTERFAZ PC BOARD
( PC BOARD 2/7, 20”BI)
[P. 4]
[P. 1]
[P. 1]
U2 0 74LVC1 G126
5
VCC
PC_ AV
1
OE
RG B_HS
2
A
3
GND
1
U2 1 74LVC1 G126
5
VCC
OE
2
A
3
GND
RG B_VS
VD33
R1 7
R1 8
R1 9
4
Y
C1 2
.039U
16 V K
47
47
C1 3
PV DD
3900P
50 V K
Trac e and
Components
Close IC
PV DD
AV DD
VD3 3
GVM ID
4
Y
3 .3K
C1 4
5
6
7
8
GB E[0..7 ]
4
3
1
2
6
7
5
4
3
2
1
22P
CN3
[P. 4]
[P. 4]
1
2
GGE [0..7]
3
22P
CN4
8
GGE0
GGE1
GGE2
GGE3
GGE4
GGE5
GGE6
GGE7
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
0.1U K
8
7
6
5
8
7
6
5
7
C1 9
1
2 RN3
3
47
4
1
2 RN4
3
47
4
0
1
2
3
4
5
6
7
4
GVR EF
AD GE
AD GE
AD GE
AD GE
AD GE
AD GE
AD GE
AD GE
6
.047U RA IN
50 V K
0
0
GBE0
GBE1
GBE2
GBE3
GBE4
GBE5
GBE6
GBE7
5
C1 8
R2 0
R2 1
8
8
7
6
5
8
7
6
5
1
[P. 1] RED_ IN
[P. 4] SCL _CPU
[P. 4] SDA_ CP U
I2C Addr: 0x9
1
2 RN1
3
47
4
1
RN2
2
3
47
4
CN2
22P
8
C1 7
U3
AD9 883KST-110
AD BE0
AD BE1
AD BE2
AD BE3
AD BE4
AD BE5
AD BE6
AD BE7
2
.047U
GA IN
50 V K
1000 P J SOG IN
50V
GND
B0
B1
B2
B3
B4
B5
B6
B7
VDD
GND
G0
G1
G2
G3
G4
G5
G6
G7
GND
7
C1 6
GND
VD
BAIN
GND
VD
VD
GND
GAIN
SOGIN
GND
VD
VD
GND
RAIN
A0
SCL
SDA
REF BYPASS
VD
GND
3
[P. 1] GREEN_ IN
BA IN
4
.047U
50 V K
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
6
C1 5
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
5
[P. 1] BLUE _IN
CN1
22P
GND
VD
CLAM P
MIDSCV
GND
PVD
PVD
FIL T
GND
VSYN C
HSYN C
COAST
GND
VD
VD
GND
GND
VD D
VD D
GND
GCOAS T
GND
VD
GND
VSOUT
SOGOUT
HSOUT
DATACK
GND
VD D
R7
R6
R5
R4
R3
R2
R1
R0
VD D
VD D
GND
[P. 4]
8
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
0.1U K
VD3 3
VCPU33
L1
5
6
GRE[0. .7]
4
3
1
4
3
2
GRE0
GRE1
GRE2
GRE3
GRE4
GRE5
GRE6
GRE7
8
7
6
5
478
7
6
5
47
1
[P. 4]
2
1
2 RN5
3
4
1
2 RN6
3
4
1
0
1
2
3
4
5
6
7
2
CN6
22P
CN5
22P
AD RE
AD RE
AD RE
AD RE
AD RE
AD RE
AD RE
AD RE
7
8
5
6
7
8
42 OHM
U4
+ C2 0
10 U
16V
AV DD
+5VS
R2 4
ADVS
R2 5
47
47
GVS
L3
3
42 OHM
VIN
VOUT
2
C2 1
[P. 4]
1
A DHS
[P. 4]
GCL K
[P. 4]
GFBK
30 OHM
GND
L4
LD1117-3. 3
+
1
A DCK
0.1U K
C2 3
22 P J
C2 7
C2 4
22 P J
C2 5
22P
OPEN
2
VD33
C2 6
22P
OPEN
C2 2
47U
16V
0.1U K
GND
Y
4
5
12
1R
1Q
1Q
9
10
2A
2B
2Q
2Q
11
2R
CX2
RCX2
8
AV DD
13
4
3
GND
74LVC1 G126
14
15
D3
PV DD
+5VS
R2 8
36 0
R2 9
1K
GHSS OG
[P. 4]
3
42 OHM
C2 9
1N4148
VIN
VOUT
2
LD1117-3. 3
D4
1N4148
C3 2
220P
50 V J
6
7
PV DD
C3 3
C3 4
C3 5
C3 6
C3 7
C3 8
C3 9
C4 0
C4 1
C4 2
C4 3
C4 4
C4 5
C4 6
C4 7
C4 8
C4 9
C5 0
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
+
VD3 3
R3 1 221K F
0.1U K
LCD03B
First issue 10 / 03
47K
L6
74LV123PW
VD3 3
1K
U7
R2 7
1
A
1A
1B
CX1
RCX1
C3 1
1U
50V
R3 0
47K
+
2
16
1
2
GND
5
1
3
VCC
VD3 3
1
2
OE
C2 8
220P
50 V J
2
1
MV _E N
R2 6
U5
VC C
[P. 4]
ADS OG
VD33
U6
48.M 2305 .A00
20L0BI
PC BOA RD
onday, September 08, 2003
C3 0
47U
16V
PC BOARD INTERFACE - INTERFACE PC BOARD - SCHALTBILD PC BOARD - SCHEMA DELLA PC BOARD INTERFAZ PC BOARD
( PC BOARD 3/7, 20”BI)
D[0..15]
VCPU33
[P. 4]
VCPU33
R3 4
1
LED1_SEL
10K
R4 2
1K
IRRCVR_3V
LED2_SEL
R3 9
47 0
R4 3
[P .4 ]
R4 1
[P. 3]
Q4
2N3904
R4 4
1K
VCPU33
10K
10K
J6
C5 2
0.1U K
5
6
7
5
8
6
12
11
10
9
8
7
6
5
4
3
2
1
TP 59
4
3
2
J8
TP 47
TP 49
TP 50
TP 51
TP 53
TP 54
TP 55
TP 56
TP 57
TP 58
TP 48
20L2021012
CN9
22P
1
1
10
10K
10K
10K
10K
10K
10K
74A HC244
CN8
22P
4
CS0n
10K
VCPU33
CS0n
R5 3
1
19
KPD6
TP 60
R5 2
1G
2G
KPD0
KPD1
KPD2
KPD3
KPD4
KPD5
KPD6
FAN_DET
R5 1
2
4
6
8
11
13
15
17
R5 0
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
R4 9
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
LED1
LED2
IRRC VR
KPD0
KPD1
KPD2
KPD3
KPD4
KPD5
KPD[0..6]
R4 8
18
16
14
12
9
7
5
3
VC C
D0
D1
D2
D3
D4
D5
D6
D7
U9
R4 7
VCPU33
10K
10K
20
3.3K
Q3
2N3904
R4 0
GND
3.3K
CN7
22P
R3 8
1K
FCEn
R4 6
Q2
2N3906
+5VS
R3 7
[P. 3]
AT 49BV8192A(T)
R4 5
R3 5
1K
7
46
27
2N3904
2N3906
R3 6
1K
3
GND
GND
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
2
29
31
33
35
38
40
42
44
30
32
34
36
39
41
43
45
8
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
2
8
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
37
42 OHM
L8
Q1
2N3906
+5VS
7
25
24
23
22
21
20
19
18
8
7
6
5
4
3
2
1
48
17
16
VCC
3
1
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
13
2
FWPn
VPP
6
0
CE
OE
WE
RP
WP
BYTE
5
R3 3
26
28
11
12
14
47
3
[P. 4] ROMOEn
[P. 4] ROMWEn
[P. 4] RESETn
U8
R3 2
4
OPEN
+5VS
C5 1
0.1U K
1
2
RESETn
[P. 4]
20L1023060
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
2
4
6
8
11
13
15
17
1G
2G
1
19
R5 6
3.3K
R5 5
3.3K
R5 4
3.3K
20
D7
D6
D13
D12
U 10
R141
VCPU33
[P. 4]
CS0n
VCPU33
NC_R0603
D8
D9
D10
D11
D12
D13
D14
D15
[P. 4]
[P. 4]
A[1..19]
R531
NC_R0603
U 27
NMI
R530
C361
74A HC244
D11
D10
D1
D0
[P. 1]
[P. 1]
[P. 1]
AV_DET
INPUT_DET
TV_DET
OPEN
CS1n
[P. 4]
R142
VCPU33
3
4
7
8
13
14
17
18
D1
D2
D3
D4
D5
D6
D7
D8
11
CLK
1
CLR
10K
C359
VCPU33
+
C 362
10U
16V
0.1U K
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
2
5
6
9
12
15
16
19
MUTE
[P. 7]
VIDEO_RESET
PORTB3
MV_EN
PC_AV
AV_SEL
CVBS_SEL
[P.
[P.
[P.
[P.
[P.
[P.
VCPU33
R126
11
CLK
1
CLR
10K
+
LCD03B
First issue 10 / 03
C 360
10U
16V
VC C
20
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
2
5
6
9
12
15
16
19
GND
[P. 4]
CS1n
D1
D2
D3
D4
D5
D6
D7
D8
10
U 22
3
4
7
8
13
14
17
18
74LVC 273
1]
1]
2]
2]
1]
1]
NC_R0603
Q 13_N C
2N3904
48.M 2305 .A00
PC BOARD
74LVC 273
0.1U K
D0
D1
D2
D3
D4
D5
D6
D7
LCD_ON [P
R532
2
D3
D2
D9
D8
ROMWEn
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
20
D5
D4
A13
A15
A16
A18
18
16
14
12
9
7
5
3
VC C
[P. 4]
D15
D14
D8
D9
D10
D11
D12
D13
D14
D15
GND
ROMOEn
C5 3
0.1U K
10
A17
A19
A1
A3
A5
A7
A8
A10
VC C
A12
A14
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
GND
CONN ML 60P D1.27 ST AMP/104549
A9
A11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
10
59
60
VCPU33
A2
A4
A6
[P. 1]
7]
3]
3]
DECOE
[P.
PWR_ON
[P.
LED1_SEL
[P.
LED2_SEL
C553
2.2U K
16V
.7 ]
PC BOARD INTERFACE - INTERFACE PC BOARD - SCHALTBILD PC BOARD - SCHEMA DELLA PC BOARD INTERFAZ PC BOARD
( PC BOARD 4/7, 20”BI)
VCPU33
VCPU33
1
2
Q8
BSN 20
3
1
2
3
4
A0
A1
A2
GND
R ES ETn
[P. 3]
AT 24C32AN-10SI-2.7
2
3
VCC
WP
SCL
SDA
VCPU33
SDA_ CP U
[P. 2] SCL _CPU
[P. 2] SDA _CPU
VCPU33
R6 1
VCPU33
VCPU33
R6 0
0 RP TR 11 142
R ES ETn
139
10 0 EXTRSTEN 28
GGE0
GGE1
GGE2
GGE3
GGE4
GGE5
GGE6
GGE7
10
11
12
13
14
15
18
19
GGE0
GGE1
GGE2
GGE3
GGE4
GGE5
GGE6
GGE7
GRE0
GRE1
GRE2
GRE3
GRE4
GRE5
GRE6
GRE7
20
21
22
23
24
25
26
27
GRE0
GRE1
GRE2
GRE3
GRE4
GRE5
GRE6
GRE7
71
74
75
69
70
VCLK
VVS
VHS
VFIELD
VPEN
47
48
49
50
51
54
55
56
VYUV0
VYUV1
VYUV2
VYUV3
VYUV4
VYUV5
VYUV6
VYUV7
Trace an
3
3
3.3K
3.3K
[P. 1]
1.5M
193
NMI
169
170
XI
XO
X608
RD
WR
ROMOE
ROMWE
CS0
CS1
195
194
196
197
198
199
[P. 1]
C5 9
18P
50 V J
RDn
WR n
95
94
93
92
91
90
89
88
DG0
DG1
DG2
DG3
DG4
DG5
DG6
DG7
DG [0..7]
DG0
DG1
DG2
DG3
DG4
DG5
DG6
DG7
83
82
81
80
79
78
77
76
DB 0
DB 1
DB 2
DB 3
DB 4
DB 5
DB 6
DB 7
DB [0..7]
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
136
135
134
133
132
131
130
129
DG
DG
DG
DG
DG
DG
DG
DG
DG R[0 ..7]
DGR0
DGR1
DGR2
DGR3
DGR4
DGR5
DGR6
DGR7
128
127
126
125
122
121
120
119
DGG0
DGG1
DGG2
DGG3
DGG4
DGG5
DGG6
DGG7
DGG[0. .7]
DGG0
DGG1
DGG2
DGG3
DGG4
DGG5
DGG6
DGG7
118
117
116
115
114
113
112
111
DGB0
DGB1
DGB2
DGB3
DGB4
DGB5
DGB6
DGB7
DGB[0. .7]
DGB0
DGB1
DGB2
DGB3
DGB4
DGB5
DGB6
DGB7
Display Port
CS 0n
CS 1n
.3
.3
.3
.3
]
]
]
]
PW113
U12E
BU [0..7]
RY[0..7 ]
VSSPA1
BU 0
BU 1
BU 2
BU 3
BU 4
BU 5
BU 6
BU 7
39
40
41
42
43
44
45
46
RY
RY
RY
RY
RY
RY
RY
RY
57
58
59
60
61
62
63
64
0
1
2
3
4
5
6
7
PORTC0
PORTC1
PORTC2
PORTC3
PORTC4
PORTC5
PORTC6
PORTC7
PORTB0
PORTB1
PORTB2
PORTB3
PORTB4
PORTB5
PORTB6
PORTB7
30 OHM
RVS
RHS
RDE
R0
R1
R2
R3
R4
R5
R6
R7
DC LK
[P .5 ]
.5 ]
.5 ]
RV S
[P
RHS
[P
RDE
DR[0. .7]
[P .5 ]
[P .5 ]
[P .5 ]
[P .5 ]
[P .5 ]
[P .5 ]
L2
42 OHM
L5
42 OHM
L7
NC _L1206
C8 0
470P K
PW113
2 SDA_ CP U
EMI solution
[P. 1]
VCPU33
LCD03B
First issue 10 / 03
DR0
DR1
DR2
DR3
DR4
DR5
DR6
DR7
TP 62
TP 63
ROM OE n [P
ROM WE n[P
[P
CS0 n
[P
CS1 n
VCPU18
C6 2
C6 3
C6 4
C6 5
C6 6
C6 7
C6 8
C6 9
C7 0
C7 1
C7 2
C7 3
C7 4
C7 5
C7 6
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
[P .5 ]
103
102
101
100
99
98
97
96
PW113
D[0..15]
DC LK
DR0
DR1
DR2
DR3
DR4
DR5
DR6
DR7
U12B
[P. 3]
L1 0
106
107
108
109
110
168
0
1
2
3
4
5
6
7
8
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D1 0
D1 1
D1 2
D1 3
D1 4
D1 5
[P. 3]
C5 6
22 P J
DCLK
DCLKNEG
DVS
DHS
DEN
net: UV
Power and Ground
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
17
38
66
85
138
186
1
Q12
BSN 20
R6 7
old
1
30
53
73
87
105
124
141
172
1
1
R6 9
R7 1
3.3K
SCL _CPU
2
3.3K
1
2
TRST
TCK
TMS
TDI
TDO
C5 8
14.318M HZ
18P
50 V J
0.1U K
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
PW11 3
Mi sc
A[1 ..19]
GPO Port
SD A_5V
3 3
147
146
145
144
143
X607
0.1U K
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
U 12C
Y1
C6 1
VCPU33
Q10
BSN 20
Q11
BSN 20
PORTA0
PORTA1
PORTA2
PORTA3
PORTA4
PORTA5
PORTA6
PORTA7
RXD
TXD
L12
C6 0
VCPU33
2
SCL_5V
207
206
205
204
203
202
201
200
16
37
65
84
137
185
PW113 U12A
Graphics and
Video Port
U 12D PW113
[P. 1]
SDA_ CP U
SCL _CPU
SDA2
SC L2
IRRCVR_3V
IN T
GP IOA6
PW M_ BR
NM I
d Components Close IC
L11
VCC
Q9
BSN 20
0
OPEN
10K
VCPU18
GV[0 ..7]
VCC
R129
R130
R6 6
[P. 3]
VSSPA2
Y
67
68
C5 7
2.2U K
16V
166
old net:
GV0
GV1
GV2
GV3
GV4
GV5
GV6
GV7
IRRCVR_3V
TV_DET
L CD_ON
L CD_BR
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
[P. 1]
GBE0
GBE1
GBE2
GBE3
GBE4
GBE5
GBE6
GBE7
VCLK
VVS
VHS
VFI EL D
VPEN
TP 12
TP 13
3]
1]
7]
7]
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
TESTEN
RESET
EXTRSTEN
RX D
TX D
10K
R6 5
42 OH M
1]
1]
1]
1]
1]
2
3
4
5
6
7
8
9
47 0
[P. 2]
[P.
[P.
[P.
[P.
GBE0
GBE1
GBE2
GBE3
GBE4
GBE5
GBE6
GBE7
R6 4
RX
TX D
GCOAS T
42 OH M
[P.
[P.
[P.
[P.
[P.
36
[P. 1]
[P. 1]
V DDPA3
VDDPD3
[P. 2] GRE[0. .7]
GCOAST
167
165
[P. 2] GGE [0..7]
GCLK
GPEN
GVS
GHSSOG
GFBK
VDDPA1_1.8V
VDDPA2_1.8V
TP 61
29
52
72
86
104
123
140
171
208
GCL K
2]
GVS
2]
GHSS OG
2]
GFBK
2] GB E[0..7 ]
VDDQ30
VDDQ31
VDDQ32
VDDQ33
VDDQ34
VDDQ35
VDDQ36
VDDQ37
VDDQ38
[P.
[P.
[P.
[P.
31
34
32
33
35
3.3K
3.3K
R6 3
[P. 2]
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
192
191
190
189
188
187
184
183
182
181
180
179
178
177
176
175
174
173
164
R5 9
3.3K
VCPU33
R1 2
1
Q7
BSN 20
[P. 1] SD A
8
7
6
5
SCL _CPU
2
DCLK_L
1
3 3
2
C5 5
22 P J
U1 1
R1 1
[P. 1] SC L
C5 4
0.1U K
Q6
BSN 20
Q5
BSN 20
3.3K
3.3K
1
V33
R6 2
R5 8
V33
R5 7
V33
PC BOA RD
20L0BI
48.M 2305 .A00
PC BOARD INTERFACE - INTERFACE PC BOARD - SCHALTBILD PC BOARD - SCHEMA DELLA PC BOARD INTERFAZ PC BOARD
( PC BOARD 5/7, 20”BI)
DC LK
RV S
RHS
RDE
C7 9
22P
O PEN
DR O0
DR O1
DR O2
DR O3
DR O4
DR O5
DR O6
DR O7
6
5
4
3
5
6
4
3
2
1
DBO0
DBO1
DBO2
DBO3
DBO4
DBO5
DBO6
DBO7
TP 87
TP 89
TP 91
TP 93
DGO4
DGO5
DGO6
DGO7
TP 95
TP 97
TP 99
TP 10 1
DR O0
DR O1
DR O2
DR O3
TP 10 3
TP 10 5
TP 10 7
TP 10 9
DR O4
DR O5
DR O6
DR O7
TP 11 1
TP 11 2
TP 11 3
TP 11 4
TP 80
TP 82
TP 84
TP 86
DGE4
DGE5
DGE6
DGE7
TP 88
TP 90
TP 92
TP 94
DR E0
DR E1
DR E2
DR E3
TP 96
TP 98
TP 10 0
TP 10 2
DR E4
DR E5
DR E6
DR E7
TP 10 4
TP 10 6
TP 10 8
TP 11 0
CON30P(O PEN )
DGE0
DGE1
DGE2
DGE3
DGE4
DGE5
DGE6
DGE7
DR E0
DR E1
DR E2
DR E3
DR E4
DR E5
DR E6
DR E7
DC LK
DEN
DVS
DHS
TP 20 1
VCC
20K0049 040(OPEN)
4
DC LK
TP 11 5
C 363
22 P J
EMI solution,
close to J2
0
4
3
2
5
6
7
8
4
3
2
1
3
4
5
6
7
8
5
6
7
8
DBE0
DBE1
DBE2
DBE3
DBE4
DBE5
DBE6
DBE7
4
3
2
1
4
8
7
6
5
8
7
6
5
3
1
2
47
3
4
1 RN 17
2
47
3
4
RN 18
TP 11 6
DGE0
DGE1
DGE2
DGE3
DBE4
DBE5
DBE6
DBE7
PC BOA RD
CN 18
22P
2
DR0
DR1
DR2
DR3
DR4
DR5
DR6
DR7
DEN
TP 72
TP 74
TP 76
TP 78
DBE0
DBE1
DBE2
DBE3
DGE0
DGE1
DGE2
DGE3
DGE4
DGE5
DGE6
DGE7
8
7
6
5
8
7
6
5
CN 20
22P
5
6
7
8
5
6
7
8
CN 21
22P
LCD03B
First issue 10 / 03
DGO0
DGO1
DGO2
DGO3
DBE4
DBE5
DBE6
DBE7
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
5
6
3
2
1
1
3
4
5
6
7
8
1
2
47
3
4
1 RN 15
2
47
3
4
RN 16
1
DR[0. .7]
TP 79
TP 81
TP 83
TP 85
TP 66
TP 67
TP 69
TP 70
CN 16
22P
1
DG0
DG1
DG2
DG3
DG4
DG5
DG6
DG7
Second Pixel
DR E0
DR E1
DR E2
DR E3
DR E4
DR E5
DR E6
DR E7
CN 19
22P
[P. 4]
DBO4
DBO5
DBO6
DBO7
J10
DBE0
DBE1
DBE2
DBE3
20L2043050
8
7
6
5
8
7
6
5
2
DG [0..7]
TP 71
TP 73
TP 75
TP 77
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
CN 14
22P
4
3
2
1
1
2
47
3
4
RN
13
1
2
47
3
4
RN 14
2
DB 0
DB 1
DB 2
DB 3
DB 4
DB 5
DB 6
DB 7
7
8
5
8
7
6
5
8
7
6
5
6
1
2
47
3
4
RN
11
1
2
47
3
4
RN 12
8
R0
R1
R2
R3
R4
R5
R6
R7
CN 17
22P
[P. 4]
DBO0
DBO1
DBO2
DBO3
TP 22 6
DG
DG
DG
DG
DG
DG
DG
DG
1
[P. 4]
7
8
5
4
3
CN 12
22P
CN 15
22P
DB [0..7]
7
8
DGO0
DGO1
DGO2
DGO3
DGO4
DGO5
DGO6
DGO7
1
DG R[0 ..7]
2
1
4
3
CN 10
22P
8
7
6
5
8
7
6
5
6
1
2
47
3
4
RN9
1
2
47
3
4
RN 10
2
1
DGG0
DGG1
DGG2
DGG3
DGG4
DGG5
DGG6
DGG7
J20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
TP 20 0
First Pixel
8
7
6
5
8
7
6
5
5
1
2
47
3
4
1 RN7
2
47
3
4
RN8
6
DGB0
DGB1
DGB2
DGB3
DGB4
DGB5
DGB6
DGB7
CN 13
22P
[P. 4]
20"
V33
TP 68
8
SWAPRGB:
Display Data Swap
RGB Order.
When SWAPBO=1,
RGB wi ll be BGR.
SWAPEO:
Display Data Swap
Even Odd Pixels.
When SWAPEO=0,
DR, DG, DB : First Pixels
C7 8
22P
O PEN
CN 11
22P
[P. 4]
15"
TP 64
TP 65
J9
8
[P. 4]
DGG[0..7 ]
AU 20"
DC LK
DVS
DHS
DEN
47
47
47
C7 7
22P
O PEN
DGB[0. .7]
SWAPEO:
Display Data Swap
Even Odd Pixels.
When SWAPEO=1,
the even and odd pixel
data will be swapped
at the package pins
.
DGR, DGG, DGB : First Pixels
DR, DG, DB : Second Pixels
R7 3
R7 4
R7 5
7
4]
4]
4]
4]
7
[P.
[P.
[P.
[P.
2
SWAPRGB:
Display Data Swap
RGB Order.
When SWAPBO=1,
RGB will be BGR.
7
15"
48.M 2305 .A00
PC BOARD INTERFACE - INTERFACE PC BOARD - SCHALTBILD PC BOARD - SCHEMA DELLA PC BOARD INTERFAZ PC BOARD
( PC BOARD 6/7, 20”BI)
NOTE:I2C ADDRESS SELECT
C 502
3.3P C
C 501
3.3P C
OPEN
VCC
C 503
56 P J
Y 501
L501
42 OHM
18.432M HZ
R503
4.7K
R504
4.7K
+ C504
100 U
16V
TP501 TP50 2
10 U 16V
50
+
SC4_IN_R
36
NC
SC4_IN_L
35
R534
NC_R0603
LINEOUT_ R
R517
NC_R0603
LINE OUT_ L
R518
CAPL_M
AGNDC
34
AHVSS
33
C535
C 536
1.5N M
C551
RI 1
LI1
[P. 1]
[P. 1]
C515
C516
330 N Z
330 N Z
R509
R510
47 0
47 0
RI 2
LI2
[P. 1]
[P. 1]
C517
C518
330 N Z
330 N Z
R511
R512
47 0
47 0
RI 3
LI3
[P. 1]
[P. 1]
C523
C524
330 N Z
330 N Z
R513
R514
47 0
47 0
RI 4
LI4
[P. 1]
[P. 1]
C525 C526
C533
32
AHVSU P
31
SC1_OUT_L
CAPL_A
30
29
VREF1
SC1_OUT_R
28
27
SC2_OUT_L
26
SC2_OUT_R
25
NC_R0603
DACM_S
DACA_R
DACM_SUB
RESETQ
17
DACM_C
16
47 0
47 0
0.1U K
C540
NC_R0603
R519
47 0
C552
R520
47 0
C549
R524
C529 C530
C531 C532
35V
3.3U
C537
470P K
C538
10 U
16V
L503
42 OHM
+9V
8_3_VOLT
D1 9
1 N 4148
Voltage decreasing 0.7v
10 U 16V
10 U 16V
R525
C548
10K
C544
C543
C545
R516
10 0
R521
10 0
R522
10 0
LINE OUT_ L
R523
10 0
LINEOUT_ R
1000P J
1000P J
10K
1000P J
R7 2
LCD03B
First issue 10 / 03
C527 C528
330P J
ANA1_IN+
51
52
53
55
54
57
56
TP
58
59
NC
60
NC
62
61
63
NC
1000P J
A UDIO_L_OUT
37
R507
R508
330P J
15
38
ASG4
330 N Z
330 N Z
330P J
14
SC3_IN_L
C513
C514
330P J
NC
39
0.1U K
330P J
I2S_DA_IN2
13
40
C512
330P J
12
ASG2
SC3_IN_R
L ow:0x80
High:0x84
Open:0x88
10 U 16V
330P J
DVSS
C509
+
DVSUP
11
MSP 3412G
1000P J
[P. 7]
41
10
1.5N M
+
AU DIO_R_OUT
42
SC2_IN_L
ADR_CL
U501
+
A UDIO _L_Line
[P. 7]
SC2_IN_R
ADR_WS
9
C506
470P K
+
[P. 1]
AUDIO_R_Line
43
8
C505
+
[P. 1]
C539
10 U 16V
44
ASG1
I2S_DA_IN1
ADR_DA
24
R533
SC1_IN_L
6
23
C 534
22U
16V
45
22
+
46
SC1_IN_R
DACM_L
R515
4.7K
VREFTOP
I2S_DA_OUT
21
C 521
220P Z 470P K
1.5N M
I2S_WS
DACM_R
C522
47
20
VCC
C520
48
MONO_IN
DACA_L
+ C519
100 U
16V
49
AVSS
7
L502
42 OHM
C 508
56 P J
AVSUP
VREF2
VCC
ANA2_IN+
5
100P K
TESTEN
4
100P K
ANA_IN -
I2S_SL
C511
XTAL_I N
3
C510
XTAL_OUT
I2C_SDA
AUD_CL_OUT
I2C_CLK
2
D_CTR_I/O_1
1
10 0
D_CTR_I/O_0
10 0
R506
ADR_SEL
NC
R505
SD A_5V
19
[ P.4]
SCL_5V
18
[ P.4]
STANDBYQ
64
C 507
56 P J
330P J
R502
+
10
R501
0
48.M 2305 .A00
20L0BI
PC BOARD
Digital GND
Analog GND
PC BOARD INTERFACE - INTERFACE PC BOARD - SCHALTBILD PC BOARD - SCHEMA DELLA PC BOARD INTERFAZ PC BOARD
( PC BOARD 7/7, 20”BI)
+19V
VCC
+5VS
+12V
+12V +5VS
VCC
+19V
J11
TP 12 1
TP 12 2
TP 12 3
TP 12 4
[P. 3]
TP 12 5
[P. 4]
TP 12 6
PW R_ON
MUTE
[P. 6]
A UDIO_L_O UT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
TP 12 0
L CD_BR
[P. 4]
+12V
CHAN GE C108 P/N to 79.4761D.3A1
1
U1 5
VO
VI
+9V
3
GND
TP 11 9
C109
0.33U Z
+
780 9ABD2T
2
[P. 4]
L CD_ON
C 108
47U
16V
C110
0.1U K
[P. 6]
AU DIO_R_OUT
2072060210
3
+5VS
C142
C143
C144
C145
220P J 220P J 220P J 220P J 220P J
C146
C147
C149
C148
C150
C151
C152
220PJ 220PJ 220PJ 220PJ
220P J 220P J 220P J 220P J
C153
220PJ
U1 6
VIN
C112
0.1U K
(For EMI)
VOUT
2
+
LD1117-3. 3
U1 7
VOUT
2
GND
VIN
1
C115
0.1U K
0.1U K
RT1
LCD03B
First issue 10 / 03
RT2
2
NC
1
t
t
TP 24
2
NC
VIN
VOUT
+
2
C 114
47U
16V
C116
C 118
47U
16V
C120
0.1U K
V33
+
LD1117-3. 3
+12V
2
OPEN
1
0.1U K
+ C117
10 U
16V
GND
C119
U1 8
1
3
VCC
3
C113
VCPU18
R8 3
681F
LM317 M
R8 4
301F
TP 23
C 111
47U
16V
(For EMI)
3
J12
VCPU33
GND
C141
1
C140
1
20L0BI
PC BOA RD
48.M 2305 .A00
0.1U K
VIDEO SIGNAL PROCSSING - TRAITEMENT VIDEO - VIDEO SIGNALVERARBEITUNG - ELABORAZIONE VIDEO - TRATAMIENTO VIDEO
( VIDEO BOARD 1/6)
J1
[P.3]
[P.3]
[P.3]
[P.3]
[P.2]
[P.3]
[P.3]
TP1
TP3
TP5
TP7
TP8
V CLK
VVS
VHS
V PEN
VF IELD
VY[0..7 ]
VU V[0..7]
VY0
VY1
VY2
VY3
TP10
TP12
TP14
TP16
VY4
VY5
VY6
VY7
TP19
TP21
TP22
TP24
V UV0
V UV1
V UV2
V UV3
TP27
TP28
TP30
TP32
V UV4
V UV5
V UV6
V UV7
TP34
TP36
TP38
TP40
TP97
TP43
TP44
TP45
+12 V
+5VS
VC C
+9 V
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
TP2
TP98
TP6
TP99
TP9
TP10 0
TP11
TP13
TP15
TP17
TP18
TP20
1000
1000
1000
1000
1000
1000
L23
L24
L25
L26
L27
L28
RI 1
LI1
RI 2
LI2
RI 4
LI4
TP4
TP23
TP25
TP26
OHM
OHM
OHM
OHM
OHM
OHM
SD _Y_IN
SD_Y_ GND
S D_CB_I N
SD_CB_GND
SD_C R_I N
SD_ CR_GND
[P.2]
[P.2]
[P.2]
[P.2]
[P.2]
[P.2]
[P.4]
[P.4]
[P.4]
[P.4]
[P.4]
[P.4]
INPUT_DET
AV_DET
[P.4]
TV_DET
TP29
TP31
[P.2 .3]
[P.2 .3]
SD A
SCL
TP33
TP35
TP37
TP39
TP42
DECO E
TUNER _ACK
VIDEO_RESET
AV_SEL
CVBS_SE L
[P.2 .3]
[P.4]
[P.2 .3]
[P.4]
[P.2]
+12 V
+5VS
VCC
+9 V
L22
R1
0
BE AD
TEKCON SLOT 60Pin
Screw Holes
OP4
OP
OP5
OP
OP6
OP
OP7
OP
OP8
OP
OP9
OP
OP10
OP
OP1 1
OP
OP1 2
OP
OP1 3
OP
OP1 4
OP
5
LCD03B
First issue 10 / 03
1
OP3
OP
1
OP2
OP
1
OP1
OP
1
Opti cal Points
9
5
9
5
9
5
4
8
4
8
4
8
4
8
3
7
3
7
3
7
3
7
2
6
2
6
2
6
2
6
H1
H2
H3
H4
HOLE- V8
HOLE-V8
HOLE-V 8
HOLE-V8
9
VIDEO SIGNAL PROCSSING - TRAITEMENT VIDEO - VIDEO SIGNALVERARBEITUNG - ELABORAZIONE VIDEO - TRATAMIENTO VIDEO
( VIDEO BOARD 2/6)
VCC_A
VCC_ A
VCC_A
PIN5 9
(Bypass Group
Delay Circuit)
270
+
1
C 200
OPE N
R69
R66
470
OPEN
C1 1
R65
3.3K
R62
470
3.3P C
Y1
3.3P C
V3 3D
UV0
UV1
UV2
UV3
2
C17
C18
0.68U K
C14
OPE N
TP4 6
C 184
C 185
330P J 33 0P J
C15
0.68U K
10K
R2 32
CVB S_VD
[P.4]
0
R11
0.68U K
C 186
68P J
1
NC_R0 603
VCC
C19
C20
+
3
R 260
1
Q4
2N3904
10 U
16 V
2
[P.6]
C27
15
14
SCART_BLUE
TEXT_ B
[P.5]
[P.6]
SCA RT_GREEN
TEXT_ G
[P.5]
[P.6]
SCAR T_RED
TEXT_ R
FBI 1
FBI 2
FBO
L3 5 3.3NH
R14
75
L3 6 3.3NH
R 226
75
0.047U K
0.047U K
2
6
VIA1
VIA2
VOA
12
C 192
C 193
0.047U K
0.047U K
3
7
VIB1
VIB2
VOB
11
C 194
C 195
0.047U K
0.047U K
4
8
VIC1
VIC2
VOC
10
IOCNR
16
9
0.047U K
VPC3 23X D
I2C : 0X
TDA8601T
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
Y0
Y1
Y2
Y3
VSUPY
GNDY
Y4
Y5
Y6
Y7
GNDLLC
VSUPLLC
LLC 1
LLC 2
VSUPPA
GNDPA
U1
VPC3230D
4
3
2
1
DU
DU
DU
DU
V4
V5
V6
V7
4
3
2
1
DY
DY
DY
DY
0
1
2
3
4
3
2
1
DY
DY
DY
DY
4
5
6
7
DUV[ 0..7]
[P.3]
RN 2
47
8E
RN3
5
6
7
8
47
Y0
Y1
Y2
Y3
RN4
5
6
7
8
47
Y4
Y5
Y6
Y7
R12
R13
DY[ 0..7]
[P.3]
0
NC_R 0603
C22
15 00P J
S VCLK
[P.3]
C25
O PEN
C23
0.1U K
R15
NC_R0 60 3
TP47
13
C 190
C 191
R1 6 R1 8 R1 9 R22
NC_R0 603
U3
GND
[P.5]
[P.6]
SEL
5
6
7
8
+ C26
10 U
16 V
VP
5
TT_BLNK
0 .1U K
1
R 261
150
D15
1N414 8
[P.6]
C21
GNDF
VRT
I2CSEL
ISGND
VSUPF
VOUT
CI N
VIN1
VIN2
VIN3
VIN4
VSUPAI
GNDAI
VREF
FB1I N
AISGND
+9 V
2
SCA RT_FB_EN
0
V0
V1
V2
V3
L3 7 3.3NH
L3 8 3.3NH
R 227
R 228
C2 8
3 30 P J
C3 6
3 30 P J
C39
330P J
C41
330P J
C34
75
VB1
VC C
R17
C38
75
0.22U K
C40
0.22U K
0.22U K
10 0
VIDEO_RESET
[P.1]
L2
VCC_A
L3
VG1
C30
0.22U K
C35
15 00P J
C37
390P K
VR1
+
C33
100P K
BEAD
C29
47U
16V
BE AD
1
[P.4]
75
DU
DU
DU
DU
1
R 259
R 231
75
2
R 258
0.68U K
[P.3]
[P.3]
[P.3]
[P.1]
SVVS
SVH S
S VPEN
VF IELD
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
ASGF
XTAL2
XTAL1
N.C
CLK5
VSTBY
FPDAT/VSYA
VS
MSY/HS
FSY/HC/HSYA
AVO
INTLC
VSUPSY
GNDSY
C0
C1
C2
C3
GNDC
VSUPC
C4
C5
C6
C7
2
Q8
2N3904
1
S_C
S_Y
C13
4
3
2
1
V3 3D
B 1/CB1I N
G1/Y1I N
R 1/CR1I N
B 2/CB2I N
G2/Y2I N
R 2/CR2I N
ASGF
N.C/FFRSTWI N
VSUPCAP
VSUPD
GNDD
GNDCAP
SCL
SDA
RESQ
TEST
VGAV
YCOEQ
FFI E
FFW E
FFRSTW
FFRE
FFOE
CLK2 0
10 K
[P.4]
75
5
6
7
8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
2
3
R 257
10 U
16 V
VCC_ A
R 230
V 33D
1
0.047 U K
3
Q7
2N3904
3
100
C10
0.015U K
RN 1
47
C16
+
Q5
2N3906
1
[P.5]
47
47
47
NC_R0 603
C1 2
R 255
S CART_BLNK
R6
R8
R9
R10
C9
0.047U K
C8
390P K
C31
0.1U K
+
2
R7 8
OPEN
2
22 U
16 V
20.25MHZ
1
47
47
C7
15 00P J
2
R6 8
2.2K 1
C2 54
82P J
470
R 204
R 205
UV4
UV5
UV6
UV7
3
C45
R61
2
0
R7 0
VC C
R 262
C5
390P K
PIN5 2
180 P J
Q1
2N3904
C11 9
OPE N
IN7 6
C6
0.22U K
OPEN
C 255
CVB S_INPUT
V 33D
P
C4
15 00P J
C3
0.1U K
R64
6.8K
R63
560
[P.6]
C2
10U Z
C1
0.1U K
+9 V
L1
PIN6 9
R2
0
100
100
R20
R21
SDA
SCL
L4
C3 2
22U
16 V
BE AD
[P.1]
[P.1]
10 0 100 100
U4
C44
C1 18
L
0.22U K
VG2
L34
R2 5
75
Q2
2N3904
Enable
330P J
R 235
75
C48
0.22U K
C5 4
3 30 P J
3.3NH
VR2
1K
VOUT
C47
0.1U K LD1117-3. 3
Disable
R5
R7
10K
L41
1000 OHM
LCD03B
First issue 10 / 03
75
1000 OHM
L33
[P.1]
[P.1]
R 234
V3 3D
VI N
DECOE
2
[P.1]
+ C46
47 U
16 V
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
C49
C50
C51
C5 2
C5 3
PIN4 5
L40 3.3NH
R2 4
75
L32
[P.1]
SD _CR_GND
Y/C Output
DECOE
R3
1K
1000 OHM
1000 OHM
SD_C R_I N
3 30 P J
H
L31
[P.1]
SD_Y_ GND
C4 3
VB2
L30
[P.1]
SD_Y_I N
0.22U K
PIN3 6
SD_CB_GN D
R2 3
75
C42
PIN2 9
1000 OHM
75
2
[P.1]
R 233
GND
L39 3.3NH
1
S D_CB_I N
L29
3
1
VC C
PIN1 0
VCC
1000 OHM
VIDEO SIGNAL PROCSSING - TRAITEMENT VIDEO - VIDEO SIGNALVERARBEITUNG - ELABORAZIONE VIDEO - TRATAMIENTO VIDEO
( VIDEO BOARD 3/6)
P3P3 V
[P.2]
[P.2]
[P.2]
[P.2]
[P.2]
[P.2]
[P.2]
DY
DY
DY
DY
DY
DY
DY
DY
0
1
2
3
4
5
6
7
15
16
17
18
20
21
22
23
VG0
VG1
VG2
VG3
VG4
VG5
VG6
VG7
DG0
DG1
DG2
DG3
DG4
DG5
DG6
DG7
121
122
124
125
127
128
129
130
DG0
DG1
DG2
DG3
DG4
DG5
DG6
DG7
4
3
2
1
4
3
2
1
DU
DU
DU
DU
DU
DU
DU
DU
V0
V1
V2
V3
V4
V5
V6
V7
30
31
32
33
35
36
37
38
VR0
VR1
VR2
VR3
VR4
VR5
VR6
VR7
DR0
DR1
DR2
DR3
DR4
DR5
DR6
DR7
13 2
13 3
13 5
13 6
13 8
13 9
14 1
14 2
DR 0
DR 1
DR 2
DR 3
DR 4
DR 5
DR 6
DR 7
4
3
2
1
4
3
2
1
11
12
13
25
26
27
28
SVHS
SVVS
SVCLK
PVCLK
CREF
PVVS
PVHS
DCL K
DVS
DHS
DEN
DENG
DENB
DENR
102
103
10 4
14 5
10 6
10 7
10 8
DC LK
DVS
DH S
DE N
S VHS
SVVS
S VCLK
S VCLK
S VPEN
SVVS
S VHS
70
71
72
73
75
76
78
79
DGB0
DGB1
DGB2
DGB3
DGB4
DGB5
DGB6
DGB7
DGG0
DGG1
DGG2
DGG3
DGG4
DGG5
DGG6
DGG7
91
92
94
95
97
98
99
100
DGR0
DGR1
DGR2
DGR3
DGR4
DGR5
DGR6
DGR7
66
67
68
MVE
CGMS
TESTCL K
20 1
14 6
14 4
5
6
7
RN 7 8
5
47
6
7
RN 9 8
V UV0
V UV1
V UV2
V UV3
V UV4
V UV5
V UV6
V UV7
VY[0..7 ]
[P.1]
V UV[0..7 ]
[P.1]
70 OHM
R29
R31
47
47
R33
47
R35
TP4 8
TP4 9
R38
47
DP EN
V CLK [P.1]
[P.1]
VVS
[P.1]
VHS
DECOE [P.1]
V PEN
[P.1]
TP5 0
TP5 1
TP5 2
C55
16 1
16 2
159
16 0
VY 0
VY 1
VY 2
VY 3
VY 4
VY 5
VY 6
VY 7
47
15 6
153
150
VREFI N
VREFOUT
RSET
COMP
5
6
7
RN5 8
5
47
6
7
RN 6 8
27 0
0.01U K
R4 3
C63
C64 2
R4 6
R4 7
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
5
34
93
12 3
14 0
17 5
20 5
23 5
10
24
39
46
57
65
74
85
96
10 5
11 5
12 6
13 7
14 7
17 1
18 9
19 3
20 2
21 2
22 2
22 8
23 3
24 0
24 6
25 3
PVs s
PVs s
PVs s
PVs s
PVs s
PVs s
PVs s
PVs s
PVs s
PVs s
PVs s
PVs s
PVs s
PVs s
PVs s
PVs s
PVs s
PVs s
PVs s
PVs s
PVs s
PVs s
PVs s
PVs s
PVs s
PVd d
PVd d
PVd d
PVd d
PVd d
PVd d
PVd d
PVd d
PVd d
PVd d
PVd d
PVd d
PVd d
PVd d
PVd d
PVd d
PVd d
PVd d
PVd d
PVd d
PVd d
PVd d
PVd d
PVd d
14
29
42
54
64
69
80
90
101
109
120
131
143
165
180
200
208
216
224
230
237
243
249
256
DPAVs s
DPDVs s
DPAVd d
DPDVd d
19 7
199
AVDD2
19 6
19 8
MPDVdd
MPAVd d
58
60
AVDD1
ADDVd d
ADAVd d
ADGVd d
149
16 3
166
A VD25
AVD33B
AVD33G
AVD33R
15 1
154
157
A VD33
14 8
16 4
16 7
A VD33
15 2
15 5
15 8
1 10 U
0 16 V P3P3 V
0
TP5 3
MPDVs s
MPAVs s
ADDVs s
ADAVs s
ADGVs s
AVS33B
AVS33G
AVS33R
RAMA0
RAMA1
RAMA2
RAMA3
RAMA4
RAMA5
RAMA6
RAMA7
RAMA8
RAMA9
RAMA1
RAMA1
RAMA1
RAMA1
P3P3 V
0
1
2
3
213
210
207
204
203
206
209
211
214
217
215
220
221
218
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA1 0
MA1 1
MA1 2
MA1 3
R26
0
223
MCLKFB
RC LK R28
0
229
MCLK
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
25 5
25 2
24 8
24 5
24 2
23 9
23 6
23 2
23 1
23 4
23 8
24 1
24 4
24 7
25 0
25 4
mRASn
mCASn
mWEn
22 5
22 6
22 7
PW1230
10K
10K
10K
10K
10K
R39
R40
Y2
0
0
R41
R42
SCL
SDA
0
0
1 0MHZ
R44
PW1230
0
2M
R45
C65
C66
18P J
48
50
51
52
53
TDO
TCK
TDI
TMS
TRSTN
43
44
I2CA1
I2CA2
45
47
SCL
SDA
40
XTAL I
41
XTAL O
56
TEST
16 8
16 9
17 0
17 2
17 3
17 4
17 6
17 7
MCUD0
MCUD1
MCUD2
MCUD3
MCUD4
MCUD5
MCUD6
MCUD7
17 8
17 9
18 1
18 2
18 3
18 4
18 5
18 6
RESETn MCUCS
MCUWR
MCUCMD
MCURDY
19 0
19 1
192
18 8
0
P2P5 V
19
38
37
CS
CL K
CKE
R RASn
R CASn
RWEn
18
17
16
RAS
CAS
WE
39
15
UDQM
LDQM
1K
NC/RFU
NC
40
36
C56
0.1U K
C57
0 .1U K
C58
0.1U K
C5 9
0.1U K
C60
0.1U K
P3P3V
L5
+
C71
22U
16V
0.1U K 0.01U K
2
2
C70
C67
10U
16V
C68
0.1U K
L7
A VD33
VC C
C7 9
0 .1U K
C8 0
0 .1U K
C81
0 .1U K
C8 2
0.1U K
C83
0.1U K
C8 4
0 .1U K
0.01U K
C8 5
0 .1U K
C7 5
0.1U K
P2P5 V
P3P3 V
AVDD2
C9 0
0 .1U K
C91
0 .1U K
C9 2
0.1U K
C93
0.1U K
C9 4
0 .1U K
C9 5
0 .1U K
C96
0 .1U K
C97
0.1U K
C98
0.1U K
C99
0.1U K
C1 00
0.1U K
C1 01
0.1U K
C86
0.1U K
0.01U K
AVDD1
LCD03B
First issue 10 / 03
C10 5
0 .1U K
C10 6
0 .1U K
C1 07
0.1U K
C10 8
0 .1U K
C1 09
0 .1U K
C1 10
0 .1U K
C1 11
0 .1U K
C11 2
0.1U K
C1 13
0.1U K
2
1
R49
681F
LM317 M
42 OHM
C1 02
0.1U K
R50
681F
+
C87
L9
C10 4
0 .1U K
VOUT
2
C8 9
0 .1U K
VI N
+
L8
42 OHM
C8 8
0 .1U K
P2P5V
3
1
C7 8
0 .1U K
U7
GND
C73
0.1U K
C74
2
42 OHM
1
P2P5 V
C 103
0.01U K
6
P3P3V
42 OHM
C69
+
RAMD15
RAMD14
RAMD13
RAMD12
RAMD11
RAMD10
RA MD 9
RA MD 8
RA MD 7
RA MD 6
RA MD 5
RA MD 4
RA MD 3
RA MD 2
RA MD 1
RA MD 0
HY57V641620HGT-
R4 8
L6
42 OHM
P3P3 V
53
51
50
48
47
45
44
42
13
11
10
8
7
5
4
2
4M*16 SDRAM
A VD25
PW1230
RC LK
P3P3V
DQ1 5
DQ1 4
DQ1 3
DQ1 2
DQ1 1
DQ1 0
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
: 0X64
V 33D
DGHS
DGVS
DGCL K
A1 1
A1 0
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
BA0
BA1
PW1230
I2C
VIDEO_RESET
35
22
34
33
32
31
30
29
26
25
24
23
20
21
R27
P3P3V
MCUA0
MCUA1
MCUA2
MCUA3
MCUA4
MCUA5
MCUA6
MCUA7
DI _RESET
[P.1]
5 R RASn
6 R CASn
7 RWEn
8
4
33
3
2
RN
8
1
55
18P J
U6
RAMA11
RAMA10
RAMA9
RAMA8
RAMA7
RAMA6
RAMA5
RAMA4
RAMA3
RAMA2
RAMA1
RAMA0
RAMA12
RAMA13
U5 D
P3P3V
R30
R32
R34
R36
R37
[P.1]
[P.1]
R AMD0
R AMD1
R AMD2
R AMD3
R AMD4
R AMD5
R AMD6
R AMD7
R AMD8
R AMD9
RAMD10
RAMD11
RAMD12
RAMD13
RAMD14
RAMD15
49
43
9
3
27
14
1
Vs s
Vs s
Vs s
Vs s
Vs s
Vs s
Vs s
Vs s
59
61
0.01U K
+
81
82
83
84
86
87
88
89
ADR
ADG
ADB
47
19
49
77
11 2
13 4
18 7
21 9
25 1
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
110
111
113
114
116
117
118
119
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
DUV[0 ..7]
[P.2]
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
1
[P.2]
VB0
VB1
VB2
VB3
VB4
VB5
VB6
VB7
1
DY[0 ..7]
1
2
3
4
6
7
8
9
U5 C
P2P5 V
6
12
46
52
28
41
54
U5B
U5 A
C77
10U
16 V
C72
47 U
16V
C76
0.1U K
C6 1
0.1U K
C6 2
0.1U K
VIDEO SIGNAL PROCSSING - TRAITEMENT VIDEO - VIDEO SIGNALVERARBEITUNG - ELABORAZIONE VIDEO - TRATAMIENTO VIDEO
( VIDEO BOARD 4/6)
VC C
TP5 5
CVBS_ IN
C1 17
View
AV_SEL
Q3
2N3904
100
3
4
4
TP5 6
R5 6
R53 R55
68K
1K
LI1
1K
HC405
R54
4
[P.1]
[P.4]
2
2
TP5 7
R5 7
[P.1]
RI 1
1K
D2
D1
1
2
D4
.
TP41
S1
G1
3
TP58
C1 20
C 127
O PEN
1
R3 18
100
R3 17
68K
10U 16 V
+5VS
G1
R 319
DN 2
BAV99
TP59
C1 16
0.1U K
2
AV_SEL
LOW
OUTPUT
CVBS
HIGH
TV
U2 C
2N3904
2N3906
R3 16
68K
1000 OHM
L11
+
Y
S1
VC C
C1 89
0 .1U K
View
C 115 +
10U
16V
1
TZMC5V1
D3
J7
3
75
TZM C5V1
G1
DN 1
BAV99
R60
R59
22 K
R58
22K
3
VCC
TZMC5V1
4
TZMC5V1
3
CVB S_VD
3
VI DEO_I N
74
1
[P.1]
5
CV BS
0
6
1
Bottom
R52
+5VS
3
5
10U 16V
9
6
6
+
Bottom
5
R51
68K
16
5
TP54
1000 OHM
L10
6
7
8
C 114
0.1U K
J6
Q305
2N3904
R 311
0
R77
0
S_Y
[P.2]
1K
R71
1
G2
3
.
2
75
4
C
2
1000
L12
4
OHM
VC C
221 028900 1
C1 24
C 128
O PEN
INPUT_DET
+
G3
10U 16 V
+5VS
C1 22
0 .1U K
DN 3
BAV99
R72
68 K
R82
R74
100
75
Q6
2N3904
R76
68 K
R80
S_C
[P.2]
1K
VCC
+9V
L20
42 OHM
1
13
R 253
560
C 133
[P.1]
R8 8
68K
CVBS_ SEL
R9 0
100
10U
16V
Q9
2N3904
R95
R94
+ C 125
10 U
16 V
[P.5]
68 K
R9 7
+9V
1K
J8
TP6 1 1
3
5
7
9
11
13
TP6 4
R89
100
100
R91
R73 NC_R0 60 3
SCL_TV
SDA_TV
T UNER_DET
TUNE R_ACK
+
100
C 126
10U
16 V
Q2 2
2N3904
3.3K
R 107
3.3K
1
1
3 3
1
2
BSN2 0
3
470
R110
470
S CART_ROUT
SCART_L OUT
BSN2 0 Q1 2
3
2
[P.1]
BSN 20
R109
2
1
Q13
LCD03B
First issue 10 / 03
RI 2
[P.6]
BSN 20
C 196
O PEN
C 197
O PEN
C 198
OPE N
C 199
OPE N
68
VI DEO_OUT
[P.5]
LI2
Q1 0
Q1 1
SDA
R92
R2 50
1K
VC C
R 108
V 33D
[P.1]
U2A
14
VI DEO_I N
74HC4053
LOW
HIGH
R 254
470
R98
2
13
[P.4]
CVBS_SEL Output
R 249
22
L1 3 1000 OHM
TP62
TP63
TP65
TP66
TP67
TP68
TP69
2
4
6
8
10
12
14
Q2 3
2N3906
SCL
S CART_CVBS
12
6
7
8
+9 V
TV
0
11
C 130
0.1U K
2
16
(ST)
+
Top View
14
[P.1]
[P.1]
[P.5]
[P.5]
CVBS_VD
SCART_CVBS
[P.2]
VIDEO SIGNAL PROCSSING - TRAITEMENT VIDEO - VIDEO SIGNALVERARBEITUNG - ELABORAZIONE VIDEO - TRATAMIENTO VIDEO
( VIDEO BOARD 5/6)
+5VS
VC C
DN 6
BAV99
C 140
0.1U K
[P.4]
S CART_ROUT
R 163
0
R 164
0
L1 4
[P.4]
J9
R19 4 R 195
D6
[P.5]
TP70
TP72
3
2
TP71
0
R 165
SCART_ AR_I N
Q1 4
2N390 4
R1 16
47
S CART_CVBS
R1 17
68 K
[P.5]
[P.2]
TP7 3
R 118
1K
TP74
R 166
0
8
TP76
R 167
0
SCA RT_AL_I N
10
SCART_G REEN_I N
SC ART_AL_I N
CLK_OUT
D13
12.4~14 .1V
TP7 7
11
TP78
12
DAT A_OUT
[P.5]
SCA RT_SWITCH
9
[P.5]
TP7 9
[P.5]
TP81
16
R 168
18
20
TP83
21
SCART _CVBS_I N
[P.5]
R 125
TZMC5V1
D10 TZMC5V1
RI 4
[P.1]
R1 22
22K
D11 TZMC5V1
D12 TZMC5V1
75
[P.2]
+5VS
DN 9
BAV99
C 154
O PEN
1000 OHM
L1 6
+5VS
DN 8
[P.1]
S CART_BLNK
19
TP82
1K
R 121
22K
0
17
[P.5]
R1 20
LI4
[P.5]
15
TP80
1K
D9
SCART _AR_I N
14
SCART_RE D_I N
R1 19
[P.5]
13
[P.5]
TZMC5V1
6
7
TP75
D1 4
TZM C5V1
5
SCAR T_BLUE_I N
D8
TZM C5V1
R 114
10 0
10U 16V
75
TZMC5V1
D5
100K 100K
10 00P J 10 00P J
1
4
D7
C1 43
R 115
C1 42
C 141
TZMC5V1
1000 OHM
SCAR T_CVBS_I N
+
SCART_L OUT
R1 13
68 K
C 145
R1 26
[P.5]
+
SCAR T_BLUE_I N
BAV9 9
S CART_BLUE
10U 16V
[P.2]
L1 5
75
VI DEO_OUT
1000 OHM
[P.4]
+5VS
DN 10
BAV99
C 155
O PEN
1000 OHM
L1 7
C 147
R1 32
+
REEN_I
SCART_G
N
[P.5]
SCA RT_GREEN
10U 16V
[P.2]
75
8.6- 12V
Mode1
Mode2
0
0
+5VS
Auto
3.5- 8.6V
1
0
16:9
0-3 .5V
1
1
Manual
DN 11
BAV99
+5VS
+5VS
R2 25
10K
10K
SCART_RE D_I N
4
R 217
10K
0V~4. 85V
3
2
SCA RT_SWITCH
3.49V
[P.5]
5
6
1.40V
R 219
3.9K
10
9
100K
7
R22 1
100K
IN2+ OUT2
IN28
IN3+ OUT3
IN314
IN4+ OUT4
IN4-
11
GND
12
13
R22 0
LCD03B
First issue 10 / 03
LMV3 24M
Q1
2N3904
Q16
2N3904
R 222
R2 23
NC_R0 603
R21 8
10K
1
IN1+ OUT1
IN1-
NC_R0 603
R 245
6.8K
C 149
R1 38
75
U15
V+
R21 6
4.3K
R21 5
10K
[P.5]
C 156
O PEN
1000 OHM
L1 8
R1 27
0
High Active
SCART_M ODE1
[P.6]
SCART_M ODE2
[P.6]
TV_DET
[P.1]
+
R 224
10U 16V
SCAR T_RED
[P.2]
VIDEO SIGNAL PROCSSING - TRAITEMENT VIDEO - VIDEO SIGNALVERARBEITUNG - ELABORAZIONE VIDEO - TRATAMIENTO VIDEO
( VIDEO BOARD 6/6)
+2.5V
+3. 3VDAC
C 168
C 169
0.1U K
8
7
6
5
+3. 3VDAC
EE_SCL
EE_SDA
0.1U K
0.1U K
U14
R2 39
R2 40
C 172
CVBS _INPUT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
0
0
0.1U K
R 181
NC_R0 603
TP8 4
[P.1]
[P.1]
C 171
R 243
R 244
SCL
SDA
TT_STAR T
0
0
P 0.0
P 0.1
P 0.2
P 0.3
P 0.4
P 0.5
P 0.6
P 0.7
VDD 2.5
VSS
VDD 3.3
CVBS
VDDA 2. 5
VSSA
P 2.0
P 2.1
P 2.2
P 2.3
HS/SSC
VS
P 3.0
P 3.1
P 3.2
P 3.3
P 3.4
P 3.5
P 1.7
P 1.6
P 1.5
P 1.4
P 1.3
P 1.2
P 1.1
P 1.0
VDD 3. 3
VSS
VDD 2. 5
BLANK/COR
B
G
R
VDDA 2. 5
VSSA
XTAL 1
XTAL 2
RSTP 4.3
P 4.2
VDD 3. 3
VSS
P 3.7
P 3.6
R 186
0
3.3K
[P.1]
[P.1]
SCL
SDA
R1 59
NC_R0 60 3
S VHS
R1 58
NC_R0 60 3
[P.2]
SVVS
R 157
TT_FSB
TT _B
TT _G
TT_ R
R1 79
R1 80
R1 82
R1 83
VI N
VOUT
2
C1 51
0 .1U K
L19
BE AD
GND
3
+3.3V
+
C 152
0 .1U K
+
1
LD1117-3. 3
C 150
47U
16 V
C1 53
10 U
16 V
U1 2
VCC
3
+2. 5VDAC
2
BE AD
R 169
681F
LM317 M
1
C1 64
0 .1U K
R1 70
681F
+
C 166
10U
16 V
+3. 3VDAC
PIN1 1
P IN 30
C17 3
0 .1U K
LCD03B
First issue 10 / 03
+2.5V
L21
VOUT
GND
VI N
PIN4 4
C17 4
0 .1U K
C1 75
0.1U K
+
C 162
47 U
16 V
C1 65
0 .1U K
+
C1 63
10 U
16 V
R 160
R1 61
R1 62
NC_R 0603
+3. 3VDAC
3.3K
3.3K
R1 45
68
R1 46
68
Q18
2N3904
TT_ RSTn
B LUE
+3.3V
Y3
R25 2
GREEN
R 184
10K
0
R23 6
+ C 176
10 U
16 V
6MHZ
C 177
33P J
RE D
C1 78
33P J
SCA RT_FB_EN
C 161
0 .1U K U11
16
VDD
14
15
1
2
3
U9
FSB
B LUE
GREEN
RE D
0
0
0
0
R14 4
68
R14 8
47
R15 0
10
R15 1
10
R15 2
10
TT_BLNK
[P.2]
TEXT_ B
[P.2]
TEXT_ G
[P.2]
TEXT_R
[P.2]
R1 49
330
13
VCC
+3. 3V
R 143
220
+3. 3VDAC
0
NC_R 0603
0
NC_R 0603
0
NC_R 0603
L ANG1
I2C : 0X60
R 185
+3. 3VDAC
LCB
R1 74
I N FO
R 175
LIS T
R1 76
I2C_EN
R 177
RGB_G AI N R1 78
SDA555 xF L
[P.2]
[P.6]
[P.6]
[P.6]
L ANG3
L ANG2
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
NC_R0 60 3
VCC
WP
SCL
SDA
AT24 C02
[P.4]
C 170
+3. 3VDAC
NC
NC
NC
GND
LANG3
LANG2
LANG1
+2. 5V
R 189
R 190
R 191
R 192
R 193
R1 72
4.7K
R 171
4.7K
U1 3
1
2
3
4
+2. 5VDAC
0 .1U K
0
NC_R 0603
0
NC_R 0603
0
+2. 5VDAC
C 167
0 .1U K
SCL
SDA
IN T
A0
A1
A2
P0 0
P0 1
P0 2
P0 3
P0 4
P0 5
P0 6
P0 7
GND
PCA9554P W
I2C : 0X48
4
5
6
7
9
10
11
12
8
[P.6]
LANG1
[P.6]
LANG2
[P.6]
LANG3
SCA RT_FB_EN
T UNER_DET
SCART_M ODE1
SCART_M ODE2
[P.2]
[P.4]
[P.5]
[P.5]
2N390 6
Q2 1
2N3906
Q2 0
2N3906
Q19
VIDEO SIGNAL PROCSSING - TRAITEMENT VIDEO - VIDEO SIGNALVERARBEITUNG - ELABORAZIONE VIDEO - TRATAMIENTO VIDEO
( VIDEO BOARD 1/6, 20”BI)
J1
[P. 3]
[P. 3]
BU [0..7]
RV [0..7]
TP 10
TP 12
TP 14
TP 16
GY
GY
GY
GY
4
5
6
7
TP 19
TP 21
TP 22
TP 24
BU 0
BU 1
BU 2
BU 3
TP 27
TP 28
TP 30
TP 32
BU 4
BU 5
BU 6
BU 7
TP 34
TP 36
TP 38
TP 40
RV 0
RV 1
RV 2
RV 3
TP 10 1
TP 10 2
TP 10 3
TP 10 4
TP 97
+12V
TP 43
+5VS
TP 44
VCC
TP 45
+9V
AV_ DET
INPUT_D ET
Q26
2N3906
2
+9V
RI 1
[P.
LI1
[P.
RI 2
[P.
LI2
[P.
RI 4
[P.
LI4
TP 4
3
10K
[P. 2]
R1
SDA
SC L
R321
AV_ SEL_I N
TP 33
DEC OE [P .2.3]
TP 35
T UNER_ACK (old net:
TP 37
VIDE O_RESET
TP 39 AV_ SEL_I N
[P .2.3]
TP 42 YC _SEL_I N
1
TT_ST ART) [P. 4]
R194
1K
Q24
2N3906
2
+9V
RV [0..7]
Q17
2N3904
[P. 3]
3
R195
+12V
+5VS
10K
VCC
R196
1K
R335
+9V
R197
YC _SEL_I N
1
R198
1K
10K
Q25
2N3904
10K
L22
BEAD
S crew Holes
20L0BI
VIDEO BOARD
LCD03B
First issue 10 / 03
1
1
1
1
48.M 2306 .A00
9
5
9
5
9
5
4
8
4
8
4
8
4
8
3
7
3
7
3
7
3
7
2
6
2
6
2
6
2
6
H2
H3
H4
HO LE-V 8
HO LE-V 8
HO LE-V 8
HO LE-V 8
[P. 2]
10K
10K
RV 4
RV 5
RV 6
RV 7
H1
CVBS_SEL
R334
2050044080
5
[P. 4]
R322
1K
0
[P .2.3]
[P .2.3]
TEKCON SLOT 80Pin
AV_SEL
R320
[P. 4]
TV_DET
TP 29
TP 31
TP 10 5
TP 10 6
TP 10 7
TP 10 8
2]
2]
2]
2]
2]
2]
[P. 4]
4]
4]
4]
5]
5]
TP 11
TP 13
TP 15
TP 17
TP 18
TP 20
TP 23
TP 25
TP 26
[P.
[P.
[P.
[P.
[P.
[P.
1
GY[0.. 7]
0
1
2
3
SD_Y_I N
SD_Y_ GN D
SD_CB _IN
SD_CB _GND
SD_ CR_IN
SD _ CR_GND
3
[P. 3]
GY
GY
GY
GY
1000 OHM
1000 OHM
1000 OHM
1000 OHM
1000 OHM
1000 OHM
2
TP 3
TP 5
TP 7
TP 8
VVS
VH S
VPEN
VFI EL D
L23
L24
L25
L26
L27
L28
1
3]
3]
3]
2]
TP 2
TP 98
TP 6
TP 99
TP 9
TP 10 0
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
3
[P.
[P.
[P.
[P.
VCL K
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
2
[P. 3]
TP 1
9
Optical Points
OP1
OP
OP2
OP
OP3
OP
OP4
OP
OP5
OP
OP6
OP
OP7
OP
OP8
OP
OP9
OP
OP10
OP
OP11
OP
OP12
OP
OP13
OP
OP14
OP
VIDEO SIGNAL PROCSSING - TRAITEMENT VIDEO - VIDEO SIGNALVERARBEITUNG - ELABORAZIONE VIDEO - TRATAMIENTO VIDEO
( VIDEO BOARD 2/6, 20”BI)
VCC
VCC _A
R6 3
VC C_ A
R6 4
6.8K
PI N5 9
L1
R336
NC_C0603
22 U
16V
27 0
C200
R331
R6 2
47 0
47 0
NC_R0603
R6 5
3.3K
3.3P C
C191
Y1
C1 7
3.3P C
V33 D
C7
1500 P J
C9
0.047U K
C8
390P K
C1 0
0.015U K
C1 8
0 .68U K
C184
C185
UV 0
UV 1
UV 2
UV 3
75
330P J
10 U
16V
[P. 4]
R232
0
C1 9
0 .68U K
TP 46
R1 1
NC _R0603
Q29
C 186
68 PJ
[P. 5]
C1 5
2N3904
0 .68U K
R341
NC_R0603
75
Q28
C2 0
+
10K
C2 1
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
GNDF
VRT
I2CSEL
ISGND
VSUPF
VOUT
CI N
VIN1
VIN2
VIN3
VIN4
VSUPAI
GNDAI
VREF
FB1I N
AISGND
R340
2N3904
0.047U K
10 U
16V
5
6
7
8
4
3
2
1
DU V0
DU V1
DU V2
DU V3
5
6
7
8
4
3
2
1
DU V4
DU V5
DU V6
DU V7
3]
3]
3]
1]
4
3
2
1
DY
DY
DY
DY
0
1
2
3
4
3
2
1
DY
DY
DY
DY
4
5
6
7
DUV [0..7]
[P. 3]
RN2
47
V33 D
VC C_ A
330PJ
[P.
[P.
[P.
[P.
SVVS
SVHS
SVPE N
VFIELD
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
R231
VPC 323XD
ASG F
XTAL 2
XTAL 1
N.C
CLK 5
VSTBY
FPDAT/VSYA
VS
MSY/H S
FSY/HC/HSYA
AVO
INTLC
VSUPSY
GNDS Y
C0
C1
C2
C3
GNDC
VSUPC
C4
C5
C6
C7
0 .68U K
V33 D
U1
VPC3230D
I2C
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
Y0
Y1
Y2
Y3
VSUPY
GNDY
Y4
Y5
Y6
Y7
GNDLLC
VSUPLLC
LLC1
LLC2
VSUPPA
GNDPA
: 0X8E
B1/CB1I N
G1/Y1I N
R1/CR1I N
B2/CB2I N
G2/Y2I N
R2/CR2I N
ASG F
N.C/FFRSTWI N
VSUPCAP
VSUPD
GNDD
GNDCA P
SC L
SD A
RESQ
TEST
VGAV
YCOE Q
FFI E
FFWE
FFRSTW
FFR E
FFOE
CLK20
C1 3
[P. 4]
CVBS_V D
PI N5 2
RN1
47
RN3
5
6
7
8
47
Y0
Y1
Y2
Y3
RN4
5
6
7
8
47
Y4
Y5
Y6
Y7
R1 2
R1 3
DY[0..7 ]
[P. 3]
0
NC_R0603
C2 2
1500 P J
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
75
0.047U K
R230
VCC
R339
47
47
47
NC_R0603
C1 6
+
S_Y
Q30
2N3906
R6
R8
R9
R1 0
82 PJ
S_ C
R343
47
47
C1 2
C1 1
[P. 4]
R342
47 0
C5
390P K
R204
R205
UV 4
UV 5
UV 6
UV 7
NC_R0603
NC_C0603
R330
20.25 MH Z
SCART _BLN K
C4
1500 P J
C4 5
2.2K
+
R6 8
0
R6 9
C119
C3
0.1U K
C6
0.22U K
180P J
Q1
2N3904
R7 0
V33 D
PIN76
NC _L1206
C199
[P. 6] CVBS_INPU T
C2
10 U Z
C1
0.1U K
56 0
VC C_ A
PI N69
SVC LK
[P .3 ]
C2 5
22 P J
C2 3
0.1U K
VCC
10K
Q27
SCART _F B_EN
R338
R1 5
NC _R0603
0
+9V
2N3904
VCC
R337
VOA
12
L36
11
L37
C193
C194
[P. 5] SCART_GREE N
[P. 6] TEX T_ G
1U Z
1U Z
C195
C196
3
7
VIB1
VIB2
VOB
[P. 5] SC AR T_ RE D
[P. 6] TE XT _R
1U Z
1U Z
C197
C198
4
8
VIC1
VIC2
VOC
10
IOCNR
16
VIA1
VIA2
75
R227
75
C2 8
GND
3.3NH
L38
SD_CB _IN
330PJ
C3 9
330PJ
C4 1
330PJ
VG1
C4 0
0 .22U K
VR 1
75
C4 2
R3
1K
BEAD
C2 9
47U
16V
BEAD
C3 1
0.1U K
+
L4
C3 2
22U
16V
BEAD
[P. 1]
[P. 1]
VCC
DECO EY/C Output
L
Disable
H
330P J
Q2
2N3904
3.3NH
L40
R234
75
C4 4
0 .22U K
C118
330PJ
C4 8
0 .22U K
C5 4
330P J
VR 2
75
1000 OHM
3.3NH
L33
L41
R235
75
R2 5
1000 OHM
75
V33 D
C4 7
0.1U K
Enabl e
R5
1K
DEC OE
R7
10K
1000 OHM
L34
SDA
SC L
3
0 .22U K
75
L32
[P. 1]
10 0
10 0
VCC
R2 4
[P. 1]
LCD03B
First issue 10 / 03
0 .22U K
R2 0
R2 1
L39
L31
[P. 1]
SD _ CR_GND
C3 8
1000 OHM
L30
[P. 1]
SD_ CR_I N
VB1
R233
1000 OHM
SD_Y_ GN D
0 .22U K
C4 3
[P. 1]
SD_Y_I N
C3 4
3.3NH
R2 3
[P. 1]
SD_CB _GND
C3 6
75
L29 1000 OHM
TDA8601T R2
330PJ
L3
U4
R228
3.3NH
0
10 0 10 0 10 0
R226
3.3NH
9
NC_R0603
R1 6 R1 8 R1 9 R2 2
75
3.3NH
1U Z
1U Z
2
6
R1 4
VC C_ A
VI N
VOUT
2
LD1117-3. 3
+ C4 6
47 U
16V
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
C4 9
C5 0
C5 1
C5 2
C5 3
20L0BI
VIDEO BOARD
48.M 2306 .A00
[P. 1]
PI N4 5
L35
+
C3 3
100P K
L2
PI N3 6
13
[P. 1]
PI N2 9
FBO
VIDE O_RESET
PI N1 0
FBI 1
FBI 2
C3 0
0.22U K
C3 5
1500 PJ
C3 7
390P K
TP 47
10 0
GND
SEL
VB2
15
14
U3
VG2
1N4148
[P. 6] TT_BLNK
[P. 5] SCART _BLU E
[P. 6] TEX T_ B
0.1U K
1
5
VP
15 0
D1 5
R1 7
+ C2 6
10 U
16V
1
C2 7
VIDEO SIGNAL PROCSSING - TRAITEMENT VIDEO - VIDEO SIGNALVERARBEITUNG - ELABORAZIONE VIDEO - TRATAMIENTO VIDEO
( VIDEO BOARD 3/6, 20”BI)
P3P3V
121
122
124
125
127
128
129
130
DG0
DG1
DG2
DG3
DG4
DG5
DG6
DG7
30
31
32
33
35
36
37
38
VR0
VR1
VR2
VR3
VR4
VR5
VR6
VR7
DR0
DR1
DR2
DR3
DR4
DR5
DR6
DR7
132
133
135
136
138
139
141
142
DR0
DR1
DR2
DR3
DR4
DR5
DR6
DR7
11
12
13
25
26
27
28
SVHS
SVVS
SVCLK
PVCLK
CREF
PVVS
PVHS
DCLK
DVS
DHS
DEN
DEN G
DEN B
DEN R
102
103
104
145
106
107
108
DC LK
DVS
DHS
DEN
70
71
72
73
75
76
78
79
DGB0
DGB1
DGB2
DGB3
DGB4
DGB5
DGB6
DGB7
DGG0
DGG1
DGG2
DGG3
DGG4
DGG5
DGG6
DGG7
91
92
94
95
97
98
99
100
DGR0
DGR1
DGR2
DGR3
DGR4
DGR5
DGR6
DGR7
66
67
68
DGHS
DGVS
DGCLK
5
OPEN 6
7
RN 5 8
5
OPEN 6
7
RN 6 8
GY
GY
GY
GY
GY
GY
GY
GY
4
3
2
1
4
3
2
1
5
OPEN 6
7
RN 7 8
5
OPEN 6
7
RN 9 8
RV 0
RV 1
RV 2
RV 3
RV 4
RV 5
RV 6
RV 7
R2 9
R3 1
R3 3
R3 5
TP 48
TP 49
R3 8
D PEN
156
153
150
C5 5
VREFIN
VREFOUT
RSET
COMP
161
162
159
160
MVE
CGMS
TESTCLK
201
146
144
GY[0.. 7]
0
1
2
3
4
5
6
7
[P. 1]
RV [0..7]
[P. 1]
0
47
47
47
VCLK [P.
[P.
VVS
[P.
VHS
DEC OE[P.
47
VPEN
1]
1]
1]
1]
[P. 1]
TP 50
TP 51
TP 52
0 .01U K
R4 3
C6 3
C6 4 2
R4 6
R4 7
27 0
0 .01U K
+
81
82
83
84
86
87
88
89
ADR
ADG
ADB
4
3
2
1
4
3
2
1
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
5
34
93
123
140
175
205
235
10
24
39
46
57
65
74
85
96
105
115
126
137
147
171
189
193
202
212
222
228
233
240
246
253
PVss
PVss
PVss
PVss
PVss
PVss
PVss
PVss
PVss
PVss
PVss
PVss
PVss
PVss
PVss
PVss
PVss
PVss
PVss
PVss
PVss
PVss
PVss
PVss
PVss
PVdd
PVdd
PVdd
PVdd
PVdd
PVdd
PVdd
PVdd
PVdd
PVdd
PVdd
PVdd
PVdd
PVdd
PVdd
PVdd
PVdd
PVdd
PVdd
PVdd
PVdd
PVdd
PVdd
PVdd
14
29
42
54
64
69
80
90
101
109
120
131
143
165
180
200
208
216
224
230
237
243
249
256
DPAVdd
DPDVdd
197
199
AV DD2
MPDVdd
MPAVdd
58
60
AV DD1
ADDVdd
ADAVdd
ADGVdd
149
163
166
AV D2 5
AVD33B
AVD33G
AVD33R
151
154
157
AV D3 3
196
198
DPAVss
DPDVss
59
61
MPDVss
MPAVss
148
164
167
AV D3 3
ADDVss
ADAVss
ADGVss
152
155
158
1 1 0U
0 16V P3P3V
0
TP 53
AVS33B
AVS33G
AVS33R
RAM A0
RAM A1
RAM A2
RAM A3
RAM A4
RAM A5
RAM A6
RAM A7
RAM A8
RAM A9
RA MA10
RA MA11
RA MA12
RA MA13
P3P3V
213
210
207
204
203
206
209
211
214
217
215
220
221
218
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
R2 6
0
223
MCLKFB
RC LK R2 8
0
229
MCLK
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
255
252
248
245
242
239
236
232
231
234
238
241
244
247
250
254
mRASn
mCASn
mWEn
225
226
227
RAM D0
RAM D1
RAM D2
RAM D3
RAM D4
RAM D5
RAM D6
RAM D7
RAM D8
RAM D9
RAMD 10
RAMD 11
RAMD 12
RAMD 13
RAMD 14
RAMD 15
[P. 1]
[P. 1]
Y2
10K
10K
10K
10K
10K
48
50
51
52
53
TDO
TCK
TDI
TMS
TRSTN
R3 9
R4 0
0
0
43
44
I2CA1
I2CA2
45
47
SCL
SDA
40
XTALI
41
XTALO
0
0
R4 1
R4 2
10M HZ
0
R4 4
R4 5
2M
C6 5
C6 6
18 P J
18 P J
MCUA0
MCUA1
MCUA2
MCUA3
MCUA4
MCUA5
MCUA6
MCUA7
168
169
170
172
173
174
176
177
56
TEST
MCUD0
MCUD1
MCUD2
MCUD3
MCUD4
MCUD5
MCUD6
MCUD7
178
179
181
182
183
184
185
186
55
RESETn MCUCS
MCUWR
MCUCMD
MCURDY
190
191
192
188
I2C
OPTI ON
PW1230
[P. 1]
RN8 12
7
6
5
RV 0
RV 1
RV 2
RV 3
DG4 47
DG5
DG6
DG7
1
2
3
4
RN8 13
7
6
5
RV 4
RV 5
RV 6
RV 7
DR0 47
DR1
DR2
DR3
1
2
3
4
RN8 14
7
6
5
GY
GY
GY
GY
0
1
2
3
DR4 47
DR5
DR6
DR7
1
2
3
4
RN8 15
7
6
5
GY
GY
GY
GY
4
5
6
7
19
38
37
CS
CLK
CKE
RR ASn
RC ASn
RW En
18
17
16
RAS
CAS
WE
39
15
UDQM
LDQM
1K
C5 6
0.1U K
C5 7
0.1U K
C5 8
0.1U K
P2P5V
+
L6
AV D2 5
42 OHM
C6 9
+
C7 0
P3P3V
22U
16V
0.1U K 0.01U K
C6 7
10U
16V
C6 8
0.1U K
C7 1
VCC
L7
U7
P2P5V
AV D3 3
3
42 OHM
C7 4
C7 5
0.1U K
0.01U K
VIN
VOUT
2
R4 9
681F
LM317 M
C8 4
0.1U K
C8 5
0.1U K
AV DD2
42 OHM
P3P3V
C8 8
0.1U K
C8 9
0.1U K
C9 0
0.1U K
C9 1
0.1U K
C9 2
0.1U K
C9 3
0.1U K
C9 4
0.1U K
C9 5
0.1U K
C9 6
0.1U K
C9 7
0.1U K
C9 8
0.1U K
C9 9
0.1U K
C 100
0.1U K
C 101
0.1U K
C8 6
0.1U K
C8 7
0.01U K
L9
AV DD1
42 OHM
C 102
0.1U K
C 104
0.1U K
C 105
0.1U K
LCD03B
First issue 10 / 03
C 106
0.1U K
C 107
0.1U K
C 108
0.1U K
C 109
0.1U K
C 110
0.1U K
C 111
0.1U K
C 112
0.1U K
C 113
0.1U K
C103
0.01U K
20L0BI
48.M 2306 .A00
VIDEO BOARD
W ednesday, September
17, 2003
+
1
R5 0
681F
+
2
C8 3
0.1U K
C6 0
0.1U K
P3P3V
L5
L8
C8 2
0.1U K
C5 9
0.1U K
: 0X64
P2P5V
C8 1
0.1U K
HY 57 V641620HGT -6
P3P3V
P2P5V
C8 0
0.1U K
40
36
42 OHM
C7 3
0.1U K
C7 9
0.1U K
NC/RFU
NC
RAMD 15
RAMD 14
RAMD 13
RAMD 12
RAMD 11
RAMD 10
RAM D9
RAM D8
RAM D7
RAM D6
RAM D5
RAM D4
RAM D3
RAM D2
RAM D1
RAM D0
4M*1 6 SDRAM
V33 D
Chan ge color space from
RGB8 88 to YUV 444
C7 8
0.1U K
53
51
50
48
47
45
44
42
13
11
10
8
7
5
4
2
R4 8
0
VIDE O_RESET
RC LK
P3P3V
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
PW1230
DI_RE SET
1
2
3
4
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
BA0
BA1
U5D
P3P3V
R3 0
R3 2
R3 4
R3 6
R3 7
SCL
SDA
35
22
34
33
32
31
30
29
26
25
24
23
20
21
R2 7
P3P3V
PW1230
PW1230
DG0 47
DG1
DG2
DG3
U6
RA MA11
RA MA10
RAM A9
RAM A8
RAM A7
RAM A6
RAM A5
RAM A4
RAM A3
RAM A2
RAM A1
RAM A0
RA MA12
RA MA13
5 RR ASn
6 RC ASn
7 RW En
8
4
33
3
2
RN
8
1
49
43
9
3
27
14
1
DG0
DG1
DG2
DG3
DG4
DG5
DG6
DG7
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
VDDQ
VDDQ
VDDQ
VDDQ
VD D
VD D
VD D
VG0
VG1
VG2
VG3
VG4
VG5
VG6
VG7
19
49
77
112
134
187
219
251
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
15
16
17
18
20
21
22
23
[P. 1]
6
12
46
52
28
41
54
SVHS
SVVS
SVC LK
SVC LK
SVPE N
SVVS
SVHS
BU 0
BU 1
BU 2
BU 3
BU 4
BU 5
BU 6
BU 7
1
2]
2]
2]
2]
2]
2]
2]
5
6
7
RN 10 8
5
47
6
7
RN 11 8
47
2
[P.
[P.
[P.
[P.
[P.
[P.
[P.
4
3
2
1
4
3
2
1
GN D
DU V0
DU V1
DU V2
DU V3
DU V4
DU V5
DU V6
DU V7
DB 0
DB 1
DB 2
DB 3
DB 4
DB 5
DB 6
DB 7
1
DU V[0..7 ]
[P. 2]
110
111
113
114
116
117
118
119
2
[P. 2]
0
1
2
3
4
5
6
7
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
1
DY
DY
DY
DY
DY
DY
DY
DY
VB0
VB1
VB2
VB3
VB4
VB5
VB6
VB7
U5C
P2P5V
2
DY[0..7 ]
1
2
3
4
6
7
8
9
U5 B
1
BU [0..7]
U5 A
C7 7
10U
16V
C7 2
47U
16V
C7 6
0.1U K
C6 1
0.1U K
C6 2
0.1U K
VIDEO SIGNAL PROCSSING - TRAITEMENT VIDEO - VIDEO SIGNALVERARBEITUNG - ELABORAZIONE VIDEO - TRATAMIENTO VIDEO
( VIDEO BOARD 4/6, 20”BI)
VCC
C 114
0.1U K
+9V
R5 1
68K
R5 2
10 0
J6
3
5
6
3
C117
TP 56
4
4
R5 6
+5VS
0
R5 4
R5 5
4
3
LI1
2
1K
R5 7
R5 8
R5 9
22K
22K
D1
D2
2210018561
2
TZ MC 5V1
R6 0
DN1
BAV99
75
3
TZMC5V1
TZMC5V1
1
1
TP 57
AV_SEL
[P. 1]
U2C
CVBS
[P. 1]
RI 1
[P. 4]
5
4
3
VIDEO_I N
74HC 4053
1
2
2N3904
2N3906
D4
J7
.
G1
1000 OHM
L11
TP 58
3
VCC
C120
+
Y
Bott om View
+5VS
1
TP 41
S1
R323
10 0
75
1
G2
3
.
2
C
4
C 189
0.1U K
R316
68K
R7 1
TP 59
G1
G1
S1
10 U 16V
DN2
BAV99
Q305
2N3904
R318
2
4
1000 OHM
L12
2210289001
0
S_Y
1K
VCC
C124
+
G3
[P. 2]
R311
R317
68K
+5VS
INPUT_D ET
10 U 16V
C 122
0.1U K
R7 2
68K
DN3
BAV99
Q6
2N3904
R7 7
R7 4
10 0
R8 2
R7 6
68K
75
R8 0
[P. 2]
0
S_ C
1K
+9V
1000 OHM
L42
VCC
CVBS_SEL
C 130
0.1U K
0.1U K
C133
+9V
22
R345
TP 10 9
TP 11 0
TP 61 1
3
5
7
9
11
13
2
4
6
8
10
12
14
L13 1000 OHM
10 0
R8 9
R9 1
10 0
R7 3 NC_R0603
TP 62
TP 63
TP 65
TP 66
TP 68
TP 69
TV
R9 5
68K
[P. 5] SCART _CVBS
1K
R9 7
0
CVBS_VD
HIGH
SCART_CVBS
12
U2 A
13
74HC 4053
14
VIDEO_I N
110 U 16V
C1902
+
TP 64
CVBS_SEL
Output
LO W
6
7
8
J8
[P. 1]
R9 4
13.2 2032.092
R254
47 0
+9V
Q9
2N3904
R9 0
10 0
10 U 16V
+
10 U
16V
R8 8
68K
11
R253
56 0
C129
16
C128
+
R344
T UNER_ DE T
T UNER_ACK
SCL _TV
SDA _TV
[P. 6]
[P. 1]
10 0
[P. 5]
Q22
2N3904
R9 2
68
VIDEO_ OU T
Q23
2N3906
R251
1K
2060201207
RI 2
R333
NC_R0603
SC ART _LOUT
[P. 5]
47 0
SCART_R OU T
[P. 5]
Q11
Q10
C201
3 3
2
1
SC L
[P. 1]
1
2
Q12 BSN20
3
BSN20
BSN20
Q13
3
2
BSN20
SDA
[P. 1]
NC_C0603
C204
C202
NC_C0603
2
LCD03B
First issue 10 / 03
47 0
C203
1
13
R109
R110
SC ART _LOUT
3.3K
2
3.3K
Top View (ST)
14
[P .1 ]
V33 D
1
R107
SCART_R OU T
LI2
VCC
1
NC_R0603
R108
R332
[P .1 ]
NC_C0603
NC_C0603
20L0BI
VIDEO BOARD
48.M 2306 .A00
W ednesday, September 24, 2003
CVBS_V D
[P .2 ]
TZ MC 5V1
D3
[P. 1]
1K
1K
3
2
TV
10 U 16V
6
1
HIGH
9
5
R5 3
68K
+
Bott om View
1000 OHM
L10
CVB S_IN
TP 55
6
16
5
OUTPUT
CVBS
6
7
8
TP 54
C 116
0.1U K
C115 +
10 U
16V
Q3
2N3904
AV_SEL
LO W
VIDEO SIGNAL PROCSSING - TRAITEMENT VIDEO - VIDEO SIGNALVERARBEITUNG - ELABORAZIONE VIDEO - TRATAMIENTO VIDEO
( VIDEO BOARD 5/6, 20”BI)
J9
+5VS
[P. 4]
[P. 4]
D6
1000 P J
0
TP 72
3
TP 75
D8
R327
0
SCART_AL_I N
8
TP 76
R328
0
SCART_S WI TC H
CL K_OU T
10
11
TP 77
L14
SCART_CVBS_
[P. 5]
D1 3
12.4~14. 1V
TP 79
DA TA _OUT
12
[P. 5]
C 140
0.1U K
R113
68K
1000 OHM
IN
C143
[P. 5]
+
D7
TP 74
7
TP 78
N
SC ART _AR_I N
6
9
SC ART_GREEN_I
0
[P. 5]
5
SCART _BLUE_ IN
R326
TP 73
4
Q14
2N3904
R114
10 0
10 U 16V
R115
[P .2 ]
R116
0
R117
68K
75
SCART _CVBS
13
14
TP 80
SCART_ RED_IN
L43
15
D1 6
17
TZ MC 5V1
TP 83
20
21
SCART_CVBS_
1K
SCART _BLN K
1000 OHM
18
19
TZMC5V1
R118
TP 81
16
[P. 5]
TP 82
TZMC5V1
TP 71
VCC
DN6
BAV99
[P. 5]
2
[P. 5]
TZMC5V1
D5
1
R325
C142
1000 P J
C141
TZMC5V1
TP 70
D1 4
SC ART _LOUT
0
IN
TZMC5V1
SCART_R OU T
R324
[P. 5]
2210285001
R125
[P. 2]
SCART_AL_I N
75
R119
1K
R120
1K
LI4
[P. 1]
[P. 5]
D9
SC ART _AR_I N
TZ MC 5V1
D1 0 T ZM C 5V1
RI 4
[P. 1]
[P. 5]
1
D1 1 T ZM C 5V1
R122
22K
D1 2 T ZM C 5V1
2
3
L15
R121
22K
+5VS
DN8
BAV99
+5VS
VIDEO_ OU T
1000 OHM
DN9
BAV99
[P. 4]
C 205
0.1U K
1000 OHM
L16
SCART _BLUE_ IN
[P. 5]
SCART _BLU E
[P .2 ]
R126
75
Mode 1 Mode 2
Auto
0
0
3.5-8.6V
1
0
16:9
0-3.5V
1
1
Manua l
+5VS
DN 10
BAV99
2
8.6-12V
C 206
0.1U K
+5VS
3
R225
SC ART_GREEN_I
10K
SCART_S WI TC H
3.4 9V
[P. 5]
1.4 0V
R218
10K
R219
3.9K
IN1+ OUT1
IN1-
1
R220
100K
R221
100K
5
6
IN2+ OUT2
IN2-
7
10
9
IN3+ OUT3
IN3-
8
12
13
IN4+ OUT4
IN4-
14
11
R222
NC_R0603
Q15
2N3904
Q16
2N3904
R223
R127
0
SC ART_ MO DE 1 [P.
6]
SC ART_ MO DE 2 [P.
6]
TV_DET
[P .2 ]
+5VS
[P. 1]
DN 11
BAV99
High Active
C 207
0.1U K
3
NC_R0603
SCAR T_ RED_IN
1000 OHM
L18
[P. 5]
SC AR T_ RE D
R138
LMV3 24M
75
20L0BI
VIDEO BOARD
48.M 2306 .A00
W ednesday, September
LCD03B
First issue 10 / 03
SCART_GR EEN
R132
75
U1 5
GND
R245
6.8K
3
2
[P .5 ]
10K
2
0V ~4.85V
1000 OHM
L17
1
4
R217
10K
V+
R216
4.3K
R215
10K
N
1
R224
+5VS
24, 2003
[P .2 ]
VIDEO SIGNAL PROCSSING - TRAITEMENT VIDEO - VIDEO SIGNALVERARBEITUNG - ELABORAZIONE VIDEO - TRATAMIENTO VIDEO
( VIDEO BOARD 6/6, 20”BI)
+2. 5V
+3.3VDA C
C168
VCC
WP
SCL
SDA
NC_R0603
NC_R0603
C172
0
0
0.1U K
R181
NC_R0603
TP 84
R241
[P. 1]
[P. 1]
NC_R0603
V er P114V004
SCL
SDA
0.1U K
U1 4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
Ve r P115
R239
R240
CVBS_INPUT
C171
0.1U K
V er P114V004
R237
R238
EE _SCL
EE _SDA
AT 24C02
[P. 4]
C170
+3.3VDA C
+3.3VDA C
R242
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
VDD 2.5
VSS
VDD 3.3
CVBS
VDDA 2.5
VSSA
P2.0
P2.1
P2.2
P2.3
HS/SSC
VS
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
SDA555x FL
NC_R0603
I2C
Ve r P115
R243
R244
P1.7
P1.6
P1.5
P1.4
P1.3
P1.2
P1.1
P1.0
VDD 3.3
VSS
VDD 2.5
BLANK/COR
B
G
R
VDDA 2.5
VSSA
XTAL1
XTAL2
RSTP4.3
P4.2
VDD 3.3
VSS
P3.7
P3.6
0
0
: 0X60
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
LAN G3
LAN G2
LAN G1
+2. 5V
R189
R190
R191
R192
R193
C169
0.1U K
8
7
6
5
[P. 6]
[P. 6]
[P. 6]
+3.3VDA C
LA NG 3
LA NG 2
LC B
IN FO
LIST
I2C_ EN
RG B_GAIN
R174
R175
R176
R177
R178
NC_R0603
0
NC_R0603
0
NC_R0603
LA NG 1
TT_FSB
TT_ B
TT _G
TT_R
R179
R180
R182
R183
0
0
0
0
FS B
BLUE
GRE EN
RED
+3. 3V
+3. 3V
Y3
R252
R144
68
R143
22 0
TT_ RSTn
0
R236
R184
10K
+ C176
10 U
16V
6M HZ
C 177
33 P J
R149
33 0
C 178
33 P J
RED
R185
0
[P. 2]
SVHS
R186
0
47
TT_BLNK
[P. 2]
10
10
10
TEX T_ B
TEX T_ G
TE XT _R
[P. 2]
[P. 2]
[P. 2]
2N3906
Q20
2N3906
Q21
BLUE
SVVS
R148
R150
R151
R152
2N3906
Q19
GRE EN
[P. 2]
R146
68
R145
68
Q18
2N3904
FS B
NC_R0603
NC
NC
NC
GND
R172
4.7K
R171
4.7K
U1 3
1
2
3
4
+2.5VDA C
0.1U K
0
NC_R0603
0
NC_R0603
0
+2.5VDA C
C 167
0.1U K
[P. 1]
[P. 1]
SCL
SDA
R159
NC_R0603
3.3K
R158
NC_R0603
+3.3VDA C
R157
U9
VCC
+3.3VDA C
LD1117-3. 3
2
+
BEAD
C 150
47U
16V
C 152
0.1U K
+
C 153
10U
16V
R160
20L0BI
VIDEO BOARD
48.M 2306 .A00
W ednesday, September
U1 2
VCC
+2.5VDA C
VIN
VOUT
L21
2
BEAD
C 164
0.1U K
1
GND
3
R169
681F
LM317 M
R170
681F
+
C 166
10U
16V
+3.3VDA C
PI N1 1
PI N3 0
C 173
0.1U K
LCD03B
First issue 10 / 03
+2. 5V
PI N4 4
C 174
0.1U K
C 175
0.1U K
+
C 162
47U
16V
C 165
0.1U K
+
C 163
10U
16V
24, 2003
NC_R0603
VOUT
1
C 151
0.1U K
+3. 3V
L19
1
VIN
2
GND
3
R161
R162
C161
0.1U K U1 1
16 VDD
14
15
SCL
SDA
13
INT
1
2
3
A0
A1
A2
P00
P01
P02
P03
P04
P05
P06
P07
GND
PCA9554P W
I2C : 0X48
3.3K
3.3K
4
5
6
7
9
10
11
12
8
LAN G1 [P .6
LAN G2 [P .6
LAN G3 [P .6
SCART _F B_EN
T UNER_ DE T
SC ART_ MO DE 1
SC ART_ MO DE 2
]
]
]
[P .4 ]
[P .5 ]
[P .5 ]
BLOCK DIAGRAM - SCHEMA SYNOPTIQUE - BLOCKSCHALTBILD - SCHEMA A BLOCCHI ESQUEMA DE BLOQUES
INTEGRATED CIRCUITS BLOCK DIAGRAM
15”, 20"
PortC PortB PortA
(7:0) (7:0) (7:0)
2-Wire
Serial
16-Bit
Microprocessor
Processor ROM
RAM Interface
Wtchdog
Timers
L/R Audio
Input
Teltext
SDA555XFL
Composite
Video
GVS
GHS
GCLK
VVS
VHS
VCLK
Scaler
Sync
Decoder
And Timer
Auto Image
Optimisation
Power On
Reset
GREF GFBK
OSD
and
Gain
Color
Matrix
Color
LooKup
Tables
Interrupt
Controller
UART
PLL
and
Oscillator
X1
DRGB
(23:0)
DRGB
(23:0)
DVS,DHS
DEN,DCLK
PW113 Image Processor
Internal Block Diagram
X0
De-Interlace
Chipset
PW1230
SCART
Video
Decoder
VPC3230D
Reset
Color
Space
Expander
Display
Timing
Generator
MCLK DCLK UCLK
Reset
S-Video
Video Board
GRGB
(23:0)
TxD RxD
Microprocessor BUS
Graphic
or Video
Port Pixel
Processing
YPbPr
to
RGB
NMI
OnScreen
Display
Memory
Buffer
YUV
to
RGB
60 pin
60 pin golden finger
Main Board
Memory Unit
Film-Mode
Detection
(3:2&2:2)
Input Unit
Secondary
Video Port
ITU-R BT 6656
Audio Line Out
Audio Processor
TDA7440D
Video
Unit
Motion
Detection
&
Noise
Reduction
Previous
Video
I-Channel
Premary
Picture
(l/P)
P-Channel
Digital
Graphic Port
24-Bit
Display Unit
I-Channel
Display
Timing
Deinterlacer
Digital
Output
Timing
Up
Scaler
P-Channel
RGB
Down
Scaler
Video
Enhancement
YUV
Audio Input
CSC
Two-Wire
Interface
Proramming Unit
Color
Lut
PW1230
Interna Block Diagram
D-Sub
DDC
IR
Decoder
VYUV
(7:0)
Premary
Video Port
ITU-R BT 601
AD
AD9883
12 pin
12 pin
Control
Board
Keypad/IR Interface
4
PWM
Processor
Memory
Interface
14 pin
14 pin
Scaller
PW113
15" model only**
20" model only*
30 pin**
40 pin**
50 pin*
EEPROM
Flash
AT49BV8192A
20 pin
20 pin
30 pin**
50 pin*
LCD Panel
40 pin**
8
pin
8
pin
Inverter
15" ,20"
System Block Diagram (EU version)
Tuner Module
Tuner
2
pin
PFC/DC+DC/Audio Board
2
pin
Power
Connector
GPIO
A
D
CS
(19:1) (15:0) (1:0)
JTAG Debugger
LCD03B
First issue 04 / 04
LCD03B
First issue 04 / 04
63
Blue
Screen
VSync/
HSync DACs
Timing
Analog
Output
Digital
Output
Data
INFORMATION - INFORMATIONS - INFORMATIONEN
INFORMAZIONE - INFORMACIONES
PSEN
RD
WR
SDA55XX
A { 0 to 15 }
D { 0 to 7 }
ALE
A { 16 to A20 }
INTEGRATED CIRCUITS BLOCK DIAGRAM
Analog / MUX
ADC
ADC
EN
Chassis group table
1 - The electronic chassis configuration (modules) and schematic diagram page numbers.
2 - The chassis configuration.
FR
Le tableau ci-dessous regroupe :
1 - L’environnement électronique de chaque chassis (modules) et le numéro de page où il est décrit.
2 - La désignation des chassis
DE
Die nachstehendeTabelle umfaßt:
1 - Die elektronischen Baugruppen (Module) der Chassis varianten und die Seiten auf der sie beschrieben werden
2 - Die Chassisbezeichnung
IT
La tabella qui di seguito contiene:
1 - l’ambiente elettronico di ogni telaio (moduli) e il numero di pagina nella quale è descritto.
2 - La descrizione dei telai
ES
El cuadro siguiente agrupa:
1 - El entorno electrónico de cada chasis (módulos) y el número de página donde está descrito.
2 - La designación de los chasis
Slicer
Memory
Extension
STACK
128x8
RAM
256x8
Capture Control
PWM
Acquisition Interface
128K x8
ADC
Interface
WDT
P { 0 to 04}
Acquisition
PROGRAM ROM
Memory
Extension / Unit
Peripheral
BUS
Interface
XRAM
SRAM
Counter 0
16K x8bit
BUS
Arbiter
CORE
Counter 1
Interrupt
Contoller
Port Logic
Caracter
ROM
UART
16K x8bit
RAM / ROM Interface
SFRs
Display Logic
CLOCK &
Sync
System
H
V
DISPLAY GENERATOR
CLUT
Display
REGs
BLANK / COR
FIFO
DAC's
R G
CIN
VIN1
VIN2
VIN3
VIN4
VOUT
71
72
Adaptive
Comb
Filter
Analog
Front-end
73
Color
Decoder
Y
NTSC
PAL
SECAM
Cr
74
75
AGC
2 x ADC
NTSC
PAL
79
FB
RGB/
YCrCb
4..6
Processing Y
Analog
Component U/B
Cr
Matrix
Front-End
Contrast
V/R
Saturation Cb
Brightness
4 x ADC FB
FB
Tint
Output
Formatter
2D Scaler
PIP
Cr Panorama
ITU-R 656
ITU-R 601
Mode
Peacking
Cb Contrast
Brightness
Saturation
Tint
70
1..3
Y
Mixer
Cb
Y/G
RGB/
YCrCb
B
Memory
Control
VPC3230
31...34
37...40
41...44
47...50
18
19...23
27,28
I2
C Bus
Clock
Gen.
62
63
Sync
+
Clock
Generation
56
57
54
Chassis LCD03B
Y OUT
Reference
CrCb
OUT
15LCDM03B
YCOE
20LCDM03B
20LCDB03B
Information
Desassembly.
-
Service
Mode
FCB
-
KDB
-
Inverter
DC/DC
--
Audio
Board
Earphone
Board
Main
Video
3
3
3
6to7
6to7
8to9
10to15
10to15
10to15
“
“
“
16to18
16to18
16to18
23to24
23to24
-
19to20
21to22
21to22
25
25
25
26
26
26
27to41
27to41
27to41
42to58
42to58
42to58
FIFO
CNTL
LLClock
H Sync
V Sync
AVO
13,14
20.25 MHz I2C Bus
AD9883A
54
R AIN
G AIN
CLAMP
A/D
CLAMP
A/D
CLAMP
A/D
48
8 70...77
8
2...9
G OUTA
8 12...19
43
B AIN
37
HSYNC
CO AST
CLAMP
FILT
SCL
30
29
38
33
SD A
A0
55
B OUTA
MIDSCV
67
SYNC
PROCESSING
AND CLOCK
GENERATIO N
66
64
65
DTACK
HSOUT
VSOUT
SOGOUT
REF
56
57
R OUTA
SERIAL REGISTER
AND
POWER MANAGEMENT
58
REF
BYPASS
AD9883A
64
LCD03B
First issue 04 / 04
LCD03B
First issue 04 / 04
3
Couv_1&4_EU_ITC222
12/12/03 16:11
Page 1 (1,1)
This technical documentation is for use by maintenance technicians only
Documentation technique exclusivement destinée aux professionnels de la maintenance
Diese Angaben und Hinweise sind ausschließlich für den Service des Fachhändlers bestimmt
Documentazione tecnica destinata esclusivamente ai tecnici dell'assistenza
Documentación técnica destinada exclusivamente a los profesionales de mantenimiento
TV
SERVICE MANUAL
DOCUMENTATION TECHNIQUE
TECHNISCHE DOKUMENTATION
DOCUMENTAZIONE TECNICA
DOCUMENTACION TECNICA
Thomson multimedia
Scandinavia AB
Florettgatan 29 C
S-25467 Helsingborg (Sweden)
Tel. : 042 25 75 00
ITC222
Thomson multimedia
Sales UK Limited
30 Tower View
Kings Hill, West Malling
Kent ME19 4NQ (England)
Tel. : 44 (0) 173 252 0920
Thomson multimedia
Sales France
46, quai Alphonse Le Gallo
92648 Boulogne cedex
Tel. : 01 41 86 60 00
Minitel : 3616 ou 3623 TCEDS
Internet : http://www.thomson.fr
Thomson multimedia
Czech s.r.o.
ul. Dopravaku - dum Genius 1
Dolni Chabry
CZ - 18400 Prague 8
Tel. : (2) 688 67 70
Thomson multimedia
Switzerland
Seewenweg 5
CH-4153 Reinach
Tel. : (61) 716 96 60
Thomson multimedia
Sales Portugal
Avenida da Boavista, 3521
4106 Porto
Tel. : (2) 26 18 76 41
Thomson multimedia
Hungary KFT
Lajos u. 78. II.em.
H-1036 Budapest
Tel. : 00 36 14 5334/80
Thomson multimedia
Sales Italy S.p.A.
Via Leonardo da Vinci,43
20090 Trezzano sul naviglio (Milano)
Tel. : (02) 48 414 111
Thomson multimedia
Sales Spain
Avenida Isla Graciosa, 1
Edificio Áncora
Parque Empresarial La Marina
28700 San Sebastián de los Reyes (Madrid)
Tel. : (91) 384 14 19
The description and characteristics given here are of informative significance only, and non committal. To keep up the high quality of our products, we reserve the right to
make any changes or improvement without previous notice. • Les descriptions et caractéristiques figurant sur ce document sont données à titre d'information et non
d'engagement. En effet, soucieux de la qualité de nos produits, nous nous réservons le droit d'effectuer, sans préavis, toute modification ou amélioration. • Die
Beschreibungen und Daten in dieser Anleitung dienen nur zur Information und sind nicht bindend. Um die Qualität unserer Produkte ständig zu verbessern, behalten wir uns
das Recht auf Änderungen vor. • Le descrizioni e le caratteristiche date su questo documento sono fornite a semplice titolo informativo e senza impegno. Ci riserviamo il
diritto di eseguire, senza preavviso, qualsiasi modifica o miglioramento. • Las descripciones y características que figuran en este documento se dan a título de información y
no de compromiso. En efecto, en bien de la calidad de nuestros productos, nos reservamos el derecho de efectuar, sin previo aviso, cualquier modificación o mejora.
Thomson multimedia Sales Europe - S.A. au capital de
Thomson
Consumer Electronics Poland
ul.Gen.L. Okulickiego 7/9
05-500 Piaseczno (Varsovie)
Tel. : (22) 757 10 80
30 000 000 - Siège : 46, quai Alphonse Le Gallo 92100 Boulogne France - RCS Nanterre B 322 019 464
Thomson multimedia
Sales Germany GmbH & Co oHG
Karl-Wiechert-Allee 74
30625 Hannover
WARNING :
ATTENTION :
ACHTUNG :
ATTENZIONE :
IMPORTANTE :
Before servicing this chassis please read the safety recommendations.
Avant toute intervention sur ce châssis, lire les recommandations de sécurité.
Vor jedem Eingriff auf diesem Chassis, die Sicherheitsvorschriften lesen.
Prima di intervenire sullo chassis, leggere le norme di sicurezza.
Antes de cualquier intervención, leer las recomendaciones de seguridad.
Code : 357 388 00 - 1203 / 6M - ITC222 - Print.
No copying, translation, modification on other use authorized. All rights reserved worldwide. • Tous droits de reproduction, de traduction, d'adaptation et d'exécution réservés pour tous les pays. • Sämtliche Urheberrechte an diesen Texten und Zeichnungen stehen uns zu. Nachdrucke,
Vervielfältigungen - auch auszugsweise - nur mit unserer vorherigen Zustimmung zulässig. Alle Rechte vorbehalten. • I diritti di riproduzione, di traduzione, e esecuzione sono riservati per tutti i paesi. • Derechos de reproduccion, de traduccion, de adaptacion y de ejecucion reservados para todos los paises.