Download LCD TV SERVICE MANUAL

Internal Use Only
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LCD TV
SERVICE MANUAL
CHASSIS : LD89A
MODEL : 32LG6000
32LG6000-ZA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
CONTENTS
CONTENTS .............................................................................................. 2
PRODUCT SAFETY ..................................................................................3
SPECIFICATION ........................................................................................6
ADJUSTMENT INSTRUCTION .................................................................9
TROUBLE SHOOTING ...........................................................................12
BLOCK DIAGRAM...................................................................................20
EXPLODED VIEW .................................................................................. 30
SVC. SHEET ...............................................................................................
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
-2-
LGE Internal Use Only
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by
in the
Schematic Diagram and Replacement Parts List.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1W), keep the resistor 10mm away from PCB.
Do not use a line Isolation Transformer during this check.
Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
AC Volt-meter
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1MΩ and 5.2MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
To Instrument's
exposed
METALLIC PARTS
-3-
0.15uF
Good Earth Ground
such as WATER PIPE,
CONDUIT etc.
1.5 Kohm/10W
LGE Internal Use Only
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conflict between the
following servicing precautions and any of the safety precautions on
page 3 of this publication, always follow the safety precautions.
Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board
module or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug or
other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an
explosion hazard.
2. Test high voltage only by measuring it with an appropriate high
voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10% (by volume) Acetone and 90% (by
volume) isopropyl alcohol (90%-99% strength)
CAUTION: This is a flammable mixture.
Unless specified otherwise in this service manual, lubrication of
contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks are
correctly installed.
7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test fixtures specified in this
service manual.
CAUTION: Do not connect the test fixture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily
by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some field-effect transistors and
semiconductor "chip" components. The following techniques
should be used to help reduce the incidence of component
damage caused by static by static electricity.
1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground.
Alternatively, obtain and wear a commercially available
discharging wrist strap device, which should be removed to
prevent potential shock reasons prior to applying power to the
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
unit under test.
2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or
exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES
devices.
4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as "anti-static" can generate
electrical charges sufficient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate
electrical charges sufficient to damage ES devices.
6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads
electrically shorted together by conductive foam, aluminum foil
or comparable conductive material).
7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material
to the chassis or circuit assembly into which the device will be
installed.
CAUTION: Be sure no power is applied to the chassis or circuit,
and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged
replacement ES devices. (Otherwise harmless motion such as
the brushing together of your clothes fabric or the lifting of your
foot from a carpeted floor can generate static electricity
sufficient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate
tip size and shape that will maintain tip temperature within the
range or 500°F to 600°F.
2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500°F to 600°F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suctiontype solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
(500°F to 600°F)
b. First, hold the soldering iron tip and solder the strand against
the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there
only until the solder flows onto and around both the
component lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.
-4-
LGE Internal Use Only
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent flat against the
circuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by gently
prying up on the lead with the soldering iron tip as the solder
melts.
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing the
IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close as
possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining
on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit
board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever
this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC
connections).
1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the good
copper pattern. Solder the overlapped area and clip off any
excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly
connected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as
possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
-5-
LGE Internal Use Only
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. General Specification(TV)
No.
Item
Specification
1.
Video input applicable system
PAL-D/K, B/G, I, SECAM
2.
Receivable Broadcasting System
1) PAL/SECAM B/G
Remark
EU(PAL Market)
2) PAL/SECAM D/K
3) PAL I/II
4) SECAM L/L’
5) DVB-T
3.
RF Input Channel
VHF : E2 ~ E12
UHF : E21 ~ E69
CATV : S1 ~ S20
HYPER : S21~ S47
PAL
4.
Input Voltage
100-240V~ /50Hz, 60Hz
5.
Market
English/ Germany/ Denmark/ Spain/ France/
25 Country
Italy/ Greece/ Netherlands/ Norway/ Sweden/
Finland/ Portugal/ Hungary/ Poland/ Rumania/
Croatia/ Slovenia/ Czech/ Serbia/ Bulgaria/
Russia/ Luxemburg/Belgium/ Swiss/Austria
6.
Picture Size
32 inch
32LG6000
7.
Tuning System
FVS 100 program
PAL, 200 PR.(Option)
8.
Operating Environment
1) Temp : 0 ~ 40 deg
LGE SPEC
2) Humidity : 10 ~ 90 %
9.
Storage Environment
3) Temp : -20 ~ 50 deg
LGE SPEC
4) Humidity : 10 ~ 90 %
10.
Display
LCD Module
LPL
2. General Specification(LCD Module)
No.
Item
Specification
Unit
Remark
1.
Panel
32” TFT WXGA LCD
32LG6000
2.
Frequency range
H : 45 ~ 50Khz, V : 47 ~ 63Hz
32 inch
3.
Power consumption
≤ 4.2 + 92.4
4.
LCD Module-LPL (42inch)
Type Size
760.0 x 450.0 x 48.0
mm
Pixel Pitch
170.25 µm x 510.75 µm
mm
Pixel Format
W
LCD + Backlight
(H) x (V) x (D)
1366 horiz. By 768 vert. Pixels
RGB stripe arrangement
Coating
Hard coating(3H), Anti-glare
treatment of the front polarizer
(Haze 13%)
Back Light
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
12 Lamp(EEFL)
-6-
LGE Internal Use Only
3. Component Video Input (Y, PB, PR)
No.
Specification
Resolution
Remark
H-freq(kHz)
V-freq(Hz)
1.
720X480
15.73
60.00
SDTV, DVD 480i
2.
720X480
15.63
59.94
SDTV, DVD 480i
3.
720X480
31.47
59.94
SDTV, 480p
4.
720X480
31.50
60.00
SDTV, 480p
5.
720X576
15.625
50.00
SDTV, DVD 625 Line
6.
720X576
31.25
50.00
HDTV 576p
7.
1280X720
45.00
60.00
HDTV 720p
8.
1280X720
44.96
59.94
HDTV 720p
9.
1280X720
37.50
50
10.
1920X1080
31.25
50.00
HDTV 1080i
HDTV 720p 50Hz
11.
1920X1080
33.75
60.00
HDTV 1080i
12.
1920X1080
33.72
59.94
HDTV 1080i
13.
1920X1080
56.25
50.00
HDTV 1080P
14.
1920X1080
67.433
59.94
HDTV 1080P
15.
1920X1080
67.50
60
HDTV 1080P
H-freq(kHz)
V-freq(Hz)
Pixel clock(MHz)
4. RGB input (PC)
No.
Specification
Resolution
Remark
1.
720X400
31.468
70.08
28.32
2.
640X480
31.469
59.94
25.17
3.
800X600
37.879
60.31
40.00
VESA
4.
1024X768
48.363
60.00
65.00
VESA(XGA)
5.
1280X768
47.78
59.87
79.5
VESA(WXGA)
6.
1360X768
47.72
59.8
84.625
VESA(WXGA)
7.
1920X1080
66.647
59.988
138.625
WUXGA
8.
1280X1024
63.981
60.02
108
SXGA(Only FHD)
9.
1400X1050
65.317
59.978
121.75
SXGA(Only FHD)
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
-7-
VESA
LGE Internal Use Only
8. HDMI DTV
No.
Resolution
H-freq(kHz)
V-freq(Hz)
Pixel clock(MHz)
Remark
Proposed
1.
640X480
31.469
59.94
25.175
SDTV 480p 60Hz
2.
640X480
31.469
60
25.20
SDTV 480p 60Hz
3.
720X480
31.47
59.94
27.00
SDTV 480p 60Hz
4.
720X480
31.50
60
27.027
SDTV 480p 60Hz
5.
720X576
31.25
50.00
27.000
SDTV 576p 50Hz
6.
1280X720
37.50
50.00
74.176
HDTV 720p 50Hz
7.
1280X720
44.96
59.94
74.176
HDTV 720p 60Hz
HDCP
8.
1280X720
45.00
60
74.250
HDTV 720p 60Hz
HDCP
9.
1920X1080
28.125
50.00
74.250
HDTV 1080i 50Hz
HDCP
10.
1920X1080
33.72
59.94
74.176
HDTV 1080i 60Hz
HDCP
11.
1920X1080
33.75
60
74.250
HDTV 1080i 60Hz
HDCP
HDCP
12.
1920X1080
27.000
24.00
74.250
HDTV 1080P 24Hz
HDCP
13.
1920X1080
33.750
30
74.25
HDTV 1080P 30Hz
HDCP
14.
1920X1080
56.25
50.00
148.500
HDTV 1080P 50Hz
HDCP
15.
1920X1080
67.433
59.94
148.352
HDTV 1080P 60Hz
HDCP
16.
1920X1080
67.50
60
148.500
HDTV 1080P 60Hz
HDCP
9. HDMI PC
No.
H-freq(kHz)
V-freq(Hz)
Pixel clock(MHz)
1.
720X400
Resolution
31.468
70.08
28.32
Remark
2.
640X480
31.469
59.94
25.17
VESA
3.
800X600
37.879
60.31
40.00
VESA
4.
1024X768
48.363
60.00
65.00
VESA(XGA)
5.
1280X768
47.78
59.87
80.125
VESA(WXGA)
6.
1360X768
47.72
59.8
84.625
7.
1280X1024
63.981
60.02
108
SXGA(Only FHD)
8.
1400X1050
65.317
59.978
121.75
SXGA(Only FHD)
9.
1920*1080
66.647
59.988
138.625
WUXGA
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
-8-
VESA(WXGA)
LGE Internal Use Only
ADJUSTMENT INSTRUCTION
3.1 ADC adjustment
1. Application Range
This spec. sheet is applied to all of the LD89A chassis
manufactured at LG TV Plant all over the world.
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25±5°C of temperature and 65±10% of relative humidity if
there is no specific designation.
(4) The input voltage of the receiver must keep 100-240V,
50/60Hz.
(5) The receiver must be operated for about 15 minutes prior
to the adjustment.
- After RGB Full White in HEAT-RUN Mode, the receiver
must be operated prior to the adjustment.
- Enter into HEAT-RUN MODE
1) Press the “POWER ON” KEY on Adjustment R/C.
2) Press the “ADJ KEY” on Adjustment R/C.
3) Select “3. Test Pattern” by using D/E(CH +/-) and
press ENTER(A)
4) Select “White” by using F / G (VOL +/-) and press
ENTER(A)
* Set is activated HEAT run without signal generator in this
mode.
* Single color pattern ( RED / BLUE / GREEN ) of HEAT
RUN MODE uses to check panel.
* Caution : If you turn on a still pattern more than 20
minutes (Especially digital pattern, cross hatch pattern),
an after image may be occur in the black level part of the
screen.
3.2 PCMCIA CARD Checking Method
You must adjust DTV 29 Channel and insert PCMCIA CARD
to socket.
1) If PCMCIA CARD works normally, normal signals display
on screen. But it works abnormally, “No CA module” words
display on screen.
* Caution: Set up “RF mode” before launching products.
4. Set Assembly adjustment method
4.1 EDID (The Extended Display Identification DATA)
* When company internal production(total assembly), EDID
data must scan in DDC line.
4.1.1 EDID Download
Before downloading EDID Data, check the RGB/HDMI cable
is disconnected.
1) Press ADJ key on Adjustment R/C.
2) Select “5.EDID D/L” by using D / E (CH +/-) and press
ENTER(A)
3) Select “Start” by using F/G(VOL +/-) and press ENTER(A)
4) EDID DownLoad is executed if word “NG” is changed to
“OK” about all HDMI ports.
Caution: Using ‘power on’ button of the Adjustment R/C ,
power on TV.
4.1.2 EDID Data
* ADC Calibration Protocol (RS232)
CMD1 CMD2 Data0
Adjust ‘Mode In’
A
D
0
0
When transfer the ‘Mode In’,
A
D
1
0
Automatically adjustment
Adjust ‘Mode Out’
A
D
9
0
Adjustment
A
D
9
9
Adjust Mode
No
1
2
3
Carry the command.
ADC adjust ADC Adjust
NO SIGNAL
1) Press ADJ key on adjustment R/C.
2) Select “1. ADC calibration” by using D/E(CH +/-) and press
ENTER(A)
3) Select “Start” by using F/G(VOL +/-) and press ENTER(A)
4) ADC adjustment is executed automatically.
3. PCB assembly adjustment method
Enter
AV / Component / RGB input
NO SIGNAL or White noise
* Adjustment can be done using only internal ADC, so input
signal is not necessary.
* Required equipment : Adjustment R/C.
2. Specification.
Item
RF input
Item
Manufacturer ID
Version
Revision
Condition
GSM
Digital : 1
Digital : 3
Hex Data
1E6D
01
03
(The use of a internal pattern)
Confirmation
To check ADC Adjustment
on Assembly line.
- Baud rate : 115200 bps
- RS232 Host : PC
- echo : none
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
-9-
LGE Internal Use Only
1) HDMI1
4) HDMI4
2) HDMI2
- Detail EDID Options are below (ⓐ, ⓑ, ⓒ, ⓓ, ⓔ,)
ⓐ Product ID
ⓑ Serial No: Controlled on production line.
ⓒ Month, Year: Controlled on production line
: ex) Monthly : ‘09’ -> ‘09’
Year: ‘2006’ Ë ‘10’
ⓓ Model Name(Hex):
ⓔ Checksum: Changeable by total EDID data.
4.2. Adjustment of White Balance
(1) Test Equipment
- Color Analyzer (CS-1000, CA-100+(CH.9), CA-210(CH.9) )
- Please adjust CA-100+ / CA-210 by CS-1000 before
measuring
-> You should use Channel 9 which is Matrix compensated
(White, Red, Green, Blue revised) by CS-1000 and
adjust in accordance with White balance adjustment
coordinate.
* Color temperature standards according to CSM and Module
3) HDMI3
CSM
Cool
Medium
Warm
LCD
11000K
9300K
6500K
* Change target luminance and range of the Auto adjustment
W/B equipment.
Target luminance
Gamma
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 10 -
65
20
LGE Internal Use Only
* White balance adjustment coordinate and color temperature
Cool
X
Y
∆uv
Medium
X
Y
∆uv
Warm
X
Y
∆uv
CS-1000
0.276
0.283
0.000
CS-1000
0.285
0.293
0.000
CS-1000
0.313
0.329
0.000
CA-100+(CH.9)
0.276±0.002
0.283±0.002
0.000
CA-100+(CH.9)
0.285±0.002
0.293±0.002
0.000
CA-100+(CH.9)
0.313±0.002
0.329±0.002
0.000
(4) Manual white Balance
1) Press the ADJ KEY on Adjustment R/C.
Select “3. Test Pattern” by using D/E(CH +/-) and press
ENTER(A)
Select “White” by using F / G (VOL +/-) and press
ENTER(A) and heat run over 15 minutes.
2) Zero Calibrate CA-100+ / CA-210, and when controlling,
stick the sensor to the center of LCD module surface.
3) Press the ADJ KEY on Adjustment R/C
4) Select “2. White Balance” and press G(VOL +)
Set test-pattern on and display inside pattern.
5) Control is carried out on three color temperatures,
COOL, MEDIUM, WARM.
(Control is carried out three times)
< Temperature: COOL >
- R-Cut / G-Cut / B-Cut is set to 64.
- Control R-Gain and G-Gain.
- Each gain is limited to 192.
< Temperature: MEDIUM >
- R-Cut / G-Cut / B-Cut is set to 64.
- Control R-Gain and B-Gain.
- Each gain is limited to 192.
< Temperature: WARM >
- R-Cut / G-Cut / B-Cut is set to 64.
- Control G-Gain and B-Gain.
- Each gain is limited to 192.
* One of R Gain / G Gain / B Gain should be kept on
192, and adjust other two lower than 192.
(When R/G/B GAIN are all 192, it is the FULL
DYNAMIC Range of Module)
CA-210(CH.9)
0.276±0.002
0.283±0.002
0.000
CA-210(CH 9)
0.285±0.002
0.293±0.002
0.000
CA-210(CH 9)
0.313±0.002
0.329±0.002
0.000
- PC (for communication through RS-232C) -> UART Baud
rate : 115200 bps
(2) Connecting picture of the measuring instrument (On
Automatic control )
Inside PATTERN is used when W/B is controlled. Connect to
auto controller or push Adjustment R/C IN-START -> Enter
the mode of White-Balance, the pattern will come out.
(5) Input the Shipping Option Data
1) Push the ADJ key in a Adjustment R/C.
2) Input the Option Number that was specified in the BOM,
into the Shipping area.
3) The work is finished, Push A Key.
(3) Auto-control interface and directions
1) Adjust in the place where the influx of light like floodlight
around is blocked. (illumination is less than 10ux).
2) Adhere closely the Color Analyzer ( CA210 ) to the
module less than 10cm distance, keep it with the surface
of the Module and Color Analyzer’s Prove
vertically.(80~100°).
3) Aging time
- After aging start, keep the power on (no suspension of
power supply) and heat-run over 15 minutes.
- Using ‘no signal’ or ‘full white pattern’ or the others,
check the back light on.
5. Set Information
(Serial No & Model name)
5.1 Check the serial number & Model Name
1) Push the menu button in DTV mode.
2) Select the SETUP _ Select the Diagnostics.
3) Check the Serial Number.
- Auto adjustment Map(RS-232C)
RS-232C COMMAND
MIN
CENTER
[CMD ID DATA]
Cool
Max
(DEFAULT)
Medium Warm
Cool
Medium Warm
R Gain
jg
Ja
jd
00
192
192
192
G Gain
jh
Jb
je
00
192
192
192
255
B Gain
ji
Jc
jf
00
192
192
192
255
R Cut
64
64
64
128
G Cut
64
64
64
128
B Cut
64
64
64
128
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
255
- 11 -
LGE Internal Use Only
TROUBLE SHOOTING
1. Power Board
1-1. The whole flow chart which it follows in voltage output state
Start check
Does not screen
whole comes out?
Yes
No
Is it identical with
power off condition?
Is the interface
signal operated?
Yes
Yes
No
1. Check the Power off condition.
Does not
low voltage output
comes out?
Yes
Does not the
St-by 5V(P-5V) signal
comes out?
2. Check the interface signal condition.
No
Yes
Yes
No
Does not the
AC Detect signal
comes out?
4. Check the AC detect
signal circuit.
3. Check the St_by 5V
signal circuit.
No
Does not the
RL_ON/PWR_ON/OFF
comes out?
Yes
5. Check the VSC RL_ON
/PWR_ON/OFF signal.
No
Does not
inverter signal output
comes out?
Yes
Does not the
VSC signal INV_CTL
comes out?
No
Yes
No
Does not the
INV 24V voltage output
comes out?
Yes
7. Check the VSC INV_CTL signal?
8. Check the INV 24V
voltage output circuit.
Does not the
VSC Low voltage output
comes out?
Yes
6. Check the VSC low
Voltage output.
Manufacture enterprise
meaning of a passage.
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 12 -
LGE Internal Use Only
1-2. In case of No Power
(1) Symptom
1) It does not charge at module.
2) Front LED does not work.
(2) Check the followings
No
A power cord is plugged in with TV set?
Plug the power cord in.
Yes
No
Is AC-INLET Cable(Red+Blue) connected with th PSU?
Connect the AC-INLET Cable.
Yes
No
Are the fuses(F100, F101 or F700) OK on the PSU?
(check open or short status with Multi-meter)
Replace the fuse.
Yes
No
Is the PSU connected with Main Board though a 24pin cable?
Connect a 24p cable to PSU to Main(P1000)pin.
Yes
Measure output voltages(16V, 12V, 5V) on the PSU.
-> [Main P1000] pin1,2:16V; pin(5,6):12V; pin(9~12):5V;
If the measured values are not a proper value, replace PSU.
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 13 -
LGE Internal Use Only
2. Main Board
2-1. In case of No Raster
No problem
NG : always RED
Check LED A’ssy color.
Check LED A’ssy.
No problem
Replace PSU B/D or Main B/D.
NG
Replace LED A’ssy.
Check remote control
Power key off
No problem
Check inverter lamp
On/Of status.
Lamp On
status NG
Check Panel Error DET signal.
(P1000:pin17 or IC802:pin12)
No problem Is the inverter OK?
(INV_CTL
signal:P1000:pin20)
Lamp On status
Check LVDS Cable
1. Main B/D to FRC
2. FRC to T-CON
NG
Re MICOM S/W download
-> If not OK then replace
IC802
No problem
NG
Recheck PSU(+5V, +12V, +16V)
-> If not OK then replace PSU
Replace the LVDS Cable.
Replace PSU
No problem
No problem
No
problem
Check the PWM signal
(P1000, pin 22, 21)
Check P502,501 VDD voltage(pin1~4) 12V
if not OK -> Check Q501,L502,500, PANEL_VCC_EN signal
Check LVDS data signal(pin11~22, pin27~28)
If not OK -> Replace IC100(Replace Main B/D)
Replace the Main B/D.
NG
Re App S/W download.
If not OK then replace IC100.
No problem
Check FRC B/D
1. P102 pin(9~13) EN signal
2. Pin1,2:6V, pin4:3.3V, pin6,7:12V, supply status
3. IIC check(R109,R111)
4. P103:pin1~4 VDD 12V, LVDS Data pin P104
LVDS Data pin
NG
NG
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Replace the FRC B/D
- 14 -
LGE Internal Use Only
2-2. In case of abnormal display or sound when RF mode
Check Tuner
1. VDD Check -> TU300 pin22:1.8V
pin21: 3.3V
pin4:5V
2. IIC check -> pin1-,11
NG : DTV
Check ATV signal
1. Video signal
-> TU Main Signal : R336
-> Tuner V-out:C318
Check ATV sound signal
1. Sound signal
-> SIF : R317
-> SECAM-L sound:R326
NG
Replace TU300.
NG
Replace TU300.
Check Front END IC100
1. Check C518
NG : DTV
NG : DTV
Check DTV signal
1. TP signal -> Pin 24~34
2. IIC check -> pin 18,19
NG
Check App S/W.
If App S/W OK then
replace IC100.
No problem
NG
Replace TU300.
No problem
Check sound processor
1. IC603 pin50 for SIF(RF sound)
2. IC603 pin47 for SECAM-L sound
Replace Main B/D.
NG
Check App S/W.
If App S/W OK then replace IC603.
No problem
Check Digital AMP
1. VDD 16V:IC600 pin49~52, 32~35
VDD 1.8V:IC600 pin2, 13, 16
2. Mute check:IC600 pin25
No problem
Check App S/W.
If App S/W OK then replace Main B/D.
NG
Check App S/W
If App S/W OK then replace IC600.
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 15 -
LGE Internal Use Only
2-3. In case of abnormal display or sound when side AV1(SCART1) mode
Check Video, Audio
Check AV1 Jack
1. SCART1 LINK check
->R148 or JK100 pin17
Check video signal
Video NG 1. Red : JK100 pin15 and C508
2. Green : JK100 pin11 and C511
3. Blue : JK100 pin7 and C514
4. CVBS : JK100 pin20 and C1909
No problem
Replace IC100.
Audio NG
NG
Check Audio signal
1. R : JK100 pin2 and C679
2. L : JK100 pin6 and C692
Check the input source of Equipment.
No problem
Check App S/W.
If App S/W OK then replace IC603.
No problem
Check Digital AMP
No problem
1. VDD 16V : IC600 pin49~52, 32~35
VDD 1.8V : IC600 pin12,13,16
2. Mute check : IC600 pin25
Check App S/W.
If App S/W OK then replace Main B/D.
NG
Check App S/W.
If App S/W OK then replace IC600.
2-4. In case of abnormal display or sound when side AV2(SCART2) mode
Check Video, Audio
Check AV2 Jack
1. SCART1 LINK check
->R149 or JK101 pin17
Video NG
Check video signal
1. CVBS : JK101 pin20 and C519
Check App S/W.
If App S/W OK then
Replace IC100.
NG
Audio NG
Check Audio signal
1. R : JK101 pin2 and C690
2. L : JK101 pin6 and C627
No problem
Check the input source of Equipment.
No problem
Check App S/W.
If App S/W OK then replace IC603.
No problem
Check Digital AMP
No problem
1. VDD 16V : IC600 pin49~52, 32~35
VDD 1.8V : IC600 pin12,13,16
2. Mute check : IC600 pin25
Check App S/W.
If App S/W OK then replace Main B/D.
NG
Check App S/W.
If App S/W OK then replace IC600.
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 16 -
LGE Internal Use Only
2-5. In case of abnormal display or sound when VGA Input mode
Check Video, Audio
Check RGB Jack
1. RGB LINK check
->R189 or P101 pin10
No problem
or No sound
Check EDID EEPROM
1. IC102 VDD Check
-> pin8 : 5V
2. DDC IIC line check
-> IC102 pin 6, 5
No problem
Check EDID
1. Read EDID data
NG
No problem
EDID download
and recheck
NG
Check App S/W
If App S/W OK then replace IC102.
Check sink signal
1. H-sync : P101 pin13
2. V-sync : P101 pin14
No problem: case 2
Check Video & sink signal
1. Red : P101 pin1 and C501
2. Green : P101 pin2 and C502
3. Blue : P101 pin3 and C503
No problem : case 1
NG
Check 74HC14D IC103
1. H-sync : pin4
2. V-sync : pin8
3. If problem with IC103 then replace IC103
Check App S/W.
If App S/W OK then replace IC100.
NG
Check App S/W.
If App S/W OK then replace IC100.
2-6. In case of abnormal display or sound when Component Input mode
Check Video, Audio
Check Component Jack.
1. COMP LINK check
->R167 or JK102 pinA4
Video NG Check video signal
1. Y : JK102 pin3A and C509
2. Pb : JK102 pin5B and C512
3. Pr : JK102 pin5C and C515
No problem
Check App S/W.
If App S/W OK then
Replace IC100.
Audio NG
NG
Check Audio signal
1. R : JK102 pin3E and C614
2. L : JK102 pin5D and C613
NG
Check the input source of Equipment.
No problem
Check App S/W.
If App S/W OK then replace IC100.
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 17 -
LGE Internal Use Only
2-7. In case of abnormal display or sound when side AV3 mode
Check Video, Audio
Check AV3 Jack.
1. AV3 LINK check
->R187 or JK103 pin3
Video NG
Check video signal
1. CVBS : JK103 pin2 and C517
Audio NG
Check Audio signal
1. R : JK103 pin7 and C616
2. L : JK102 pin8 and C615
No problem
Check App S/W.
If App S/W OK then
replace IC100.
NG
NG
Check the input source of Equipment.
No problem
Check App S/W.
If App S/W OK then replace IC100.
2-8. In case of abnormal display or sound when HDMI1,2,3,4 mode
Check HDMI 5V_DET input
1. HDMI JK201, 202, 203 Pin20
NG
Check HDMI source.
If OK then replace HDMI JACK.
No problem
Check HDMI HPD Output
1. HDMI JK201, 202, 203 Pin19
No problem
or No sound
Check EDID EEPROM
1. IC201~4 VDD Check
-> pin8:5V
2. DDC IIC lin check
-> IC201~4 pin6,5
Video NG
Check EDID.
1. Read EDID data.
No problem
EDID download
and re-check
NG
Check App S/W.
If App S/W OK then replace IC201~4.
No problem
Check TMDS signal.
1. JK201~3, JK204 pin1~12
No problem
case HDMI4
Check App S/W.
If App S/W OK then replace IC100.
No problem : case HDMI1~3
Check TMDS 351 IC(IC200).
1. VDD check -> pin6,12,19,25,40,46,55,61:3.3V
2. HDMI SEL check -> pin33,32
No problem
Check TMDS351 TMDS signal check.
1. Pin17~27
NG
Check App S/W.
If App S/W OK then replace IC200.
No problem
Check App S/W.
If App S/W OK then replace IC100.
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 18 -
LGE Internal Use Only
2-9. In case of No sound
(1) Symptom
1) LED is green.
2) Screen display but sound is not output.
(2) Check the followings
Yes
Is the speaker on it menu?
1. Menu > Audio > TV Speaker ON/OFF.
All input(mode) is no sound?
No
Set on speaker in menu.
(TV Speaker OFF -> ON)
No
Change or Reconnect
the Speaker Cable.
No
Yes
Only HDMI is No sound?
Download the EDID data.
No
Yes
Only RF is no sound?
Check the Tuner IN/OUT
SIF : R317, SECAM-L : R326
Yes
No
Only AV/component/PC
input is no sound?
Yes
Replace Main B/D.
No
Check the Input Sound IN/OUT
AV1 (R : JK100 pin2 and C679
L : JK100 pin6 and C692)
AV2 (R : JK101 pin2 and C690
L : JK101 pin2 and C690)
AV3 (R : JK103 pin7 and C616
L : JK103 pin8 and C615)
PC (PC_LIN : 635, PC_LIN : R634)
Component
(R: JK102 pin3E and C614
L : JK102 pin5D and C613)
Is the speaker Cable normal?
1. Isn’t damage in the Speaker Cable?
2. Is the Speaker cable connect well form
Main B/D o Speaker.
Yes
IC601(Audio AMP) operates Normal?
1. Check 16V input Voltage. (IC600 pin49~52)
2. Check 1.8V input Voltage. (IC600 pin12, 13, 16)
3. Check the IIC communication. (SDA/SCL : R619, R620)
4. Check the Audio Signal is Normal. (SPK_L/R : L603, L604)
No
Replace Audio
AMP IC(IC600).
Yes
Replace Main B/D.
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 19 -
LGE Internal Use Only
CI Slot
(P400)
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
TMDS351PAG
IC200
74LVC245A 74LCX244MTC
Bi-Buffer
Buffer
IC403,405,406
IC402
MSP4458G
IC603
DTV/MNTOUT
SIF,SCART1,2 L/R,AM Audio
TV out, DTV out LR
- 20 TMDS[0:7]
TMDS[0:7]
RGB,PC L/R
YPbPrL/R
CVBS,L/R
CVBS
RGB, CVBS
Switching LR
I2S
CVBS
Address[0:14]
,CTRL signals
DATA[0:7]
TS[0:7]
FLI10620H
24LC512
512Kbit
IC901
NLASB3157
IC101
MICOM
WT61P8
IC802
AT24C16AN
16K
IC801
MAX3232CDR
IC104
USBPower
500mA
LPF
RS-232C
TPS2042DBRG4
USB Power
IC902
Digital amp
(NTP3000A)
IC600
SPDIF_OUT
I2S
Host Data[0:15]
NAND Flash
HYNIX
IC404
DDR2 SDRAM
(64MByte)
HYNIX
IC701
DDR2 Data[16:31]
Host Address[1:16]
DDR2 SDRAM
(64MByte)
HYNIX
IC700
DDR2 Address[0:12]
DDR2 Data[0:15]
LVDS TMDS ODD[10 bit]
LVDS TMDS ODD[10 bit]
LVDS TMDS EVN[10 bit]
BLOCK DIAGRAM
1. A TN Main Overall
NLASB3157
IC500
74LVC541A(PW)
Buffer
IC400
Tuner
(TDFV-G135D1)
TU300
LGE Internal Use Only
Tuner V out
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 21 -
Rear CVBS Link
Rear CVBS
Rear L
Rear R
DTV/ MNT L/ R
Sc art 2 L/ R
Sc art 2 Link
LPF
Level Ad j
Level Ad j
TR BUF
Level Ad j
Level Ad j
LPF
Level Ad j
Level Ad j
TR AMP [ 6d B]
TR Net
12V- > 3. 3V Level s hif t er
TR Net
12V- > 3. 3V Level s hif t er
Rec o rd in g Ct rl
DTV/ MNT_VOUT
Sc art 2 ID
Sc art 2 CVBS
TV OUT L/ R
Sc art 1 L/ R
Sc art 1 Link
TUNER_VOUT
Sc art 1 FB
Sc art 1 ID
Sc art 1 CVBS
Sc art 1 R, G, B
[ 15] VIDEO
[ GPIOA5]
TR BUF
[ GPIOA4]
TR BUF
LPF
MUTE_LINE_DTV
MUTE_LINE
TR Ad j
TR Ad j
MICOM
LM324 [ 6d B]
NLASB3157
Vid eo S/ W
Level
g enerat o r
0V, 6V, 11V
MICOM
LM324 [ 6d B]
TUNER
DTV/ MNT sw itc h Ct rl
Sc art 2 ID
REC8 Ct rl2
REC8 Ct rl1
TU_MAIN
[ VXO_D1]
[ SV2P]
[ AUD_IN_L4]
[ AUD_IN_R4]
[ AUD_OUT1_L, R]
[ AUD_IN_L2, R2]
VXO_VS
[ VXO_D13]
[ VOUT2]
[ VDAC_GY_YC_P]
[ LBADC_IN5]
[ VXI_D16]
[ VXI_D15]
[ SV4P]
FLI10620H
[ AUD_OUT2_L, R]
[ AUD_IN_L1, R1]
VXO_DE
[ SV3P]
23: GND
22: GND
21: saf ety GND
20: CVBS in
19: CVBS o ut ( TV o ut )
23: GND
22: GND
21: saf ety GND
20: CVBS in
19: CVBS o ut ( DTV
o ut )
18:
17: vid eo GND
18: RGB Co nt ro l GND
16:
17: vid eo GND
15: C in
14: d ata GND
13: GND
12: d ata1
11: CVBS in
10: d ata 2
9: GND
8: f unc t io n s elec t
7: CVBS in
16: SCART FB
15: Red
14: d ata GND
13: red GND
12: d ata1
11: Green
10: d ata 2
9: g reen GND
8: SCART ID
7: Blue
6: aud io L in
5: GND
[ SCART_FB]
6: aud io L in
4: aud io GND
5: b lue GND
3: aud io L o ut ( DTV)
2: aud io R in
1: Aud io R o ut ( DTV)
SCART 2
4: aud io GND
3: aud io L o ut ( TV)
2: aud io R in
1: Aud io R o ut ( TV)
SCART 1
[ C4P]
[ LBADC_IN4]
[ A4P]
[ A2P] , [ B2P] , [ C2P]
2. SCART 1,2, AV3
LGE Internal Use Only
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 22 -
4TX
6 RX
3 TX
2 RX
EDID
EEPROM
AT24C02BN
D_SUB_I2C
PC L,R
VSYNC
HSYNC
RGB Link
VGA_B
VGA_G
VGA_R
G-probe
COMP Link
COMP_R
COMP_L
COMP_PR
COMP_PB
UCOM TX
MICOM
[DSDA1,DSCL1]
CHAPLIN TX
CHAPLIN RX
UCOM RX
74HC14D
Schmitt triggering
Usage : BUF
Level Adj
Level Adj
MAX3232CDR
IC104
COMP_Y
[2WIRE_S2]
[BRX]
[HDMI_B_HPD]
[VXO_D22]
[ARX]
[2WIRE_S1]
[VXO_CLK]
[VXI_D23]
[VXO_D6]
FLI10620H
[2WIRE_S0]
[VXO_D21]
[VXO_D19]
[VXO_D20]
[HDMI_A_HPD]
[AUD_IN_L5,R5]
[AVS]
[AHS_ACS]
[VXO_HS]
[B_GRA]
[G_GRA]
[R_GRA]
[VXO_D0]
[AUD_IN_R3]
[AUD_IN_L3]
[C3P]
[B3P]
[A3P]
HDMI BUF TMDS[8bit]
HDMI4 5V DET
HP DET S/W4
HDMI EQ Ctrl
HDMI I2C [SW]
HDMI SW TMDS[8bit]
HP DET S/W1
HP DET S/W2
HP DET S/W3
HDMI3 5V DET
HDMI2 5V DET
HDMI1 5V DET
HDMI 1 TMDS[8bit]
[GPIOA1]
[GPIOA0]
EDID
AT24C02BN
DDC HDMI4 I2C
HDMI Select 2
HDMI Select 1
EDID
AT24C02BN
DDC HDMI3 I2C
HDMI 3 TMDS[8bit]
EDID
AT24C02BN
DDC HDMI2 I2C
HDMI 2 TMDS[8bit]
EDID
AT24C02BN
DDC HDMI2 I2C
MICOM
[GPIOB1]
FET Bi-BUF
3. Component, RGB, HDMI, RS232
NLASB3157
IC502
LGE Internal Use Only
CEC_REMOTE
TMDS351PAG
IC202
RESET
74LVC541A(PW)
Buffer
IC400
TS_IN[0:7]
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
NAND Flash
PCMCIA
Card
- 23 -
FE_TS_DATA_SYN
FE_TS_DATA_CLK
CI_MISTRT
CI_MICLK
FLASH WP Ctrl
HOST Chip Enable
HOST Out Enable
HOST Write Enable
HOST DATA[0:15]
HOST Address[1:24]
FE_TS_DATA_VAL
CI_MIVAL
HOST Address[5]
HOST Address[6]
74LCX244MTC
Buffer
IC405
CI IORD
CI IOWR
HOST Write Enable
CI Write Enable
CI Detect
HOST Address[10:13]
POD Address[8;9;14]
HOST Address[4]
CI Detect
HOST Address[0:3]
POD Address[0:3]
HOST Out Enable
74LCX244MTC
Buffer
CI Address[8:14]
IC406
74LCX244MTC
Buffer
IC403
CI Detect
HOST DATA[0:7]
CI DATA Dir Select
CI Out Enable
REG
CI Address[0:7]
CI DATA[0:7]
74LVC245A
Bi-Buffer
IC402
CI Detect
CI_TS[0:7]
Tuner
(TDFV-G135D1)
TU300
[GPIOE7]
MICOM
FE_TS[0:7]
CI Detect
[OOB_CTX]
[HOST_BOOD_CS_N]
[POD_OE_HOST_RD]
[POD_WE_HOST_WR]
[POD_OE_HOST_RD]
FLI10620H
[POD_DIR_N]
[POD_DETECT_N]
4. Tuner, CI
Tuner
(TDFV-G135D1)
TU300
LGE Internal Use Only
5V
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
TR BUF
SIF
[AUD_IN_L/R 5] Ch. 5
Level Adj
- 24 [AUDO_SPDIR_OUT]
[VXO_D5]
FLI10620H
[AUD_IN_L/R 4] Ch. 4
[AUD_OUT1 L/R]
[AUD_IN_L/R 3] Ch. 3
[AUD_IN_L/R 1] Ch. 1
Level Adj
Level Adj
Level Adj
Level Adj
I2C 3.3V
MICOM
DTV/MNT L/ROUT
TV_L/ROUT
MSP4458G
SPDIF_OUT
SW_RESET
I2S
SW L/R
I2S
LPF
LPF
[FAULT]
AUDIO_MUTE
[RESET]
NTP3000
Digital AMP
LM324
OP AMP
[6dB]
AM Audio, SIF
16V
TR BUF
TR BUF
Mute
CTRL
[TR]
MICOM
LPF
LPF
Mute
CTRL
[TR]
MUTE_LINE_DTV
Level Adj
USB DP/DM
AM AUDIO
5V
600mA
TPS2042BDRG4
Power Distributer
IC901
TR BUF
PC L/R
SIDE L/R
Comp L/R
EyeQ2 L/R
Scart2 L/R
SCART 2
TV LR OUT
SCART 1
DTV LR OUT
TPY : 10W+10W
MAX : 15W+15W
MUTE_LINE
Scart1 L/R
5. Audio(MSP4458, N TP3000A)
LGE Internal Use Only
Tuner
(TDFV-G135D1)
TU301
KIA7029AF
Power On Reset
IC901
MICOM Reset
[NRST]
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
MICOM
RESET
Tic S/W
- 25 [EJ_RST_N]
[RESET_N]
S29GL256N10TFI020
NOR Flash
IC404
EJTAG RESET
SYS RESET
FLI10620H
[VXO_D5]
[POD_RESET]
[VXI_D14]
NTP3000
PCMCIA
CI_RST
SW_RESET
TUNER
FE_RESET
6. Reset system
LGE Internal Use Only
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 26 -
EDID
AT24C16AN
EDID
AT24C02BN
EDID
AT24C02BN
EDID
AT24C02BN
EDID
AT24C02BN
EDID
AT24C02BN
TMDS
351PAG
IC200
[Master I2C 0]
MICOM
[DSDA1,DSCL1]
[Slave I2C 0]
[Slave I2C 1]
FLI10620H
[Slave I2C 2]
[Master I2C 1]
SDA1_5V, SCL1_5V
SDA2_3.3V,SCL2_3.3V
EYEQ
0xE8
RGB
0x94
MSP4458
0x80
24LC512
W : 0xA6
R : 0xA7
TUNER
Analog
R : 0x87
W : 0x86
FRC-M
0xD4
TUNER
Digital
0xC2
NTP3000A
0x54
MICOM
0x50
7. I2C Control system
LGE Internal Use Only
8. Weltrend uCOM GPIO
GPIO
Type
Assignment
Discription
A0/PWM4/P00
I/O
HDMI_SEL1
HDMI Switch IC Ch. Selection
A1/PWM5/P01
I/O
HDMI_SEL2
HDMI Switch IC Ch. Selection
A2/PWM6/P02
I/O
1.8V_DOUGLAS_EN
Active High
A3/PWM7/P03
I/O
1.2V_DOUGLAS_EN
Active High
A4/DSCL2
I/O
MUTE_LINE
H : Mute
A5/DSDA2
I/O
MUTE_LINE_DTV
H : Mute
DSCL1
I2C
D_SUB_SCL
For EEPROM Programming
DSDA1
I2C
D_SUB_SDA
For EEPROM Programming
B0/IRQ2
I/O
-
-
B1/IRQ3/CEC
I/O
CEC_0
HDMI CEC
B2/IR
I/O
IR
IR Signal Input
B3/P04
I2C
EEPROM SCL
MICOM EX EEPROM I2C
B4/P05
I2C
EEPROM SDA
MICOM EX EEPROM I2C
B5/SSCL
I2C
SCL2_3.3V
I2C with FLI10620
B6/SSDA
I2C
SDA2_3.3V
I2C with FLI10620
C0/AD0
ADC
KEY1
KEY ADC Input1
C1/AD1
ADC
KEY2
KEY ADC Input2
C2/AD2
I/O
-
-
C3/AD3
I/O
-
-
C4/P14/RXD1
I/O
UART_SEL
L : Micom TX, H : ChaplinDegug Tx
C5/P15/TXD1
I/O
UCOM_SDA_3.3V
uCOMI2C for EyeQ2 Control
Comment
9. Weltrend uCOM GPIO map
GPIO
Type
Assignment
Discription
C6/P16/IRQ0
I/O
AC_DET
H : AC Power ON, L:AC Power OFF detection
C7/P17/IRQ1
I/O
PANEL_ERROR_DET
.
D0/HIN1
I/O
AUDIO_MUTE
Active Low
D1/HIN2
I/O
-
-
D2/P10/AD4
I/O
LCD/PDP SEL
H : PDP L : LCD
D3/P11/AD5
I/O
Model SEL
H : Aus model L : EP4 H
D4/P12/AD6
I/O
3.3V_EN
Active High
D5/P13/AD7
I/O
RL_ON/PWR_ON/OFF
H : PSU Relay On
D6/TXD2
TX
UCOM_TX
For MICOM Programming Debugging
D7/RXD2
RX
UCOM_RX
For MICOM Programming Debugging
E0/PWM0
PWM
-
E1/PWM1
I/O
-
E2/PWM2
I/O
-
E3/PWM3
I/O
LED_IR_3.3V_ST_On/Off_CTRL
LED SubA°Øssy Standby 3.3V on/off CTRL
E4/LPWM/P06
I/O
INV_CTRL
H : Inverter On to PSU
E5/P07
I/O
UCOM_SCL_3.3V
uCOMI2C for EyeQ2 Control
E6/VIN2
I/O
PANEL_VCC_EN
T-con B/D 12V power supply CTRL
E7/VIN1
I/O
RESET
Active Low Reset signal OUT
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Comment
LG7000 ready
- 27 -
LGE Internal Use Only
10. Douglas GPIO map
GPIO
Type
Assignment
Discription
VXI D14
FE_RESET
Tuner Reset Active Low
VXI D15
REC_8_CTRL1
VXI D16
REC_8_CTRL2
[00] PeriTV
[01] Normal
[10] 16:9
VXI D19
HDMI2_5V_DET
VXI D20
HDMI1_5V_DET
VXI D21
HDMI3_5V_DET
VXI D22
HP_DET_S/W_2
VXI D23
HP_DET_S/W_4
PWM0
CI_EN
VXO CLK
HDMI4_5V_DET
VXO DE
SCART1_LINK
VXO VS
SCART2_LINK
VXO HS
RGB_LINK
VXO D0
COMP_LINK
VXO D1
AV3_LINK
VXO D4
EN_1.3PLL
VXO D5
SW_RESET
VXO D6
HDMI_SW_EQ
VXO D7
AGC_SPEED_CTL
VXO D8
BOOSTER
VXO D10
EN_1.8VF
VXO D12
EN_3.3VF
VXO D13
DTV/MNT_SWITCH
VXO D14
EN_1.3VF
VXO D15
EN_2.5VF
GPIO
Type
Comment
Active Low [digital AMP reset]
Assignment
Discription
Comment
PWM2
VBR_A
[LPL]
A-Dimming (0V~1.65Vdc)
R(6.8K), C(32uF)
PWM3
Burst Dimming (0V~3.3Vdc)
R(0), C(Ready)
VBR_B
[LPL]
LBADC_IN4
SCART1_ID
LBADC_IN5
SCART2_ID
Level 0 " 0V to +2V ( television broadcast reproduction)
Level 1A : +4.5V to +7V (reproduction of an external source with ARC 16:9)
Level 1B : +9.5V to +12V ( peritelevision reproduction)
OOB_CTX
HDMI_A_HPD
FLASH_WP
HP_DET_S/W_3
AUDO_I2SB_DAT1
5V_ANN_CTL
Not used
AUDO_I2SB_DAT2
5V_ANN_MNT
Not used
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 28 -
LGE Internal Use Only
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 29 -
VGA
S2 ADC1
ADC3
ADC2
ADC1
ADC Channel
AVFE
AV3_Vin
AV3
R
RGB
B
CVBS
SCART2
G
FB
B
G
CVBS
R
SCART1
B_GRA
CVBS
Tuner RF
G_GRA
R_GRA
SV4P
SV3P
SV2P
SV1P
C4P
C3P
C2P
C1P
B4P
B3P
B2P
B1P
A4P
A3P
A2P
A1P
PIN
Pr
Pb
Y
COMP
ADEC OUT
MSP4458
ADEC OUT
ADEC IN
ADC Channel
AAFE
SW_ L
SW_ R
AUD_OUT1_L
AUD_OUT1_R
I2S To Douglas
TV L/R Out
DTV L/R Out
I2S OUT
SC1 OUT
SC2 OUT
SW_L/R
SC3_IN
SIF
SCART2 L/R
SC2_IN
ANA IN
AM AUDIO
SCART1 L/R
SPDIF
AUDO_SPDIF_OUT
SC1_IN
To NTP3000A
MONO IN
From MSP4458
I2S in
AUD_OUT_HP_L
I2S out A
-
AUD_OUT_HP_L
AUD_OUT2_R
-
PC R
AUD_OUT2_L
PC L
AUD_IN_R5
AV3 R
AUD_IN_R4
AUD_IN_L5
AV3 L
Component R
AUD_IN_L4
AUD_IN_R3
Ex SPK N
AUD_IN_R1
Component L
Ex SPK P
AUD_IN_L1
AUD_IN_L3
Tuner RF
PIN
11. Analog video & audio Front End
LGE Internal Use Only
12. Power supply tree
AUDIO_AMP_VCC
+5V-TUNER
12V
KIA78R05F
KA7809
+5V-CI
KIA78R05F
CI_EN
VCC_MODULE
FET Power S/W
MICOM
PANEL_VCC_EN
FRC-M
+3.3V-TUNER
5V
KIA78R33F 1A
+3.3V-CI
MICOM
3.3V_EN
+1.8V
AZ1117H-1.8TRE
+3.3V_STBY
AZ1117H-3.3
+5V
FET Power S/W
RL_ON/PWR_ON/OFF
MICOM
+3.3V-DOUGLAS
5V
KIA78R33F 1A
3.3V_EN
MICOM
+1.8V_DOUGLAS_DDR
BA18DD0WHFP
Rohm
1.8V_DOUGLAS_EN
MICOM
MP2305DS
DCDC Converter
2A
+1.2V_DOUGLAS
1.2V_DOUGLAS_EN
MICOM
P_+16V
16V
NTP3000
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 30 -
LGE Internal Use Only
MEMO
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 31 -
LGE Internal Use Only
550
530
122
300
510
500
121
120
123
560
200
801
532
535
802
800
804
805
900
803
901
821
540
521
820
400
EXPLODED VIEW
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 32 -
LGE Internal Use Only
Full SCART 1
+3.3V_STBY
6
4
5
17
16
15
SDA
14
12
9
8
6
18
19
20
21
RGB_GND
B
R_OUT
E
C
JP95
SYNC_OUT
JP96
R100
75
1%
JP97
COM_GND
B
Q100
2SC3052
TRNPN_ISA
E
C104
220uF
16V
SYNC_GND2
R120
330
Q102
ECO No.18
JP98
22
R151
82
C119
10uF
16V
TXCLK_SW+
DDC_CLK
R207
22
NC
R208
22
HDMI SW
DDC_SDA_2
DDC_SCL_2
CE_REMOTE
CEC_REMOTE
CK-
CK-_HDMI2
CK_GND
CK+
CK+_HDMI2
D0-
D0-_HDMI2
D0_GND
D0+
D0+_HDMI2
D1-
D1-_HDMI2
D1_GND
D1+
D1+_HDMI2
D2-
D2-_HDMI2
D2_GND
D2+
D2+_HDMI2
GND
GND
RIN2
10
8
9
1
A1
CHAPLIN_TX
2
5V_HDMI_3
R179
100
DIN2
R190
0
READY
R180
100
DEBUG_RX
R181
100
5V_HDMI_3
+3.3V_STBY
IC201
AT24C02BN-10SU-1.8
UCOM_RX
R221
10K
C215
0.1uF
50V
SELECT
UART_SEL
6
1
B1
ON SEMICONDUCTOR
VCC ANALOG SWITCH
GND
2
5
P102
SMW250-03
C131
0.1uF
16V
ENGINEERING
A
3
4
B0
1
8
ATMEL
EEPROM
2 0IMMRAL014D
7
A2
R222
33K
WP
GND
3
6
5
4
SCL
17
16
15
SDA
14
UCOM_TX
1
DTV/MNT_VOUT
EAN38256201
2
13
Ucom TX
for Hotel mode
12
C216
0.1uF
3
11
10
9
[DTV Vout 6dB TR AMP]
6
5
PCB No : EAX39192001(14)
ECO No : EAX39192001(19)
For MP
4
3
2
1
20
21
LG6000 ATN
External Jack
6
4
5
R242
18K
SCL
08.1.9
1
10
R236
19 HPD
R247
18K
1K
+5V_POWER
18
DDC/CEC_GND
17
SDA
SDA
R237
22
R238
22
HP_DET_S/W_4
16
SCL
15
13
DDC_SDA_4
DDC_SCL_4
NC
CEC
CEC_REMOTE
CLK-
18
R244
18K
18K
3
14
19
R239
A2
A2
GND
HDMI3_5V_DET
22
R250
0
DEBUG_TX
WP
20
GND
C
VCC
JP75
R187
10K
A1
7
R248
0
JACK_GND
R211
33K
+5V
KDS184
D202
A0
IC101
NLASB3157DFT2G
8
0IMMRAL014D
C200
0.1uF
50V
ROUT2
ATMEL
EEPROM
VCC
R255
47K
11
7
A0
HP_DET
R200
1K
GND
DDC_DATA
R201
DDC_CLK
R202
12
C214
0.1uF
HP_DET_S/W_3
5V
NC
TXCLK_BUF-
11
CLK_SHIELD
10 CLK+
TXCLK_BUF+
9 DATA0-
22
DDC_SDA_3
22
DDC_SCL_3
TX0_BUF-
8DATA0_SHIELD
7 DATA0+
TX0_BUF+
6 DATA1-
CE_REMOTE
TX1_BUF-
5DATA1_SHIELD
CEC_REMOTE
CK-
CK-_HDMI3
4 DATA1+
CK_GND
TX1_BUF+
3 DATA2-
CK+
CK+_HDMI3
D0-
TX2_BUF-
2DATA2_SHIELD
D0-_HDMI3
1 DATA2+
TX2_BUF+
D0_GND
D0+
D0+_HDMI3
D1-
SIDE HDMI 4
DC1R019NBH
D1-_HDMI3
JK204
D1_GND
D1+
D1+_HDMI3
D2-
D2-_HDMI3
D2_GND
D2+_HDMI3
D2+
GND
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GND
JK203
QJ41193-FEE2-7F
Douglas
HDMI
JP11
0
HP_DET_S/W_2
HP_DET_S/W_4
R819
10K
READY
READY
E14
E17
E18
C26
R827
10K
READY
READY
VXI_D18
REF_CLK
VXI_D19
XTAL_IN
VXI_D20
CLKOUT
VXI_D21
OBUFC_CLK
TESTMODE0
NC_3
TESTMODE1
NC_4
NC_5
SIF_IN
3
6
4
5
SCL
SDA
DTV/MNT_SWITCH
EN_1.3VF
AE18
+3.3V_STBY
EN_2.5VF
A22
F21
+3.3V_DOUGLAS
IC801-*2
CAT24C16WI-GT3
JP9
R864
4.7K
UCOM_SDA_3.3V
NC_1
NC_2
F7
1
8
2
7
VCC
WP
EAN42611301
VSS
3
6
4
5
SCL
+3.3V_STBY
SDA
ECO No.19
F8
F9
F10
R821
180K
IC801-*3
AT24C02BN-10SU-1.8
READY
R822
68K
ECO No.19
8
2
7
VCC
WP
0IMMRAL014D
A2
GND
3
6
4
5
SCL
SDA
R825
100
1
DDR_A11
DDR_A12
CPL_DDR2_A[5]
CPL_DDR2_A[6]
CPL_DDR2_A[7]
R29
CPL_DDR2_A[8]
T29
CPL_DDR2_A[9]
V25
CPL_DDR2_A[10]
R28
CPL_DDR2_A[11]
V26
CPL_DDR2_A[12]
D1
G1
J1
F2
CPL_DDR2_A[0-12]
C1
E1
H1
K1
H2
D3
F3
DDR_D13
H3
DDR_D14
J3
DDR_D15
DDR_DM0
DDR_D16
DDR_DM1
DDR_D17
DDR_DM2
DDR_D18
DDR_DM3
K24
CPL_DDR2_DM[0]
J27
CPL_DDR2_DM[1]
AD24
CPL_DDR2_DM[2]
AC27
CPL_DDR2_DM[3]
K2
J6
CPL_DDR2_DM[0-3]
H6
CPL_DDR2_BA0
CPL_DDR2_BA1
G6
DDR_D19
J4
DDR_D20
DDR_D21
DDR_BA0
DDR_D22
DDR_BA1
DDR_D23
DDR_D24
DDR_CAS_N
DDR_D25
DDR_RAS_N
DDR_D26
DDR_CS_N
DDR_D27
DDR_WE_N
DDR_D28
DDR_D29
DDR_CK
DDR_D30
DDR_CK_N
DDR_D31
DDR_CKE
DDR_DQS0
DDR_DQS0_N
DDR_ODT
DDR_DQS1
DDR_DQS1_N
DDR_CAL
U28
T27
LVTX_ODD_CH1N_DISP21
LVTX_ODD_CH1P_DISP20
B_GRA
AN
LVTX_ODD_CH2N_DISP19
B1P
LVTX_ODD_CLKN_DISP17
LVTX_ODD_CH2P_DISP18
LVTX_ODD_CLKP_DISP16
B2P
LVTX_ODD_CH3N_DISP15
B3P
LVTX_ODD_CH3P_DISP14
G_GRA
LVTX_ODD_CH4N_DISP3
BN
LVTX_ODD_CH4P_DISP2
C1P
C2P
LVTX_ODD_CH5N_DISPCLK
LVTX_ODD_CH5P_DISPDE
C3P
R_GRA
LVTX_EVN_CH0N_DISP13
CN
LVTX_EVN_CH0P_DISP12
LVTX_EVN_CH1N_DISP11
SV1P
LVTX_EVN_CH1P_DISP10
SV2P
LVTX_EVN_CH2N_DISP9
SV3P
LVTX_EVN_CH2P_DISP8
LVTX_EVN_CLKN_DISP7
SV4P
LVTX_EVN_CLKP_DISP6
SVN
LVTX_EVN_CH3N_DISP5
LVTX_EVN_CH3P_DISP4
AHS_ACS
LVTX_EVN_CH4N_DISP1
AVS
LVTX_EVN_CH4P_DISP0
VOUT2
LVTX_EVN_CH5N_DISPVS
LVTX_EVN_CH5P_DISPHS
AJ29
AH28
AJ28
R714
10
R715
10
CPL_DDR2_D[18]
R716
10
CPL_DDR2_D[19]
R717
10
CPL_DDR2_DM[0-3]
AH27
READY
R863
0
R846
4.7K
P24
CPL_DDR2_CAS_N
CPL_DDR2_RAS_N
CPL_DDR2_CS_N
CPL_DDR2_WE_N
N25
T25
P29
A10
B10
A9
B9
A8
B8
CPL_DDR2_CK
CPL_DDR2_CK_N
N29
U27
A7
B7
CPL_DDR2_CKE
B11
DDR2_ODT
A11
C11
M27
R701
294
U24
1%
DDR_DQS2
A6
B6
A5
DDR_DQS2_N
B5
DDR_DQS3
A4
DDR_DQS3_N
B4
AJ26
CPL_DDR2_DM[3]
AH25
CPL_DDR2_DM[0]
AJ25
AH24
CPL_DDR2_DM[1]
AJ24
AG29
CPL_DDR2_D[22]
CPL_DDR2_D[17]
CPL_DDR2_D[20]
VDAC_COMP
ARXCM
VDAC_BU_N
ARXCP
VDAC_RV_N
ARX0M
VDAC_GY_YC_N
ARX0P
VDAC_RSET
ARX1M
ARX1P
VDAC_BU_P_1
ARX2M
VDAC_BU_P_2
ARX2P
VDAC_GY_YC_P
CPL_DDR2_D[21]
10
R722
CPL_DDR2_D[16]
10
R723
DDR2_D[16]
CPL_DDR2_D[23]
10
R724
DDR2_D[23]
AG23
AH22
N7
A7
P2
AG22
C725
0.1uF
50V
AH21
AJ21
AF21
C726
0.1uF
50V
CPL_DDR2_DQS3_N
CPL_DDR2_DQS3_P
AG21
DDR2_A[8]
A8
P8
DDR2_A[9]
A9
P3
AG5
CPL_DDR2_D[25]
AH1
CPL_DDR2_D[28]
A10/AP
M2
A11
P7
A12
R2
DDR2_D[25]
DDR2_D[28]
AH2
AH3
AH4
AR701
10
1/16W
AJ1
AJ2
DDR2_D[29]
CPL_DDR2_D[29]
AJ3
DDR2_D[24]
CPL_DDR2_D[24]
BRX0M
DDR2_D[31]
CPL_DDR2_D[5]
10
CPL_DDR2_D[0]
10
10
CPL_DDR2_D[7]
BRX0P
R729
DDR2_D[5]
R730
DDR2_D[0]
R731
DDR2_D[7]
BRX1P
BRX2M
BRX2P
CPL_DDR2_DQS0_N
CPL_DDR2_DQS0_P
REXT
10uF
DDR2_VREF
C722 0.1uF
DQ2
DDR2_D[2]
DQ3
DDR2_D[3]
DDR2_A[0]
H3
DQ4
DDR2_D[4]
DDR2_A[1]
H1
H9
DQ5
DDR2_D[5]
F1
DQ6
IC701
HYB18T512160AF-3S
VREF
10
R732
10
R733
10
R734
10
R735
10
R736
DDR2_DQS0_N
DDR2_DQS0_P
DDR2_D[2]
A0
A1
M8
M3
DDR2_A[2]
A2
M7
DDR2_D[6]
DDR2_A[3]
A3
N2
DQ7
DDR2_D[7]
DDR2_A[4]
A4
F9
N8
DQ8
DDR2_D[8]
DDR2_A[5]
A5
N3
DDR2_D[9]
DDR2_A[6]
A6
N7
DDR2_D[10]
DDR2_A[7]
A7
P2
DQ11
DDR2_D[11]
DDR2_A[8]
A8
P8
DDR2_D[12]
DDR2_A[9]
A9
D1
DQ12
P3
DQ13
DDR2_D[13]
DDR2_A[10]
D9
DQ14
DDR2_A[11]
B1
DDR2_D[14]
B9
DQ15
DDR2_D[15]
A1
VDD5
A10/AP
DDR2_A[12]
+1.8V_DOUGLAS_DDR
M2
A11
P7
A12
R2
DDR2_ODT
10
R737
DDR2_D[3]
CPL_DDR2_D[6]
10
R738
DDR2_D[6]
CPL_DDR2_D[1]
10
R739
DDR2_D[1]
CPL_DDR2_D[4]
10
R740
DDR2_D[4]
CPL_DDR2_D[3]
G8
DQ0
DDR2_D[16]
HYNIX
G2
DQ1
DDR2_D[17]
DDR2 SDRAM
H7
DQ2
DDR2_D[18]
EAN33624401
H3
DQ3
DDR2_D[19]
H1
DQ4
DDR2_D[20]
H9
DQ5
DDR2_D[21]
F1
J2
C8
D3
DDR2_DQS3_N
DDR2_DQS3_P
DDR2_D[30]
BRX1M
H7
DQ10
R726
R727 DDR2_D[26]
R728 DDR2_D[27]
10
AR700
10
1/16W
BRXCM
G2
DQ9
R725
10
10
CPL_DDR2_D[27]
AG24
BRXCP
EAN33624401
C2
10
CPL_DDR2_D[26]
AG25
CPL_DDR2_D[31]
DDR2 SDRAM
D7
DDR2_DM[0-3]
DDR2_VREF
AJ22
HDMI_CEC
DDR2_A[0-12]
1.2V_DOUGLAS_EN
C834
0.1uF
16V
CS
RAS
K7
C1
VDDQ9
L7
C3
VDDQ8
WE
K3
C7
VDDQ7
C9
VDDQ6
F7
UDQS
B7
DDR2_DM[0]
LDM
DDR2_DM[1]
F3
UDM
B3
LDQS
DDR2_DQS0_N
DDR2_DQS1_N
UDQS
R842
100
MUTE_LINE
E8
A8
NC4
L1
NC5
R3
NC6
R7
NC1
A2
NC2
E2
NC3
R8
VSSDL
J7
R843
100
MUTE_LINE_DTV
E9
VDDQ5
G1
VDDQ4
G3
VDDQ3
G7
VDDQ2
G9
VDDQ1
A3
VSS5
E3
VSS4
J3
VSS3
N1
VSS2
P9
VSS1
B2
VSSQ10
B8
VSSQ9
A7
VSSQ8
D2
D8
+1.8V_DOUGLAS_DDR
VDDL
+3.3V_STBY
J1
DQ6
DDR2_D[22]
F9
DQ7
DDR2_D[23]
C8
DQ8
DDR2_D[24]
C2
DQ9
DDR2_D[25]
D7
DQ10
DDR2_D[26]
D3
DQ11
DDR2_D[27]
D1
DQ12
DDR2_D[28]
D9
DQ13
DDR2_D[29]
B1
DQ14
DDR2_D[30]
B9
DQ15
DDR2_D[31]
A1
VDD5
CPL_DDR2_D[13]
AR702
10
1/16W
DDR2_D[13]
CPL_DDR2_D[8]
DDR2_D[8]
CPL_DDR2_D[15]
DDR2_D[15]
CPL_DDR2_DQS1_N
CPL_DDR2_DQS1_P
DDR2_DQS1_N
10
R741
10
R742
CPL_DDR2_D[10]
10
R743 DDR2_D[10]
CPL_DDR2_D[11]
10
R744 DDR2_D[11]
DDR2_DQS1_P
CS
VSSQ5
VSSQ4
F8
VSSQ3
H2
VSSQ2
H8
VSSQ1
0.1uF
0.1uF
0.1uF
0.1uF
C741
0.1uF
C740
0.1uF
C737
C738
0.1uF
C736
C739
0.1uF
0.1uF
C735
C743
1uF
K7
C1
VDDQ9
CPL_DDR2_A[7]
C3
VDDQ8
CPL_DDR2_A[12]
K3
C7
VDDQ7
C9
VDDQ6
F7
UDQS
B7
LDM
F3
UDM
B3
LDQS
UDQS
E8
A8
NC4
L1
NC5
R3
NC6
R7
NC1
A2
NC2
E2
NC3
R8
VSSDL
J7
+1.8V_DOUGLAS_DDR
VDDL
J1
E9
VDDQ5
G1
VDDQ4
G3
VDDQ3
G7
VDDQ2
G9
VDDQ1
A3
VSS5
E3
VSS4
J3
VSS3
N1
VSS2
P9
VSS1
B2
VSSQ10
B8
VSSQ9
A7
VSSQ8
D2
VSSQ7
D8
VSSQ6
E7
VSSQ5
F2
VSSQ4
F8
VSSQ3
H2
VSSQ2
H8
VSSQ1
CPL_DDR2_A[2]
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
DDR2_D[12]
AR704
10
1/16W
DDR2_D[0-31]
DDR2_A[10]
DDR2_A[3]
DDR2_A[7]
DDR2_A[12]
AR705
10
1/16W
DDR2_A[2]
CPL_DDR2_A[9]
DDR2_A[9]
CPL_DDR2_A[5]
DDR2_A[5]
CPL_DDR2_BA1
DDR2_BA1
AR706
10
1/16W
CPL_DDR2_WE_N
CPL_DDR2_A[1]
DDR2_WE_N
DDR2_A[1]
CPL_DDR2_BA0
CPL_DDR2_CKE
CPL_DDR2_CK_N
CPL_DDR2_CK
DDR2_BA0
DDR2_CKE
CPL_DDR2_CAS_N
R745
10
R746
10
CPL_DDR2_A[0]
R747
10
CPL_DDR2_A[4]
R748
10
CPL_DDR2_A[8]
AR707
10
1/16W
DDR2_CK_N
DDR2_CK
DDR2_A[0]
DDR2_A[4]
DDR2_A[8]
CPL_DDR2_A[11]
DDR2_CAS_N
DDR2_A[11]
CPL_DDR2_A[6]
DDR2_A[6]
C724
0.1uF
DDR2_A[0-12]
CPL_DDR2_CS_N
CPL_DDR2_RAS_N
R837
4.7K
DDR2_D[9]
CPL_DDR2_D[12]
CPL_DDR2_A[10]
L7
DDR2_DM[3]
DDR2_D[14]
CPL_DDR2_D[9]
CPL_DDR2_A[0-12]
WE
VSSQ6
F2
C742
330uF
4V
RAS
DDR2_DM[2]
DDR2_DQS2_N
DDR2_DQS3_N
C733
CPL_DDR2_A[3]
C734
VDDQ10
0.1uF
VDD1
0.1uF
VDD2
0.1uF
VDD3
R1
A9
0.1uF
VDD4
J9
M9
0.1uF
E1
J8
K9
L8
CAS
LDQS
DDR2_DQS2_P
DDR2_DQS3_P
CPL_DDR2_D[14]
K8
K2
C732
ODT
C731
CK
CK
CKE
DDR2_CKE
DDR2_ODT_T
DDR2_CS_N
DDR2_RAS_N
DDR2_CAS_N
DDR2_WE_N
AR703
10
1/16W
C730
R703
200
DDR2_CK
DDR2_CK_N
L2
L3
C729
0.1uF
C718
C720
1uF
BA0
BA1
0.1uF
0.1uF
0.1uF
0.1uF
C717
0.1uF
0.1uF
0.1uF
C714
C715
0.1uF
C713
C716
0.1uF
C712
C719
330uF
4V
VSSQ7
E7
C703
0.1uF
R836
4.7K
C711
VDDQ10
C710
VDD1
0.1uF
VDD2
0.1uF
VDD3
R1
A9
0.1uF
VDD4
J9
M9
CAS
LDQS
DDR2_DQS0_P
DDR2_DQS1_P
E1
J8
K8
K2
K9
L8
0.1uF
CK
CK
ODT
DDR2_ODT_T
DDR2_CS_N
DDR2_RAS_N
DDR2_CAS_N
DDR2_WE_N
DDR2_BA0
DDR2_BA1
0.1uF
1.8V_DOUGLAS_EN
L2
L3
CKE
DDR2_CKE
HDMI_SEL2
R845
100
GPIOA3/PWM7/P03
BA0
BA1
C709
GPIOA4/DSCL2
A6
DDR2_D[0]
DDR2_D[1]
0.1uF
23
DDR2_A[6]
DDR2_A[7]
DDR2_DM[0]
AF22
HDMI_A_HPD
DQ1
C708
GPIOA2/PWM6/P02
N8
N3
R700
200
DDR2_CK
DDR2_CK_N
HDMI_SEL1
GPIOA1/PWM5/P01
M3
DDR2_DM[3]
DDR2_DM[1]
AH23
AJ23
AF23
C721 0.1uF
DQ0
C707
GPIOA0/PWM4/P00
N2
A5
DDR2_BA0
DDR2_BA1
UCOM_RX
26
M7
A3
A4
DDR2_A[5]
DDR2_D[20]
HDMI_B_HPD
C723
G8
C706
27
A2
DDR2_A[4]
DDR2_D[17]
+1.8V_DOUGLAS_DDR
UCOM_TX
25
24
A1
DDR2_A[2]
DDR2_A[12]
RL_ON/PWR_ONOFF
M8
DDR2_A[1]
HYNIX
C705
GPIOD7/RXD2
A0
J2
DDR2_D[22]
DDR2_D[21]
SCART_FB
IC700
HYB18T512160AF-3S
VREF
DDR2_A[11]
22
21
GPIOD6/TXD2
DDR2_VREF
DDR2_DM[2]
R718 10
R719 10
R720 10
R721 10
+1.8V_DOUGLAS_DDR
AG28
DDR2_ODT_T
C704
34
35
36
20
GPIOD5/P13/AD7
28
0.1uF
DDR2_A[10]
3.3V_EN
29
0.1uF
C701
DDR2_A[0]
GPIOD4/P12/AD6
30
10uF
C700
DDR2_D[19]
CPL_DDR2_DM[2]
CPL_DDR2_D[30]
N26
DDR2_DQS2_N
DDR2_DQS2_P
DDR2_D[18]
AJ27
AH26
Douglas
DDR2
R749
10
R750
10
DDR2_CS_N
DDR2_RAS_N
7
10
AC_DET
HIGH:Writable
A1
PANEL_ERROR_DET
A0
AA28
AA29
GPIOD3/P11/AD5
42,47
ECO No.19
K6
AB25
AB26
DDR2_A[3]
UCOM_EEPROM_CATALYST
F11
G28
G29
R847
0
WP
DSCL1
VCC
DSDA1
7
H25
GPIOD2/P10/AD4
GPIOA5/DSDA2
VSS
2
Y28
H26
DDR2_A[0-12]
DDR2_DM[0-3]
8
R838
22
EN_3.3VF
AJ18
A2
0IMMR00022A
AD15
E12
19
12
11
GPIOC0/AD0
AH18
A23
JP14
0
READY
R899
GPIOD1/HIN2
GPIOE6/VIN2
37
GPIOD0/HIN1
GPIOE5/P07
38
GPIOE7/VIN1
GPIOE4/LPWM/P06
39
10
R835
22
1
W27
AD28
CPL_DDR2_D[31]
CPL_DDR2_DQS0_P
CPL_DDR2_DQS0_N
CPL_DDR2_DQS1_P
CPL_DDR2_DQS1_N
CPL_DDR2_DQS2_P
CPL_DDR2_DQS2_N
CPL_DDR2_DQS3_P
CPL_DDR2_DQS3_N
AUDIO_MUTE
R852
4.7K
READY
GPIOE3/PWM3
READY
40
44
EAN41349801
18
GPIOB0/IRQ2
IIC ID : 0x50
GPIOC1/AD1
EN_1.8VF
AG17
NC_3
NC_2
R805
4.7K
R815
15K
A1
AF17
VXI_D22
VXI_D23
CEC_0
IC801-*1
24LC16BT-I/SN
A0
BOOSTER
AE27
CPL_DDR2_D[30]
C702
GPIO D2 :
High : PDP Low : LCD
GPIO D3 :
High : AUS Low : EU
HDMI_SW_EQ
AGC_SPEED_CTL
AE17
VXI_D16
VXI_D17
9
UCOM_EEPROM_MICROCHIP
SW_RESET
AH17
AJ17
AC29
CPL_DDR2_D[29]
00
D_SUB_SCL
VXO_D15
8
GPIOB2/IR
D_SUB_SDA
VXI_D15
VXO_D14
EN_1.3PLL
7
GPIOB3/P04
READY
VXI_D14
READY
AG16
GPIOB4/P05
GPIOB1/IRQ3/CEC
GPIOC2/AD2
VXO_D13
R809
OPT
AE16
R814
100
GPIOC3/AD3
VXO_D12
VXI_D13
AJ16
AE15
AF16
R811
22
R808
4.7K
GPIOC6/P16/IRQ0
VXI_D12
IR
GPIOC7/P17/IRQ1
VXO_D10
VXO_D11
R804
22
GPIOC5/P15/TXD1
VXI_D10
VXI_D11
SDA
W29
AE29
AB28
CPL_DDR2_D[27]
DDR_D11
DDR_D12
CPL_DDR2_A[4]
R27
V28
LVTX_ODD_CH0P_DISP22
A2P
A3P
DDR2_D[0-31]
⁄NECT-VCC.smb
+3.3V_STBY
⁄HEET-CON
31
MICROCONTROLLER
GPIOC4/P14/RXD1
VXO_D9
NC_1
C27
R830
10K
VXI_D9
SCL
Y26
DDR_A9
DDR_A10
CPL_DDR2_A[3]
P25
T28
D9
R833
100
HDMI3_5V_DET
R840
10K
VXO_D8
5
0IMCRAL006A
AV3_LINK
AE25
CPL_DDR2_D[23]
CPL_DDR2_D[26]
SMAW200-13
P801
100Hz FRC
KEY1
HDMI1_5V_DET
+3.3V_DOUGLAS
D14
VXO_D7
VXI_D8
6
4
6
KEY2
HDMI2_5V_DET
VXO_D5
VXO_D6
VXI_D7
GND
COMP_LINK
AH16
5
GPIOB5/SSCL
Digital EYE Ready port
B14
C14
VXO_D4
VXI_D5
VXI_D6
3
RGB_LINK
AF15
SCL2_3.3V
4
GPIOB6/SSDA
SDA2_3.3V
R831
100
A14
VXI_D4
A2
R803
22
R829
E15
VXO_D3
R810
22
C809
0.1uF
WP
R828
22
REC_8_CTRL2
D15
VXO_D2
VXI_D3
SCART2_LINK
AF18
OSCI
VCC
UART_SEL
B15
C15
VXI_D2
7
R850
2.2K
A15
VXO_D1
8
ATMEL
2
W25
CPL_DDR2_D[22]
DDR_D9
DDR_D10
R26
U26
B1
B3
32
IC802
WT61P8-RN440WT
32,37
E16
VXO_D0
VXI_D1
1
MEMORIES
A1
SCART1_LINK
42,47
D19
VXO_HS
VXI_D0
HDMI4_5V_DET
R824
3.3K
B16
C16
D16
VXO_VS
VXI_HS
AE19
AG18
R820
4.7K
F17
A16
VXI_VS
A0
AD19
R806
4.7K
47K
R816
B17
C17
D17
VXO_DE
C806
E19
A17
VXO_CLK
VXI_DE
24pF
D18
VXI_CLK
X800
19.66080Hz
C18
B18
C807
24pF
A18
3
17
OSCO
+3.3V_STBY
WELTREND
2
16
EAN42012201
AF26
CPL_DDR2_D[21]
DDR_A7
DDR_A8
D2
A3
33
15
GND
IC801
AT24C16AN-10SI-2.7
1
14
X801
24MHz
VDD33V
13
C811
18pF
50V
C812
18pF
50V
UCOM_EEPROM_ATMEL16K
Douglas Full
REC_8_CTRL1
MOVING_LED_PWM
R823
C814
0.1uF
16V
GPIOE2/PWM2
GPIOE0/PWM0
C813
10uF
6.3V
C833
0.1uF
16V
FE_RESET
C822
0.1uF
100Hz FRC
+3.3V_STBY
IC100
FLI10620H-AA
AD26
CPL_DDR2_D[20]
DDR_A5
DDR_A6
DDR_D7
DDR_D8
CPL_DDR2_A[2]
CPL_DDR2_D[2]
GPIOE1/PWM1
C835
47uF
25V
READY
NRST
C815
0.1uF
16V
+3.3V_STBY
GPIO TBD
AC25
CPL_DDR2_D[19]
DDR_A4
DDR_D5
DDR_D6
CPL_DDR2_A[1]
+3.3V_STBY
C810
0.1uF
16V
D807
D806
16
F28
Y24
AF28
CPL_DDR2_D[18]
CPL_DDR2_D[25]
G
SPK_P
16
O
2
K28
DDR_A2
DDR_A3
DDR_D4
CPL_DDR2_A[0]
C728
3
R826
1
READY
SPK_N
E27
CPL_DDR2_D[14]
DDR_D2
DDR_D3
P27
U29
C727
KIA7029AF
DETECTOR
0IKE702900G
I
J29
L27
CPL_DDR2_D[13]
DDR_A0
DDR_A1
READY
KEC
R817
47K
IC800
41
15
C804
680pF
42
14
15
+3.3V_STBY
43
14
120-ohm
D805
13
13
+3.3V_STBY
R839
0
TRNPN_ISA
RESET
E 2SC3052
PANEL_VCC_EN
Q801-*1
2SC3875S
TRNPN_KEC
R832
100
E
IR
H28
CPL_DDR2_D[28]
R834
100
B
C808
0.1uF
CPL_DDR2_D[10]
CPL_DDR2_D[24]
1
C821
0.1uF
100Hz FRC
INV_CTL
EYEQ2_RESET
READY
L800
3
2
EYEQ2_RESET
LED_IR_3.3V_ST_On/Off_CTRL
L29
CPL_DDR2_D[17]
+5V
LED_IR_3.3V_ST_On/Off_CTRL
Q801
R801
3K
12
R802
4.7K
11
12
R853
0
R813
1K
B
C
READY
C
P_+5V
R1622
0
10
11
UCOM_SCL_3.3V
R818
47K
C801
120-ohm
0.1uF
16V
JP8
10
47K
F26
E29
CPL_DDR2_D[9]
CPL_DDR2_D[16]
4
C819
0.1uF
100Hz FRC
+3.3V_STBY
L803
C800
4.7uF
6.3V
R812
L25
CPL_DDR2_D[8]
DDR_D0
DDR_D1
READY
G
5.6V
D808
C824
0.1uF
16V
E25
CPL_DDR2_D[6]
CPL_DDR2_D[15]
5
R851
2.2K
JP5
JP6
JP7
C823
4.7uF
10V
1uF
READY
9
D
8
9
P_+5V
C826
M26
CPL_DDR2_D[5]
CPL_DDR2_D[12]
+3.3V_DOUGLAS
+3.3V_STBY
C825
0.1uF
50V
K26
CPL_DDR2_D[4]
CPL_DDR2_D[11]
S
8
CPL_DDR2_D[0-31]
6
+3.3V_STBY
Q800
RTR030P02
L804
J25
CPL_DDR2_D[3]
CPL_DDR2_D[7]
8
C817
0.1uF
100Hz FRC
RTR030P02 P-CHANNEL MOSFET -20V +-12V -3A 0.075OHM 1W TSMT3 R/TP 3P ROHM ELECTRONIC KOREA CO.,LTD.
120-ohm
ROHM
7
7
100Hz FRC
KEY2
C803
5pF
READY
120-ohm
5.6V
6
D804
5
6
JP4
4
5
10
9
7
L802
4
R898
0
C802
5pF
READY
120-ohm
5.6V
3
D803
2
3
JP3
2
READY
R1617
0
KEY1
100Hz FRC
JP1
JP2
L801
0
M24
CPL_DDR2_D[2]
11
JP13
0
100Hz FRC
F24
CPL_DDR2_D[1]
1%
R879
CPL_DDR2_D[0]
CPL_DDR2_DQS2_N
CPL_DDR2_DQS2_P
AH29
R704
680
R878
EN_2.5VF
+5V
12
10
CPL_DDR2_D[0-31]
LVTX_ODD_CH0N_DISP23
A1P
1%
R877
EN_1.3VF
5.6V
D802
5.6V
D801
EN_3.3VF
100Hz FRC
P_+12V
J2
13
JP12
UCOM_SDA_3.3V
E2
G2
0
0
100Hz FRC
10K
R876
R702
R875
EN_1.8VF
JP10
C2
EN_1.3PLL
2
IC100-*1
FLI10610H-AA
IC100 Douglas Full
FLI10620H-AA
R705
680
FRCM CONTROL
READY
6
5V_HDMI_4
+5V
HDMI4_5V_DET
P800_ANGLE
1
MMBD301LT1G
D201
30V
TXCLK_SW-
TX0_SW-
TX0_SW+
HP_DET_S/W_2
DDC_DATA
R178
100
DIN1
100Hz FRC
P800
R215
0
R230
4.7K
1K
GND
CHAPLIN_RX
UCOM_SCL_3.3V
12505WR-15A00
READY
HDMI_SEL1
DouglasA WXGA 32inch
1
D200
HDMI_SEL2
SCL_HDMI_SW
R177
100
ROUT1
IR/KEY/EYE Q2/LED
P800-*1
READY
32
S1
30
31
29
28
GND_5
SCL_SINK
HPD_SINK
SDA_SINK
HDMI_SW_EQ
R223
0
SDA_HDMI_SW
A1
12
EyeQ2 Sensor IIC ID : 0xE8
RGB Sensor IIC ID : 0x94(TBD)
12505WS-15A00
1/10W
R231
0
A1
A2
KDS184
D140
C
C203
VDD
49
0.1uF
HPD2
SDA2
B21
SCL2
52
53
51
50
VCC_7
A21
54
55
26
27
Z1
Y1
24
Z2
VCC_4
Y4
25
S2
C
5
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
P800_STRAIGHT
C211
C210
0.1uF
C207
0.1uF
C209
0.1uF
C206
0.1uF
C208
0.1uF
C205
0.1uF
C204
0.1uF
R252
47K
READY
0.1uF
D0-_HDMI2
CK-_HDMI2
DDC_SCL_2
DDC_SDA_2
D1-_HDMI2
CK+_HDMI2
D2-_HDMI2
D1+_HDMI2
D2+_HDMI2
D0+_HDMI2
A22
B22
56
57
B23
A23
VCC_8
B24
A24
HPD3
GND_7
58
59
60
61
62
63
64
EQ
33
17
HPD1
34
JP42
D115
D116
35
15
16
KDS184
D205
1%
R102
75
14
VSADJ
5V_HDMI_4
7
D100
A34
GND_3
IC204
AT24C02BN-10SU-1.8
8
READY
DDC_SDA_1
RIN1
SHIELD
SCART2_VIN
DDC_SCL_1
SDA1
DOUT1
R155
100
B
13
READY
JP60
10
C
Q104
2SC3052
TRNPN_ISA
E
R144
470
EAN41348201
14
4
R156
100
9
B
C
3
JP59
8
4
R146
330
2SA1530A-T112-1R
E
SYNC_IN
3
Q106-*1
2SC3875S
TRNPN_KEC
5
R133
47
Q100-*1
2SC3875S
RGB_IO
SYNC_GND1
E
E TRNPN_KEC
C
SCL1
36
QJ41193-FEE2-7F
READY
JP58
B
Q104-*1
2SC3875S
B
TRNPN_KEC
37
13
JK202
R197
10K
470K
R119
C118
0.1uF
16V
12
B34
JP41
R158
100
VCC_2
A2
D114
6
C
P_+12V
SCART2_LINK
RED_GND
V-
DOUT2
READY
R191
10K
R1099
1/10W
4.7K
R154
100
1
CK-_HDMI1
0.1uF
GND
2
C
R149
1K
D2B_OUT
15
A1
0.1uF
7
D2B_IN
C2-
KCN-DS-1-0088
Q105-*1
2SC3875S
TRNPN_KEC
REC_8_CTRL1
G_GND
G_OUT
21
VCC
16
TEXAS
2
C122
0.1uF
D117
16
17
E
1
READY
15
B
C1-
C2+
P100
C
E
R194
1K
B
V+
C120
REC_8_CTRL2
TRNPN_ISA E
+3.3V_CI
27K
R152
14
B
R193
1K
CK+_HDMI1
B11
C125
C1+
C121
27K
R153
13
TRNPN_ISA
C
Q106
2SC3052
JP94
20
0.1uF
330
R147
11
12
SCART2_ID
R132
18K
JP93
B_OUT
ID
C
Q105
2SC3052
4.89V / 9.09V_120ohm(LOAD)
5.19V / 10.91V_1Kohm(LOAD)
R122
47K
B_GND
1K
R134
9
10
A1
READY
AUDIO_GND
AUDIO_L_IN
E
TRNPN_ISA
330
R112
7
8
B
C
D110
R101
10K
6
JP91
JP92
R145
10K
5
AUDIO_R_IN
D113
30V
3
4
D136
KDS184
A2
12K
R1098
5pF
220K
R125
C112
D111
READY
C
Q107
2SC3052
AUDIO_L_OUT
C123
RS-232C Input
1 : Data carrier detect
2 : RX
3 : TX
4 : DTR(Data terminal ready
5 : GND
6 : DSR(Data set ready)
7 : RTS(Request to send)
8 : CTS(Clear to send)
9 : RI(Ring indicator)
1
+3.3V_STBY
IC104
MAX3232CDR
0.1uF
P_+12V
Q107-*1
2SC3875S
A11
38
R210
10K
5pF
220K
C110
R118
D109
READY
2
R206
5V
R254
47K
D123
30V
7
3
E
HDMI 1
D0-_HDMI1
VCC_5
39
READY
470K
R117
10
HP_DET
JP43
R164
10K
C213
0.1uF
R167
1K
C124
0.1uF
16V
4
C
D1-_HDMI1
40
10
11
JP44
1%
13
5
B
B12
D0+_HDMI1
HDMI2_5V_DET
R253
47K
18
R246
18K
R241
18K
SCART2_RIN
TRNPN_KEC
41
D2-_HDMI1
D1+_HDMI1
READY
R249
0
SCL
11
SCART2_LIN
A12
22
19
WP
7
3
C136
4.7pF
READY
+3.3V_STBY
GND_6
42
B33
R209
4.7K
GND
COMP_Y
[SCART PIN8]
B13
43
A33
GND
COMP_LINK
DTV/MNT_LOUT
A13
44
D1+_HDMI3
R220
33K
+3.3V_CI
L102
3.3uH
VCC_6
45
D1-_HDMI3
A2
VCC
8
ATMEL
EEPROM
2
0IMMRAL014D
R173
75
D122
1
L101
R126
1K
B14
46
R229
4.7K
+5V
JP45
1%
D121
A1
A2
DTV/MNT_ROUT
A14
47
JP46
A0
[GN]1P_CAN
JK102
EAN41347201
D2+_HDMI1
48
+3.3V_CI
C202
0.1uF
50V
IC203
AT24C02BN-10SU-1.8
R1101
0
8
9
DVI/HDMI SWITCH
5V_HDMI_2
GND
COMP_Pb
R172
75
[BL]1P_CAN
[GN]O_SPRING
A32
GND_2
TEXAS INSTRUMENTS
IC200
TMDS351PAG
A2
KDS184
D204
4A [GN]CONTACT
6
7
TX1_SW-
4
4
5
B32
TX1_SW+
5
B31
A31
VCC_1
A1
A1
[BL]C_LUG_L
2
3
CK+_HDMI3
TX2_SW-
10K
10K
R1090
R1085
R170
6.8K
3
5V_HDMI_2
PPJ209-03GND
Half SCART 2
SDA
1
ATMEL
EEPROM
0IMMRAL014D
2
7
6
1
SCL3
GND_1
CK-_HDMI3
GND
A0
8
1%
5B
R171
75
[RD]1P_CAN1
JP26
2C
2A
2
SDA3
DDC_SCL_3
D2+_HDMI1
COMP_Pr
3A
JP90
DDC_SDA_3
D2+
GND
100
2D [WH]1P_CAN
2B
AUDIO_R_OUT
D2-_HDMI1
D2_GND
D0+_HDMI3
JP27
Pb
WP
R1081
JP100
5C [RD]C_LUG_L
R111
75
R1100
0
VCC
SCL
JP25
Pr
Y
1
HDMI 3
D1+_HDMI1
D2-
TX2_SW+
[RD]1P_CAN2
5D [WH]C_LUG_L
SCART1_VIN
JK101
PSC003-03
D1+
IC102
AT24C02BN-10SU-1.8
R1082
100
D135
2E
COMP_LIN
R162
220K
L
R110
470K
1K
G
D2+_HDMI3
R166
3.9K
[RD]O_SPRING
4E [RD]CONTACT
D119
TUNER_VOUT
R131
D1-_HDMI1
D1_GND
D134
3E
R
D120
C115
0.1uF
16V
C109
1000pF
READY
D0+_HDMI1
D1-
P_+5V
P_+5V
C135
0.1uF
R104
75
C103
1000pF
D0+
BD
BSS83
Q200
D0-_HDMI1
D0_GND
QJ41193-FEE2-7F
C
R142
10K
COMP_RIN
CEC_0
+5V
R219
10K
R165
3.9K
JP101
Q101-*1
2SC3875S
E TRNPN_KEC
C108
1000pF
READY
D0-
JK201
C132
0.1uF
16V
SCART1_LINK
3.3uH
CK+_HDMI1
D2-_HDMI3
R148
1K
C102
1000pF
CK+
D0-_HDMI3
D129
30V
COMPONENT
D118
B
CK_GND
R189
1K
JP76
E
C
+3.3V_CI
20
21
READY
S
RGB_LINK
Q103-*1
2SC3875S
TRNPN_KEC
R218
47K
R216
0
CEC_REMOTE
CK-_HDMI1
22
1
HDMI 2
DDC_SCL_1
CEC_REMOTE
23
4
22
21
C130
12pF
D128
5
22
R205
19
9
H_SYNC_PC
R204
CK-
20
10
READY
DS_VS
CE_REMOTE
18
11
C212
0.1uF
NC
Z3
R1089
0
DDC_CLK
Z4
12
DDC_SDA_1
Y2
13
HP_DET_S/W_1
Y3
14
V_SYNC_PC
DDC_DATA
VCC_3
15
R1094
4Y
GND
GND_4
SDA
5Y
4A
R212
10K
C
16
GND
5A
1K
5V
JP47
5
6A
6Y
R214
56K
A2
A1
4
17
R203
JP40
1%
75
8
18
6
R188
10K
1%
9
C128
4.7pF
READY
C
B
E TRNPN_ISA
SHIELD
D112
30V
10
R245
18K
R240
18K
SCL
HP_DET
JP48
220K
R1083
6.8K
D132
R1092
R1095
10K
1%
D133
R127
3.3K
22
D108
READY
11
6
7
6
2
D_SUB_SCL
JP99
Q103
2SC3052
TRNPN_ISA
Q101
2SC3052
D_SUB_SDA
D103
READY
COM_GND
21
B
E
B
R105
75
12
4
5
WP
7
3
+3.3V_CI
C
R143
1K
C
R115
1K
JP89
13
0IPH741400E
3
VGA_B
R176
4.7K
SCART1_FB
1K
JP88
SYNC_IN
1K
R137
R109
75
1%
JP87
SYNC_OUT
20
+3.3V_CI
75
SCART1_R
SYNC_GND2
19
2
2
19
0IMMRAL014D
A2
VCC
100
R174
75
R169
6.8K
17
18
INVERTER 14
PHILIPS
GND
3
13.HSYNC
14.VSYNC
R108
R161
220K
JP86
JP56
10.R_GND
+3.3V_CI
READY
D104
30V
JP85
RGB_IO
SYNC_GND1
2Y
3A
1
+3.3V_CI
22
R251
0
8
R150
R_OUT
D107
30V
16
16
VCC
8
ATMEL
7
R107
18K
READY
15
2A
3Y
R182
1K
SCART1_G
RGB_GND
1Y
R199
100
R196
0
GND
5.DDC_GND
6.SYNC_GND
C134
0.1uF
1A
READY
R186
22
JP55
R1087
1K
JP84
D2B_OUT
RED_GND
R175
4.7K
JP57
15.SCL
A1
C133
0.1uF
74HC14D
15
JP61
G_OUT
13
14
R159
0
READY
14
R198
0
DS_HS
10
5
1
EEPROM
IC103
D_SUB_SDA
D106
30V
READY
D2B_IN
12
13
9
4
KDS184
D203
A0
HDMI1_5V_DET
R213
33K
+5V
+5V
C127
4.7pF
READY
R183
1K
SCART1_ID
1%
9
11
R106
75
R103
47K
JP83
G_GND
10
11.GND
12.SDA
AV3_LINK
JP82
ID
12
8
AV3_CVBS
JP81
B_OUT
8
READY
D105
30V
AUDIO_L_IN
7
JP68
SCART1_B
JP80
B_GND
5
6
2
7.GNC
8.B_GND3
9.G_GND
+3.3V_CI
AUDIO_GND
4
AV3_LIN
5V_HDMI_1
IC202
AT24C02BN-10SU-1.8
VGA_G
R168
75
JP77
[YL]GND
11
7
C129
12pF
[YL]O-SPRING
1
D125
2
JP79
AUDIO_L_OUT
3
SCART1_LIN
1K
R114
220K
C107
5pF
JP78
AUDIO_R_IN
R1086
D102
30V
AUDIO_R_OUT
1
2
READY
R123
JK100
PSC003-03
6
1
D127
[YL]CONTACT
R185
22
1.RED
2.GRN
3.BLU
4.NC
D126
[WH]GND
3
D130
C101
1000pF
AV3_RIN
R1088
3.9K
JP49
4
R1091
3.9K
JP67
JP66
JP50
[WH]C-LUG-L
TV_LOUT
JP51
[RD]GND
5
R1084
6.8K
[RD]O-SPRING
6
220K
[RD]CONTACT
7
D131
8
R1093
R128
1K
R113
470K
C201
0.1uF
50V
[PC H,V SYNC]
schmitt trigger
C126
4.7pF
READY
KCN-DS-1-0089
JP52
PPJ148-07
SCART1_RIN
220K
R116
D101
30V
READY
C105
5pF
C106
1000pF
READY
5V_HDMI_1
VGA_R
R163
75
P101
L100
3.3uH
D124
470K
R124
R184
22
11.RGB Input
JK103
R1096
0
Rear AV3
TV_ROUT
C111
1000pF
READY
JP53
L103
3.3uH
C100
1000pF
UCOM_EEPROM_ATMEL256
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Douglas
GPIO, Sub-Micom
8
10
LGE Internal Use Only
C605
0.1uF
16V
L4
AUD_VCM
LS_OUT_L
AUD_VREFN
LS_OUT_R
100
SC2_OUT_R
ADR_SEL
61
STANDBYQ
62
NC7
R629
SC3_IN_L
ASG1
SC4_IN_R
SC4_IN_L
AGNDC
AHVSS
39
38
37
36
35
34
33
100
R4
R5
C607
0.1uF
16V
C
E
R666
DTV/MNT_LOUT_SC2
B
+1.2V_DOUGLAS_D
TRNPN_ISA
C665
6800pF
100
R693
2.2K
R670
8
SS
R668
7B
6B
T_TERMINAL2
C1024
470uF
16V
R1619
0
8
R627
220K
R628
CDS3C30GTH
READY
SHIELD_PLATE
220K
C686
0.1uF
100pF
C688
0.01uF
P600
JP28
R643
1
5.6
ADJ/GND
PWM AMP
2
C649
OUTPUT
C631
330uF
0IPMG00049A
+1.8V
C1054
C630
9
10
13
C620
C621
C623
10uF
0.1uF
10uF
0.1uF
PVDD1B_2
PVDD1B_1
OUT1B_2
OUT1B_1
PGND1B_2
PGND1B_1
BST1B
VDR1B
49
48
47
46
45
44
43
PVDD1A_1
PVDD1A_2
OUT1A_1
OUT1A_2
PGND1A_1
51
50
IIC ID:
0x54
14
4.7K
0.01uF
R657
3.3
R658
C656
R654
0.1uF
4.7K
3.3
1
SPK_L-
2
SPK_R+ 3
SPK_R-
4
C660
0.01uF
L606
120-ohm
1uF
42
NC_2
C641
41
VDR2A
1uF
40
BST2A
39
PGND2A_2
38
PGND2A_1
37
OUT2A_2
36
OUT2A_1
35
PVDD2A_2
34
PVDD2A_1
33
PVDD2B_2
32
PVDD2B_1
31
OUT2B_2
30
OUT2B_1
29
PGND2B_2
L607
C642
120-ohm
22000pF
R645
2S
L604
DA-8580
EAP38319001
2F
1S
1F
5.6
C661
C654
C657
R655
0.01uF
0.47uF
0.1uF
4.7K
R659
390pF
C658
R656
R646
0.1uF
4.7K
C651
390pF
3.3
C652
R660
3.3
C662
0.01uF
5.6
L608
120-ohm
P_+16V
C673
10uF
16V
+3.3V_DOUGLAS
0.1uF
BST2B
FAULT
VDR2B
SCL
C629
PROTECT
+1.8V
PWM_3B/PWM_HP2
6.3V
PWM_3A/PWM_HP1
6.3V
NTP3000A
15
C619
EAN41584001
11
12
DVDDPLL
25
7
8
LFM
AVDDPLL
26
CLK_O
VDD_IO
DGNDPLL
AGNDPLL
23
0.1uF
IC600
24
C626
3.3K
AUDIO AMPLIFIER
21
R618
NC_1
+3.3V_STBY
C1041
0.1uF
16V
C1039
10uF
6.3V
R653
0.1uF
0.47uF
R644
SPK_L+
C637
NEOFIDELITY
22
C625
1000pF
5
6
52
PGND1A_2
C682
100pF
4
CLK_I
4
3
VINPUT
3
AD
VSS_IO
53
56
L611
120-ohm
1
VCC
0.1uF
L602
120-ohm
READY
2
DVSS
C644
C645
C646
0.1uF
50V
0.1uF
50V
330uF
25V
C635
1uF
C639
22000pF
C1012
10uF
6.3V
RTR030P02
S
L1006
1uF
R1013
47K
C1038
0.1uF
50V
R1002
3.9K
MS_WCLK_AMP
L1009
C1047
4.7uF
10V
C1052
100uF
16V
RL_ON/PWR_ONOFF
C
B
Q1000
2SC3052
E
E
100
R620
100
R636
AUDIO_MUTE
0
C674
33pF
READY
Q1000-*1
2SC3875S
TRNPN_KEC
TRNPN_ISA
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
R619
C675
33pF
READY
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
C
B
220
SCL2_3.3V
R1018
47K
R1015
1K
220
R696
SDA2_3.3V
C1043
0.1uF
16V
220
R697
MS_BCLK_AMP
+5V
120-ohm
C1913
0.1uF
16V
READY
G
C1035
ROHM
120-ohm
3.3V_EN
R695
MS_DAT_AMP
Q1001
D
Douglas
AUDIO
PANNEL WAFER
VCC_MODULE
NAND FLASH
P502
Douglas Full
HOST_D[0-7]
POD_HOST_D7
POD_A4_CTX
POD_HOST_A1
POD_A6_ETX
POD_HOST_A2
POD_A7_QTX
POD_HOST_A3
POD_A8_CRX
PODREG_HOST_A4
POD_A9_DRX
POD_IOWR_HOST_A5
POD_IORD_HOST_A6
W5
POD_A[14]
Y5
CI_MOVAL
Y4
CI_MOSTRT
AA1
CI_MDO[6]
Y1
CI_MDO[5]
AB2
CI_MDO[4]
AA2
CI_MDO[3]
Y2
CI_MDO[2]
AA3
CI_MDO[1]
Y3
CI_MDO[0]
HOST_A8
HOST_A9
POD_BVD1_MOSTRT
POD_HOST_A12
POD_D14_MDO6
POD_HOST_A13
POD_D13_MDO5
HOST_A15
HOST_A16
POD_D10_MDO2
HOST_A17
POD_D9_MDO1
HOST_A18
POD_D8_MDO0
V3
V5
CI_CD1
V4
CI_CD2
AE4
CI_CE1
W4
CI_CE2
CI_IRQ
CI_RST
R400
22
V2
V1
HOST_A[5]
HOST_A[6]
AJ14
HOST_A[7]
19
VCC
3
18
4
17
5
16
6
15
OE
R443
33
C2
IC404
HY27US08121B-TPCB
10K
+3.3V_CI
CI_DATA[1]
A1
CI_DATA[2]
A2
CI_DATA[3]
A3
CI_DATA[4]
A4
HOST_A[11]
HOST_A[12]
HOST_A[13]
HOST_A[10-13]
AF11
AG11
+3.3V_CI
AH11
AE10
NC_1
AF13
AG13
AE12
LCD,PDP Selection
High : LCD
Low : PDP
AD13
HOST_A21
AH13
AJ11
HOST_A23
AD9
HOST_A24
B0
HOST_D[0]
B1
HOST_D[1]
B2
HOST_D[2]
B3
HOST_D[3]
HYNIX
CI_DATA[5]
A5
CI_DATA[6]
A6
CI_DATA[7]
A7
7
14
8
13
9
12
GND
GND
+3.3V_CI
10
11
NAND FLASH MEMORY
3
R/B
RE
HOST_OE
CE
B4
HOST_D[4]
B5
HOST_D[5]
B6
HOST_D[6]
NC_7
VCC_1
VSS_1
HOST_D[0-7]
NC_9
NC_10
HOST_D[7]
CLE
HOST_A[2]
0ISTLPH048A
ALE
HOST_A[1]
WE
HOST_WE
+3.3V_CI
WP
NC_11
POD_CD_2
AJ13
POD_WE_HOST_WR
POD_CE_1
+3.3V_CI
HOST_OE
R417
10K
AG3
HOST_ACK
POD_READY_IRQ_N
POD_RESET
HOST_WE
AF8
POD_OE_HOST_RD
POD_CE_2
AF4
HOST_DEV_CS1_N
+3.3V_CI
AJ4
HOST_DEV_CS0_N
HOST_CS0_N
AG6
HOST_BOOT_CS_N
R418
10K
AH5
HOST_READY
HOST_READY
B
FLASH_WP
NC_12
0.1uF
E2
C509
0.1uF
G2
22
C503
0.1uF
J2
R525
56 1%
C510
0.1uF
Q401
KRC103S
E
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
NC_15
I/O7
26
24
25
HOST_D[6]
I/O5
HOST_D[5]
I/O4
HOST_D[4]
B1
R526
22
C511
0.1uF
D1
R527
75
C512
0.1uF
G1
SCART1_G
COMP_Pb
R502
NC_23
22
C502
0.1uF
C513
0.1uF
VGA_G
PRE
R528
HOST_D[0-7]
VCC_2
LVTX_ODD_CH0N_DISP23
A2P
LVTX_ODD_CH0P_DISP22
A3P
B_GRA
LVTX_ODD_CH1N_DISP21
LVTX_ODD_CH1P_DISP20
AN
LVTX_ODD_CH2N_DISP19
B1P
LVTX_ODD_CLKN_DISP17
56
1%
J1
F2
LVTX_ODD_CH2P_DISP18
B2P
LVTX_ODD_CLKP_DISP16
B3P
G_GRA
LVTX_ODD_CH3N_DISP15
LVTX_ODD_CH3P_DISP14
LVTX_ODD_CH4N_DISP3
BN
VSS_2
C1
NC_22
NC_21
R529
22
C514
0.1uF
SCART1_B
NC_20
I/O3
HOST_D[3]
I/O2
HOST_D[2]
I/O1
HOST_D[1]
I/O0
HOST_D[0]
R530
C515
0.1uF
H1
C501
0.1uF
K1
56 1% C516
0.1uF
H2
75
COMP_Pr
R501
22
VGA_R
R531
E1
LVTX_ODD_CH4P_DISP2
C1P
C2P
LVTX_ODD_CH5N_DISPCLK
LVTX_ODD_CH5P_DISPDE
C3P
R_GRA
LVTX_EVN_CH0N_DISP13
CN
LVTX_EVN_CH0P_DISP12
NC_19
D3
NC_18
27
23
A1P
HOST_D[7]
I/O6
NC_24
28
22
NC_14
D2
NC_25
45
5
21
NC_13
C
H/W Ver. AJ11 AD9
init
0 0
1st
0 1
2nd
1 0
3rd
1 1
AE5
HOST_DEV_CS2_N
C508
75
R503
VGA_B
NC_26
46
EAN38563401
4
NC_5
HOST_CS0_N
B7
22
R524
COMP_Y
NC_27
47
2
NC_3
NC_4
HOST_READY
NC_28
48
1
NC_2
NC_8
H/W OPT
AD13 AH13
WXGA(32inch) 0 0
XGA(Not use) 0 1
FHD(37’)
1 0
FRC(42,47) 1 1
R523
SCART1_R
CI_DET
C409
0.1uF
NC_6
HOST_A[0-7]
HOST_A[10]
AJ12
HOST_A22
POD_CD_1
HOST_A[3]
HOST_A[4]
AE11
HOST_A19
POD_WAIT_N
HOST_A[2]
AG14
AH14
AG12
HOST_A20
CI_WAIT
HOST_A[1]
AE14
AF14
AH12
HOST_A14
POD_D12_MDO4
POD_D11_MDO3
HOST_A[0]
AH15
AG15
AF12
POD_HOST_A10
POD_D15_MDO7
AJ15
AE13
POD_HOST_A11
AB1
CI_MDO[7]
HOST_A7
POD_A14_MCLKO
POD_BVD2_MOVAL
2
+3.3V_CI
POD_HOST_A0
POD_A5_ITX
A0
C412
0.1uF
R444
20
1
PHILIPS
CI_DATA[0]
NC_17
R532
75
C517
0.1uF
F3
R533
22
C518
0.1uF
H3
AV3_CVBS
NC_16
TU_MAIN
R534
75
C519
0.1uF
56 1% C520
0.1uF
SCART2_VIN
R535
J3
K2
J6
H_SYNC_PC
+3.3V_CI
+5V_CI
H6
V_SYNC_PC
+3.3V_CI
C414
0.1uF
LVTX_EVN_CH1N_DISP11
SV1P
LVTX_EVN_CH1P_DISP10
SV2P
LVTX_EVN_CH2N_DISP9
SV3P
LVTX_EVN_CH2P_DISP8
SV4P
LVTX_EVN_CLKN_DISP7
SVN
LVTX_EVN_CLKP_DISP6
LVTX_EVN_CH3N_DISP5
AHS_ACS
LVTX_EVN_CH3P_DISP4
AVS
LVTX_EVN_CH4N_DISP1
LVTX_EVN_CH4P_DISP0
READY
R401
10K
J4
R409
10K
HOST_A[0]
HOST_A[1]
R411
10K READY
HOST_A[2]
R404
READY 10K
R412
10K
R405
READY 10K
R413
10K
HOST_A[3]
HOST_A[3]
HOST_A[4]
C404
100uF
16V
R414
10K READY
R407
10K
R415
10K READY
HOST_A[6]
CI_CD1
R408
READY 10K
4
3
2
1
CI_MDO[5]
CI_MDO[6]
CI_MDO[7]
Boot Strap Setting (NAND FLASH
Boot, 16bit, Internal OSC)
R420
CI_CE2
5
6
7
8
39
A0
FE_TS_DATA[6]
A1
FE_TS_DATA[5]
FE_TS_DATA[4]
FE_TS_DATA[3]
FE_TS_DATA[2]
FE_TS_DATA[1]
FE_TS_DATA[0-7]
FE_TS_DATA[0]
A2
A3
A4
A5
A6
A7
GND
1
PHILIPS
CI_MDI[6]
20
0ISTLPH003B
18
3
17
4
16
5
7
CI_RST
CI_WAIT
OE2
REG
CI_MCLKO
Y0
CI_MOVAL
CI_MDI[7]
CI_MOSTRT
Y1
CI_MDI[6]
CI_MDO[0]
CI_MDO[1]
Y2
CI_MDI[5]
CI_MDO[2]
CI_MDO[3]
BUFFER
6
VCC
CI_MDI[7]
15
14
8
13
9
12
10
11
Y3
R421
R432
10K
47
AR404
4
3
2
1
5
6
7
8
AR405
5 33
6
7
8
4
3
2
1
R433
CI_CD2
+5V
CI_MDI[3]
12
13
OPT
15
50
16
51
17
52
18
100
20
55
21
56
22
57
23
58
24
59
25
60
26
61
27
62
28
63
29
64
30
65
31
66
32
67
33
68
HOST_A[5]
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
O0
47
R439
O1
47
I5
TX0_BUF+
TX1_BUFFE_TS_DATA_VAL
TX1_BUF+
O2
47
O7
O3
47
C402
0.1uF
16V
GND
CI_ADDR[7]
HP_DET_S/W_3
FE_TS_DATA_CLK
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
A6
B6
CI_DET
TXCLK_SW+
CI_DET
CI_ADDR[5]
CI_ADDR[4]
IC403
74LCX244MTC
CI_ADDR[3]
CI_ADDR[2]
CI_ADDR[0]
OE1
1
FAIRCHILD
20
VCC
C410
0.1uF
16V
OE1
1
CI_DATA[1]
CI_DATA[2]
I0
CI_ADDR[0-14]
HOST_A[0]
2
19
OE2
I0
POD_A[8]
FAIRCHILD
+3.3V_CI
20
0IMCRFA013A
2
19
VCC
CI_ADDR[7]
I1
HOST_A[1]
GND
O5
O6
CI_ADDR[5]
I3
HOST_A[3]
O7
GND
B5
TX0_SW+
C413
0.1uF
16V
A4
TX1_SW-
B4
TX1_SW+
OE2
A3
TX2_SW-
0IMCRFA013A
O4
A5
TX0_SW-
IC406
74LCX244MTC
+3.3V_CI
CI_ADDR[1]
CI_DATA[0]
3
18
4
17
5
16
O4
O0
CI_ADDR[0]
REG
3
18
4
17
5
16
O0
CI_ADDR[8]
I1
I4
POD_A[7]
POD_A[9]
O5
O1
CI_ADDR[1]
CI_ADDR[14]
I4
HOST_A[4]
6
15
7
14
8
13
9
12
10
11
I2
I5
POD_A[6]
HOST_A[10]
O6
O2
CI_ADDR[2]
CI_ADDR[13]
I3
I6
POD_A[5]
HOST_A[11]
O7
O3
CI_ADDR[3]
CI_ADDR[12]
I7
GND
POD_A[4]
6
15
7
14
8
13
9
12
10
11
B3
TX2_SW+
LVTX_EVN_CH5P_DISPHS
RX4+
AH28
RX3-
AJ28
RX3+
R586
0
100Hz FRC
R587
0
100Hz FRC
SCL2_3.3V
SDA2_3.3V
RX0-
AH27
RX2-
AJ27
RX1RX1+
RXCLK-
RX2-
AJ26
RXCLK+
AH25
RX1-
AJ25
RX1+
RX2+
RXCLKRXCLK+
RX3-
AH24
RX0-
AJ24
RX0+
RX3+
RX4RX4+
AG29
AG28
R597
FRC_RESET
AH23
CH4E-
AJ23
CH4E+
CH0E-
AF23
CH3E-
AG23
CH3E+
CH0E+
CH1ECH1E+
CH2E-
AH22
CH2E-
AJ22
CH2E+
AF22
CKE-
AG22
CKE+
CH2E+
CKECKE+
CH3E-
AH21
CH1E-
AJ21
CH1E+
AF21
CH0E-
AG21
CH0E+
CH3E+
CH4ECH4E+
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
PANEL POWER FOR LCD
+5V
L501
C523
0.1uF
50V
RTR030P02
C525
0.1uF
50V
0
100Hz FRC
27
28
10uF
C524
100uF
16V
B
31
MLB-201209-0120P-N2
L500
C522
47K
R544
C
Q500-*1
2SC3875S
ETRNPN_KEC
R543
1K
B
Q500
E 2SC3052
PANEL_VCC_EN
TRNPN_ISA
+3.3V_OTP
R585
4.7K
Pin25
READY
R570
0
[LPL Module]
+3.3V_OTP
ECO No. 17
29
30
P_+12V
MLB-201209-0120P-N2
READY
Q501
L502
MLB-201209-0120P-N2
C
RX0+
RX2+
AH26
2
R550
4.7K
READY
Logic L or NC : LG(NS) Format
H : DISM
[AUO Module]
32
33
34
35
R551
0
Logic L or NC : NS Format
H : JEIDA Format
36
37
38
39
40
AG25
AG24
SCART_FB
CI_ADDR[9]
ARXCM
VDAC_COMP
ARXCP
VDAC_BU_N
ARX0M
VDAC_RV_N
ARX0P
ARX1M
VDAC_GY_YC_N
VDAC_RSET
ARX1P
ARX2M
VDAC_BU_P_1
ARX2P
VDAC_BU_P_2
VDAC_GY_YC_P
HDMI_A_HPD
HDMI_B_HPD
AG5
C521
0.1uF
AH1
AH2
+5V
AH3
AH4
R542
1.8K
IC500
NLASB3157DFT2G
DTV/MNT_SWITCH
1%
AJ1
B1
AJ2
GND
1
6
SELECT
+5V
ON SEMICONDUCTOR
2
5
VCC
ANALOG SWITCH
AJ3
B0
3
4
A
C507
0.1uF
16V
EAN38256201
DTV/MNT_VOUT
HDMI_CEC
BRXCM
BRXCP
BRX0M
BRX0P
BRX1M
BRX1P
BRX2M
BRX2P
+3.3V_HDMI_DOUGLAS
R536 R538
1
249
O1
1%
D9
REXT
I5
POD_A[14]
O2
CI_ADDR[10]
I6
HOST_A[13]
O3
CI_ADDR[11]
I7
HOST_A[12]
GND
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
C11
HP_DET_S/W_1
TXCLK_SW-
GND
CI_ADDR[6]
CI_ADDR[4]
CI_MCLKI
B11
CI_IOWR
I7
GND
CI_ADDR[12]
CI_MISTRT
CI_MIVAL
B7
TX2_BUF+
A11
I2
10K
R429
A7
TX2_BUF-
FE_TS_DATA_SYN
R456
GND
CI_IORD
I6
47
CI_MCLKI
HOST_A[2]
AR406
33
1/16W
CI_MDI[0]
B8
CI_IRQ
GND
CI_MDI[1]
A8
CI_WE
R454
0
G1
1
CI_MDI[2]
Y7
B9
C408
0.1uF
16V
CI_ADDR[6]
Y6
A9
TX0_BUF-
GND
Y5
B10
TXCLK_BUF+
CI_WE
100
OPT
C407
0.1uF
CI_OE
I4
R455
I3
G6
A10
47
R451
+5V
CI_ADDR[8]
34
G2
2
CI_MISTRT
CI_OE
CI_ADDR[14]
R440
19
54
CI_CE1
CI_ADDR[11]
CI_ADDR[13]
14
49
53
33
CI_MDI[4]
Y4
R437
OE2
R453
I2
R450
O6
CI_ADDR[10]
CI_ADDR[9]
11
46
47
48
C403
GND 0.1uF
33 AR403
4
5
3
6
2
7
1
8
CI_MDI[4]
CI_MDI[5]
19
2
10
R430
10K
OE1
FE_TS_DATA[7]
5
6
7
8
R435 OPT
+3.3V_CI
C400
0.1uF
16V
AR402
4
3
2
1
CI_MDI[3]
IC400
9
44
HOST_A[6]
CI_DATA[7]
6
8
43
45
33
CI_MDI[2]
CI_DATA[6]
7
42
CI_IOWR
CI_MDI[1]
CI_DATA[5]
LVTX_EVN_CH5N_DISPVS
RX4-
AJ29
1
VCC
47
CI_MIVAL
CI_DATA[4]
5
40
10K
CI_IORD
CI_MDI[0]
74LVC541A(PW)
4
41
R431
0
READY
CI_DET
3
I1
R449
O5
CI_DATA[3]
37
38
22
SCART1_FB
20
19
R452
36
100
33
CI_MDO[4]
FAIRCHILD
0IMCRFA013A
2
TXCLK_BUF-
O4
HOST_WE
35
R434
AR401
HOST_A[7]
1
47
P400
10067972-050LF
C401
0.1uF
16V
R416
10K
I0
R448
EAG41860101
HOST_A[5]
HOST_A[6]
HOST_A[7]
HOST_OE
R428
10K
HOST_A[4]
R406
10K
HOST_A[5]
R537
74LCX244MTC
OE1
+5V
R442
10K
R403
10K
HOST_A[2]
VOUT2
CI_DET
CI_DATA[0-7]
R410
10K
R441
10K
R402
READY 10K
HOST_A[1]
GND
IC405
HOST_A[0]
AH29
P501
SMAW200-26C
WXGA Wafer(32")
1
10K
R539
AG1
POD_A[9]
CI_DAT_DIR
AF10
1%
AF1
POD_A[8]
DIR
AE9
AH10
1%
AG2
POD_A[7]
Douglas Full
R541
75
AF2
POD_A[6]
Bidirec(High:A->B)
AJ9
AG9
C411
0.1uF
IC402
74LVC245A
AH8
10K
R446
AF3
POD_A[5]
HOST_D15
H/W Ver 1or3
R467
4.7K
AE3
POD_A[4]
HOST_D14
EAN42012201
+3.3V_CI
AE8
HOST_D12
POD_DETECT_N
POD_DIR_N
HOST_D[7]
R540
75
HOST_D8
HOST_D9
HOST_D11
POD_VS2_MCLKO
HOST_D[6]
H/W Ver 0or2
R468
4.7K
AD5
HOST_D[5]
AG10
10K
OOB_CRX
OOB_DRX
HOST_D13
AD4
HOST_D[4]
AF9
AJ10
SMAW200-40C
EAG42051701
FHD Wafer(37,42,47)
FRC-M IIC ID:
0xd4
AF7
HOST_D10
W6
CI_MCLKO
CI_DET
CI_DAT_DIR
AH9
H/W Ver 2or3
R465
4.7K
W3
POD_HOST_D6
+3.3V_CI
R445
POD_HOST_D3
POD_HOST_D4
OOB_CTX
HOST_D[3]
H/W Ver 0or1
R466
4.7K
W2
HOST_D[2]
R463
4.7K
CDI0_D0
CDI0_ERROR
POD_HOST_D5
W1
FLASH_WP
AG8
AE7
FHD(37)_FRC(42,47)
R461
4.7K
AJ5
POD_HOST_D1
POD_HOST_D2
IC100
FLI10620H-AA
HOST_D[0-7]
XGA_FRC(42,47)
FE_TS_DATA[0]
CDI0_CLK
CDI0_SYNC
HOST_D[1]
R464
4.7K
AJ7
HOST_D[0]
R462
4.7K
AJ6
FE_TS_DATA_SYN
AG7
AJ8
WXGA(32)_XGA
FE_TS_DATA_CLK
POD_HOST_D0
WXGA(32)_FHD(37)
CDI0_VALID
R469
4.7K
AH6
AH7
10
10
47K
R545
10
G
POWER
IC100
FLI10620H-AA
FE_TS_DATA_VAL
6
Douglas
S
C1011
0.1uF
16V
D
NC
+1.8V
R1620
0
C1009
0.1uF
16V
1
/RESET
FIX_POLE
5
GND1
VOUT
VC
VIN
4
JP73
C608
JP74
R1618
0
+1.8V
L601
120-ohm
ZD600
ADJ/GND
2
LDO VOLTAGE REGULATOR
0IPMGA0010A
1
2
OUTPUT
GND
Fiber Optic
GND2
JP72
ADVANCED ANALOG CIRCUITS
BST1A
1uF VDR1A
+3.3V_CI
JK600
JST1223-001
3
C628
19
1K
3
C655
C653
390pF
5.6
54
C624
55
1000pF
AUDIO_MASTER_CLK
SPDIF_OUT
INPUT
1F
C650
22000pF
SW_RESET
+5V
+1.8V
C1911 C1034
0.1uF
22uF
16V
16V
0.1uF
22000pF
R604
P_+5V
KEC
LDO VOLTAGE REGULATOR
0IPMGKE031A
C643
0.1uF
120-ohm
R617
100
20
+5V
Standby Voltage
6
C640
0.1uF
0.01uF
C636
R1009
10K
1%
IC1001
KIA78R33F
C638
C634
16V
SPDIF OPTIC JACK
OPTION
IC1007
AZ1117H-3.3
1S
390pF
R631
3.3
100uF
17
C1046
0.1uF
16V
18
[R1008]
3.6K : 1.26V
3.3K : 1.22V
3.0K : 1.99V
25V
16
R1008
3.3K
1%
R1007
6.8K
READY
C1048
10uF
6.3V
C659
28
3
ADVANCED ANALOG CIRCUITS
LDO VOLTAGE REGULATOR
R1006
0
C1014
0.015uF
C1013
560pF
SDA
FB
Q603-*1
2SC3875S
TRNPN_KEC
SMAW250-04
L605
L603
DA-8580
EAP38319001
2S
2F
P_+16V
27
INPUT
COMP
Q607-*1
2SC3875S
E TRNPN_KEC
R681
470K
PC_AUDIO_L
JP69
PGND2B_1
EN
B
R694
2.2K
DTV/MNT_ROUT
4.7K
B
+3.3V_CI
C1051
100uF
16V
C1045
0.1uF
IC1006
16V
AZ1117H-1.8TRE1(EH13A)
BCK
5
1.2V_DOUGLAS_EN
C1007
100uF
16V
0.01uF
PC_AUDIO_R
R635
3.9K
D601
750
D600
CDS3C30GTH
READY
750
JP70
B_TERMINAL2
750
JP71
T_SPRING
WCK
6
4
2
Q603
2SC3052
TRNPN_ISA
R672
E
R616
R_SPRING
5
DVDD
7
3
EAN33143501
1
B
MS_DAT
R624
R634
3.9K
4
SDATA
2
R1001
3.9K
SW
GND
Q606-*1
2SC3875S
C
MS_WCLK
DC-DC CONVERTER
IN
C1005
4.7uF
10V
C
B
C
C678
4.7uF
10V
R602
B_TERMINAL1
C668
0.1uF
MS_BCLK
3.3V_EN
C1019
10uF
6.3V
TRNPN_ISA
R680
470K
4.7K
E
JP29
C
MPS
1
7A
1
2
2K
DTV/MNT_LOUT
1K
JP30
BS
AC
C1018
10uF
6.3V
READY
Q607
2SC3052
E TRNPN_KEC
JP31
A
C1016
0.1uF
16V
C1056
0.1uF
16V
READY
T_TERMINAL1
+3.3V_TUNER
C1050
100uF
16V
E_SPRING
6A
R1621
0
C1044
0.1uF
16V
L1002
22uH
C1057
0.1uF
16V
C687
3
5
C1912
22uF C1036
16V 0.1uF
16V
IC1000
MP2305DS
MUTE_LINE_DTV
3
R684
TRNPN_KEC
E
DTV/MNT_ROUT_SC2
R606
6.8K
4
NC
VC
VIN
PEJ024-01
0IPMGKE031A
3
VOUT
P_+5V
2
JK601
LDO VOLTAGE REGULATOR
IC1004
KIA78R33F
1
E
Q601
2SC3052
1K
R607
6.8K
C1017
10uF
6.3V
C1008
0.22uF
16V
READY
D1000
KDS226
C609
4.7uF
10V
KEC
6
C1015
0.1uF
16V
GND
GND1
R1003
3.9K
C1010
0.1uF
16V
PC Sound
+1.8V_DOUGLAS_DDR
VOUT
4
C693
GND2
NC
5
3
2K
RT1P141C-T112
Q608
C
C666
6800pF
ROHM
R682
TRNPN_ISA
Q601-*1
2SC3875S
C696
10uF
25V
R614
C669
0.1uF
C
B
R623
100
R625
R603
R622
SCL1_5V
SDA1_5V
EAN42830901
2K
Q606
2SC3052
SCART2
Buffer
MNT/DTV OUT
Locate close to the TUNER
2
1
2
R685
+9V_MSP
1.8V_DOUGLAS_EN
1
Q605
2SC3052
C
P_+5V_CORE
CTL
Q605-*1
2SC3875S
TRNPN_KEC
B
R1017
VCC
Q609-*1
KRA102S
SC3_IN_R
40
17
MUTE_LINE
3
TRNPN_ISA
C
20
VREF2
19 DACA_L
18 DACA_R
E
ASG2
41
IIC ID : 0x80
63
64
Q609
RT1P141C-T112
TV_ROUT_SC1
NC2
22 DACM_L
21 DACM_R
TRPNP_KEC
SC2_IN_L
42
NC3
23
2K
B
C681
C689
C627
SC2_IN_R
43
NC4
24
Q604-*1
2SC3875S
ETRNPN_KEC
E
TRPNP_KEC
26
B
Q602-*1
2SC3875S
TRNPN_KEC
E
TRNPN_ISA
TRPNP_ISA
SC2_OUT_L
B
TV_LOUT_SC1
R683
Q604
2SC3052
C
C
Q608-*1
KRA102S
VREF1
27
25
60
4.7K
IC1002
BA18DD0WHFP
C697
10uF
25V
0.47uF
0.47uF
0.47uF
SC1_OUT_R
28
57
220
C606
10uF
16V
29
58
220
100
C690
ASG3
44
0IPRP00670A
SC1_OUT_L
NC6
59
0
TV_ROUT
R677
470K
4.7K
C
56
30
NC5
D_CTR_I/O_0
R1014
CI_EN
0.47uF
0.47uF
0.47uF
C694
0.01uF
0.47uF
C604
C679
C692
1/10W
1/10W
R613
43
R615
R3
LS_OUT_SW
EAG42050901
AUD_CL_OUT
D_CTR_I/O_1
SW_RESET
R692
2.2K
R671
TRPNP_ISA
C603
10uF
16V
55
R651
AE1
AUDO_MUTE
AUD_VREFP
TRNPN_ISA
E
B
AUDIN_SPDIF_IN
L5
C602
0.1uF
16V
C601
47uF
16V
X601
18.432MHz
AD3
Q602
2SC3052
R664
1K
C664
6800pF
C695
10uF
25V
C1042
0.1uF
16V
TP
AC3
AUDO_I2SB_BCLK
AUDO_I2SB_WCLK
L3
54
READY
3.3uF
16
C1033
0.1uF
16V
C1025
47uF
25V
C1028
0.1uF
50V
AUDO_I2SB_DAT2
XTAL_OUT
IC603
MSP4458G-C4
15
120-ohm
C1020
0.1uF
50V
AUDIN_I2S_DAT
R648
470
R647
24K
5V_ANN_MNT
C
RESETQ
1
+5V_CI
AE2
XTAL_IN
53
R621
0
R676
470K
4.7K
B
MICRONAS
52
TESTEN
56pF
2SC3875S
5V_ANN_CTL
AUDIN_I2S_WCLK
AA5
SIF
AD2
AUDO_I2SB_DAT1
56pF
Q611
50
51
I2S_WS3
P_+16V
L1003
C632
0.01uF
ANA_IN?
ANA_IN2+
C622
TV_LOUT
R669
C611
470pF
2
AA4
L600
MLB-201209-0120P-N2
JP24
3
AB3
MS_DAT
MS_DAT
+3.3V_CI
C610
MS_DAT_AMP
14
5
NC
4
MS_WCLK
MS_WCLK
REGULATOR
3
GND1
2
VIN
C1026
100uF
16V
VOUT
C1029
0.1uF
16V
VC
1
120-ohm
C1021
0.1uF
16V
4
0IPMGKE030A
IC1005
KIA78R05F
P_+12V
L1004
5
R649
62K
MS_WCLK_AMP
AC4
13
6
6
SIF_RTN
AUDIN_I2S_BCLK
AC2
MS_BCLK
KEC
AC5
R691
2.2K
E
32 AHVSUP
31 CAPL_A
NC1
L6
MS_BCLK
JP23
7
AUDO_I2SA_DAT0
49
I2S_CL3
C1001
220uF
16V
AUDO_I2SA_WCLK
AUD_MCLK1
ANA_IN1+
11
C1000
0.1uF
16V
AUD_MCLK0
R650
1.5K
12
8
C1002
4.7uF
10V
AB5
C671
47pF
GND2
JP20
120-ohm
C1004
0.1uF
16V
AC1
AUDIO_MASTER_CLK
Over current protection can be operated
P_+5V
MS_BCLK_AMP
10
16V
L1000
AUDO_I2SA_BCLK
9
R605
22
DVSS
220uF
DVSUP
C1030
C685
10uF
16V
TRNPN_KEC
TRNPN_ISA
R662
1K
C663
6800pF
CAPL_M
I2S_CL4
C1027
4.7uF
10V
Q600-*1
2SC3875S
E
Q600
2SC3052
C648
0.01uF
AVSUP
I2S_DA_IN2/3
0.1uF
16V
AB4
8
C1031
SPDIF_OUT
AUD_IN_R5
PC_AUDIO_R
+5V
R611
220
AD1
AUDO_SPDIF_OUT
I2S_WS4
120-ohm
10
9
AUD_IN_L5
6
JP22
11
C1022
0.1uF
16V
T2
AUD_OUT_HP_R
AUD_IN_R4
7
P_+5V_CORE
L1005
12
AUD_OUT_HP_L
AUD_IN_L4
5
AUD_IN_R3
I2S_DA_IN1
N2
I2S_DA_OUT4
N1
0.47uF
SC1_IN_L
N4
0.47uF
C618
SC1_IN_R
N3
0.47uF
C617
PC_AUDIO_L
C647
VREFTOP
JP21
13
C691
10uF
16V
C676
0.1uF
ZD602
RLZ8.2B-TE11
T1
MONO_IN
0.47uF
C616
AV3_RIN
14
T4
AVSS
C615
AV3_LIN
15
AUD_OUT2_R
AUD_IN_L3
45
16
AUD_IN_R2
46
M5
47
N5
0.47uF
C
B
C
48
0.47uF
C614
COMP_LIN
COMP_RIN
500-ohm
4
C613
T3
+9V_MSP
B
3
C1055
100uF
16V
L610
SW_ROUT
2
READY
C1053
4.7uF
10V
C1049
0.1uF
16V
C
AUD_OUT2_L
C680
3.3uF
50V
SW_LOUT
R610
0
R2
1
C1040
100uF
16V
AUD_IN_L2
R609
0
R1
I2S_CL
M2
2
C1037
0.1uF
16V
G
AUD_OUT1_R
I2C_CL
C1032
0.1uF
16V
C1023
0.1uF
16V
R1010
0
M1
O
3
AUD_OUT1_L
AUD_IN_R1
I2S_WS
1
AUD_IN_L1
I2C_DA
I
2
AC_DET
PANEL_ERROR_DET
17
M4
220 I2S_DA_OUT
18
M3
+5V_TUNER
O
3
0.47uF
C683
2pF
50V
1
0.47uF
C670
SPK_N
C677
2pF
50V
I
C667
SPK_P
KEC
VOLTAGE REGULATOR
0IPMG00004A
IC1008
KIA7805AF
VOLTAGE REGULATOR
EAN32662801
L609
FAIRCHILD
IC1003
KA7809ERTM
120-ohm
RL_ON/PWR_ONOFF
R612
43
ECO No.18
C1058
4.7uF
JP19
19
TV_L/ROUT
SCART1
Buffer
MUTE Ctrl
+9V_MSP
42,47
JP18 JP17
20
C1059-*1
1K
JP16
VBR_B
VBR_A
21
2012
32,37
JP15
22
C1059
4.7uF
2012
C698
10uF
25V
+9V_MSP
INV_CTL
23
SW_ROUT
SW_LOUT
24
SCART2_RIN
SCART2_LIN
Douglas Full
P_+12V
SCART1_RIN
SCART1_LIN
IC100
FLI10620H-AA
12V Line
AM_AUDIO
P1000
SMAW200-24C
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Douglas
LVDS, AFE
5
10
Douglas
Flash & CI
4
10
LGE Internal Use Only
IC100
Douglas Full
IC100
FLI10620H-AA
Douglas Full
+3.3V_DOUGLAS
FLI10620H-AA
+1.2V_DOUGLAS
D_SUB_SCL
100
R904
DDC_SDA_4
DDC_SCL_4
24LC512
100
R905
SDA_HDMI_SW
VCC
SCL_HDMI_SW
USB_FLAG
R939
4.7K
0IMMRMP008A
VSS
4
USBPHY_PADM
2WIRE_S1_SDA
2WIRE_S1_SCL
USBPHY_VRES
2WIRE_S2_SCL
IRDATA
AR900
4.7K
A27
W12
6
R932
22
W13
5
W18
A28
4
B28
3
+3.3V_IO_DOUGLAS
A29
+3.3V_STBY
B29
2
F12
F13
C29
USB20-OC1
C28
USB20-PWE1
+3.3V_DOUGLAS
12505WS-08A00
PWM2
DFSYNC
F16
PPWR
PBIAS
RESET_N
RESET
JP63
AJ20
AH20
JP64
USB20-1-DM
AG20
JP65
2
E2
VSS
6
4
5
C979
0.1uF
16V
C984
0.1uF
16V
C987
0.1uF
16V
E13
FRC_RESET
A21
B21
R967
C996
0.1uF
16V
+1.2V_ADC_DOUGLAS
C923
10uF
6.3V
C941
0.1uF
16V
C926
10uF
6.3V
C957
0.1uF
16V
C970
0.1uF
16V
C977
0.1uF
16V
C938
0.1uF
16V
C909
0.1uF
READY
+3.3V_ADC_DOUGLAS
+3.3V_DOUGLAS
R947
4.7K
IC902
TPS2042BDRG4
+3.3V_HDMI_DOUGLAS
+1.2V_AUD_DOUGLAS
1
OC1
7
L900
OUT1
3
EN2
C962
0.1uF
16V
6
4
5
C1908
0.1uF
R910
22
C972
0.1uF
16V
SCART1_FB
5
OC2
+3.3V_AUD_DOUGLAS
L904
+1.2V_DDRPLL
0ITI204200C
120-ohm
USB20-OC1
C946
0.1uF
16V
C928
10uF
6.3V
0
R948
+3.3V_ADC_DOUGLAS
C958
0.1uF
16V
C971
0.1uF
16V
C912
+3.3V_AUD_DOUGLAS
120-ohm
SCL
C947
0.1uF
16V
C930
10uF
6.3V
C961
0.1uF
16V
F25
F27
0.1uF
F29
C920
H24
H27
0.1uF
H29
K25
K27
0.1uF
K29
C944
+1.2V_DOUGLAS_D
M29
0.1uF
N24
C954
P28
R25
0.1uF
U25
C967
V27
Y25
0.1uF
SDA
+1.2V_DDRPLL
Y27
C975
Y29
AB24
0.1uF
AB27
C981
AB29
AD25
0.1uF
VBR_B
DOUGLAS_EEPROM_ATMEL512K
0
R917
AD27
L907
C904
0.1uF
16V
C901
10uF
6.3V
READY
AD29
C931
0.1uF
16V
120-ohm
AF27
+3.3V_DOUGLAS
AF29
E22
+3.3V_DOUGLAS_VDDI
+3.3V_LVTX_DOUGLAS
AD23
R956
0
C932
0.1uF
16V
C943
0.1uF
16V
DDR2_VREF
C959
0.1uF
16V
C976
0.1uF
16V
R24
AA25
+1.2V_HDMI_DOUGLAS
C985
0.1uF
16V
E7
E9
C922
0.1uF
16V
C936
0.1uF
16V
C951
0.1uF
16V
AE22
Nearby pin AD23
+3.3V_LVTX_PLL_DOUGLAS
C989
10uF
6.3V
C964
0.1uF
16V
E10
AE21
R958
0
C919
0.1uF
16V
C993
0.1uF
16V
C997
10uF
6.3V
C1900
0.1uF
16V
AF24
CVSS_31
CVSS_32
IOVDD33_12
CVSS_33
IOVDD33_13
CVSS_34
IOVDD33_14
CVSS_35
IOVDD33_15
CVSS_36
IOVDD33_16
CVSS_37
IOVDD33_17
CVSS_38
IOVDD33_18
CVSS_39
IOVDD33_19
CVSS_40
IOVDD33_20
CVSS_41
ADC_VDD12_1
CVSS_43
ADC_VDD12_2
CVSS_44
ADC_VDD12_3
CVSS_45
CVSS_46
ADC_VDDA33_1
CVSS_47
ADC_VDDA33_2
CVSS_48
ADC_VDDA33_3
CVSS_49
ADC_VDDA33_4
CVSS_50
CVSS_51
CVSS_52
AUD_AVDD12_1
CVSS_53
AUD_AVDD12_2
CVSS_54
CVSS_56
CVSS_57
AUD_AVDD33_3
CVSS_58
AUD_AVDD33_4
CVSS_59
AUD_AVDD33_5
CVSS_60
AUD_AVDD33_6
CVSS_61
AUD_HP_AVDD33
CVSS_63
CVSS_65
DDR_VDD_1
CVSS_67
DDR_VDD_2
CVSS_68
DDR_VDD_3
CVSS_69
DDR_VDD_4
CVSS_70
DDR_VDD_5
CVSS_71
DDR_VDD_6
CVSS_72
DDR_VDD_7
CVSS_73
DDR_VDD_8
CVSS_74
DDR_VDD_9
CVSS_75
DDR_VDD_10
CVSS_76
DDR_VDD_11
CVSS_77
DDR_VDD_12
CVSS_78
DDR_VDD_13
CVSS_79
DDR_VDD_14
CVSS_80
DDR_VDD_15
CVSS_81
DDR_VDD_16
CVSS_82
DDR_VDD_17
CVSS_83
DDR_VDD_18
CVSS_84
DDR_VDD_19
CVSS_85
DDR_VDD_20
CVSS_86
DDR_VDD_21
CVSS_87
DDR_VDD_22
CVSS_88
DDR_VDD_23
CVSS_89
DDR_VDD_24
CVSS_90
DDR_VDD_25
CVSS_91
DDR_VDD_26
CVSS_92
DDR_VDD_27
CVSS_93
DDR_VDD_29
ADC_GND12_1
DDR_VDD_30
ADC_GND12_2
DDR_VDD_31
ADC_GND12_3
DDRPLL_AVDD33
ADC_GNDA_1
DDR_VDDI_1
ADC_GNDA_3
ADC_GNDA_4
DDR_VRF_0
ADC_GNDA_6
DDR_VRF_1
ADC_GNDA_7
ADC_GNDA_8
HDMI_VDDA33_1
B4P
AUD_AVSS33_2
HDMI_VDDA33_3
AUD_AVSS33_3
HDMI_VDDA33_4
AUD_AVSS33_4
HDMI_VDDA33_5
AUD_AVSS33_5
HDMI_VDD12_1
HDMI_VDD12_2
AUD_HP_AVSS33
HDMI_VDD12_3
HDMI_VDD12_4
A26
DDRPLL_AGND
LVTX_VDD33_1
HDMI_GNDA_1
LVTX_VDD33_2
HDMI_GNDA_2
HDMI_GNDA_3
HDMI_GNDA_5
HDMI_GNDA_6
OTP_VDD33
HDMI_GNDA_7
HDMI_GNDA_8
RPLL_AVDD33
D28
E24
E26
E28
G24
G26
G27
J24
J26
J28
L13
L14
L15
L16
L24
L26
L28
M13
M14
M15
M16
N11
N12
N13
N14
N15
N16
N17
N18
N19
N27
N28
P11
P12
P13
P14
P15
P16
P17
P18
P19
P26
R11
R12
R13
R14
R15
R16
R17
R18
R19
T11
T12
T13
T14
T15
T16
T17
T18
T19
T24
T26
U11
U12
U13
U14
U15
U16
U17
U18
U19
V14
V15
V16
V17
V29
W14
W15
W16
W17
W24
W26
W28
AA24
AA26
AA27
AC24
AC26
AC28
AE24
AE26
AE28
D4
E5
F6
F5
E3
F1
G5
G3
H5
J5
C1909
0.1uF
K5
K3
R911
75
SCART1_VIN
AUD_AVSS12_1
AUD_AVSS12_2
+3.3V_DOUGLAS
+3.3V_DOUGLAS
C23
+3.3V_DOUGLAS_VAA
HDMI_GNDA_9
C950
0.1uF
16V
C933
10uF
6.3V
+3.3V_DOUGLAS
C963
0.1uF
16V
C988
10uF
6.3V
C992
0.1uF
16V
AH19
+1.2V_DOUGLAS
AD6
LVTX_VSS_3
USB_AVDD33_2
RPLL_AGND_1
USB_AVDD33_3
RPLL_AGND_2
VDAC_VDD12
+3.3V_DAC_DOUGLAS
AE6
AF5
AF6
Q900
RTR030P02
USB_AVDD12
USB_AVDD33_1
AG19
C1906
0.1uF
LVTX_VSS_1
LVTX_VSS_4
AF20
C994
0.1uF
16V
RPLL_AVDD12
LVTX_VSS_2
AE20
R959
0
M6
N6
C1907
0.1uF
R978
510
R977
10
L2
P1
P2
P3
P4
P5
U1
E21
A2
C5
C6
C7
C8
C9
C10
D7
D8
USB_GND_1
USB_GND_2
VDAC_AVDD33_1
USB_GND_3
VDAC_AVDD33_2
VDAC_AVDD33_3
VDAC_VSS12
VDAC_AVSS33_1
+3.3V_DOUGLAS
VDAC_AVSS33_2
AD21
AD22
AE23
AG27
B22
C22
AD20
AJ19
AF19
AC6
AD7
AG4
S
D
IOVDD33_10
IOVDD33_11
LVTX_PLL_VDD33
+1.2V_DOUGLAS_D
G
C937
0.1uF
16V
R955
47K
+3.3V_OTP
CVSS_29
CVSS_30
D26
+1.2V_DDRPLL
+3.3V_DAC_DOUGLAS
L908
MLB-201209-0120P-N2
IOVDD33_8
IOVDD33_9
HDMI_GNDA_4
B23
+3.3V_DOUGLAS
CVSS_27
CVSS_28
LVTX_VDD33_3
AG26
C1902
10uF
6.3V
READY
IOVDD33_6
IOVDD33_7
AUD_AVSS33_6
E8
C915
330uF
6.3V
CVSS_25
CVSS_26
HDMI_VDDA33_2
D10
+3.3V_LVTX_DOUGLAS
+3.3V_DOUGLAS_VDDI
Nearby pin F23
IOVDD33_4
IOVDD33_5
DLL_VAA1
D6
C980
33uF
10V
CVSS_23
CVSS_24
DLL_VAA0
V24
E6
+3.3V_DOUGLAS
IOVDD33_2
IOVDD33_3
A4P
D5
+1.2V_DOUGLAS_D
C918
0.1uF
16V
CVSS_22
DDR_VRF_2
C4
C914
0.1uF
16V
CVSS_20
ADC_GNDA_5
M28
+3.3V_DOUGLAS
CVSS_18
CVSS_19
DDR_VDDI_2
G25
+3.3V_DOUGLAS_VAA
+3.3V_HDMI_DOUGLAS
+3.3V_DOUGLAS
CVDD12_18
CVDD12_19
ADC_GNDA_2
F23
+3.3V_LVTX_PLL_DOUGLAS
R951
0
CVSS_16
CVSS_17
DDR_VDD_28
AF25
C948
0.1uF
16V
READY
+3.3V_DOUGLAS
CVDD12_16
CVDD12_17
CVSS_66
D27
10uF
16V
0.1uF
C945
L906
WP
CVSS_14
CVSS_15
DDRPLL_AVDD12
D29
C916
16V
0.1uF
C935
+3.3V_DOUGLAS
CVDD12_14
CVDD12_15
CVSS_64
M25
VCC
CVSS_12
CVSS_13
CVSS_62
U2
D25
C934
C903
10uF
6.3V
CVDD12_12
CVDD12_13
+1.8V_DOUGLAS_DDR
16V
0.1uF
C921
C942
0.1uF
16V
C929
10uF
6.3V
120-ohm
U4
D22
C960
0.1uF
16V
CVSS_11
AUD_AVDD33_2
U3
+1.2V_AUD_DOUGLAS
CVDD12_11
C4P
T6
+1.2V_DOUGLAS_D
C911
100uF
16V
CVSS_10
CVSS_55
U5
OUT2
CVSS_9
CVDD12_10
L1
T5
120-ohm
6
4
C949
0.1uF
16V
C927
10uF
6.3V
L903
MLB-201209-0120P-N2
CVSS_7
CVSS_8
ADC_VDDA33_5
P6
8
2
EN1
R935
0
USB20-PWE1
5
C902
22uF
16V
K4
R6
16V
0.1uF
C955
GND
3
C3
E4
16V
0.1uF
C968
A2
B2
C982
0.1uF
16V
CVDD12_7
CVDD12_8
CVSS_42
A1
F4
VBR_A
7
C969
0.1uF
16V
AB6
G4
C908
0.1uF
43
IC901-*2
AT24C512BW-SH-T
2
C956
0.1uF
16V
+3.3V_OTP
+3.3V_DOUGLAS
EAN43352801
AD11
AA6
R952
0
+1.2V_HDMI_DOUGLAS
R918
6.8K
A1
AD8
AD10
V6
SDA
8
C1904
0.1uF
16V
+1.2V_ADC_DOUGLAS
L905
1
C1903
0.1uF
16V
C1901
10uF
16V
U6
+1.2V_DOUGLAS
DOUGLAS_EEPROM_STM512K
A0
C999
0.1uF
16V
AD17
+5V
0
READY
SW900
TMUE312GAB
2
1
WC
SCL
C991
0.1uF
16V
AD18
C21
R937
10K
3
C974
0.1uF
16V
AD14
+1.2V_DOUGLAS_D
ANALOG SWITCH
R946
3.3K
VCC
7
C966
0.1uF
16V
Y6
+3.3V_OTP
IC901-*1
M24512-WMW6
EAN43349001
C953
0.1uF
16V
AD16
TEXAS INSTRUMENT
E1
C940
0.1uF
16V
C925
10uF
6.3V
AD12
C905
0.1uF
16V
IN
8
F19
120-ohm
GND
1
F18
L901
JP62
CVSS_5
CVSS_6
IOVDD33_1
F15
P1001
C907
0.1uF
16V
CVSS_3
CVSS_4
CVDD12_5
CVDD12_6
CVSS_21
H4
PWM0
D23
DOUGLAS_EEPROM_MICROCHIP512K
E0
+3.3V_IO_DOUGLAS
CVSS_1
CVSS_2
CVDD12_3
CVDD12_4
CVDD12_20
F14
RESET
C906
33pF
50V
120-ohm
PWM1
W19
1
PWM3
D13
CI_EN
0xA6
V11
V12
V19
B27
CVDD12_1
CVDD12_2
CVDD12_9
M19
W11
L902
C13
C998
0.1uF
16V
8
P_+5V
B13
C995
0.1uF
16V
7
2WIRE_S2_SDA
A13
C990
0.1uF
16V
V13
USB20-1-DP
USBPHY_PADP
D11
R907
R950
22
SDA
5
100
USB_PWREN
2WIRE_S0_SDA
2WIRE_S0_SCL
E11
R906
R949
22
SCL
6
3
100
C986
0.1uF
16V
16V
0.1uF
C917
A2
WP
7
2
C12
TCK
EJ_RST_N
C910
0.1uF
16V
MEMORIES
A1
R909
C983
0.1uF
16V
6.3V
10uF
C913
8
1
D12
100
C978
0.1uF
16V
V18
R934
0
A0
100
R908
2WIRE_M1_SDA
2WIRE_M1_SCL
2WIRE_M0_SDA
A12
C973
0.1uF
16V
9
READY
R936
0
R941
47K
TDI
B26
2WIRE_M0_SCL
+5V
R940
47K
TRST
EJ_DINT
B12
C965
0.1uF
16V
+1.8V_DOUGLAS_DDR
D_SUB_SDA
C952
0.1uF
16V
5
F20
M18
C939
0.1uF
16V
C924
10uF
6.3V
USB DOWN STREAM
E20
R 903
+3.3V_STBY
C19
P901
KJA-UB-4-0004
R902
100
C20
M12
M17
R953
0
D902
4.7K
4.7K
R944
D20
100
CHAPLIN_TX
R928
1K
R901
B20
R927
4.7K
100
M11
+1.2V_DOUGLAS
ENGINEERING
TMS
SDA1_5V
R938
47K
READY
UART1_CTS
LBADC_RETURN
D21
L18
+1.2V_DOUGLAS_D
CHAPLIN_RX
R929
3.3K
R943
3.3K
R942
R900
SCL1_5V
IC901
UART1_RTS
LBADC_IN5
SCL2_3.3V
MICROCHIP TECHNOLOGY
LBADC_IN2
TDO
SDA2_3.3V
+5V
UART1_TXD
LBADC_IN6
F22
100
DEBUG_TX
A20
LBADC_IN4
A24
+3.3V_CI
L17
6.2K
1%
R912
1K
LBADC_IN1
LBADC_IN3
A25
L12
DEBUG_RX
1234
C24
B24
SCART2_ID
R945
UART1_RXD
B25
L11
A19
B19
L19
LBADC_GND
C25
SCART1_ID
+5V
UART0_TXD
E23
R914
1K
R915
1K
R913
1K
UART0_RXD
LBADC_33
D903
D24
C900
0.1uF
16V
+1.8V_DOUGLAS_DDR
R957
1K
R954
390
C
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Q901
2N3904S
B
Douglas
E
9
POWER, Fan
10
TDFV-G135D1
TU300
EBL42367001
Tuner PLL : 0xC2
Analog Tuner : 0x86
SYNC
34
VAL
33
D0
32
D1
31
D2
30
D3
29
D4
28
D5
27
D6
26
D7
25
MCL
24
ERR
23
1.8V
22
3.3V
21
RST
20
SCL
19
SDA
18
SIF
17
AUDIO
16
VIDEO
15
NC_3
14
AIF_2
13
AIF_1
12
SCL_T
11
SDA_T
10
GND_2
9
NC_2
8
TP[VT]
7
RF_AGC
6
NC_1
5
+B[5V]
4
GND_1
3
BB[CTR]
2
ANT[5V]
1
SHIELD
35
TUNER FOR SKD
Digital Tuner : 0x1C
A2
D300
KDS184
85V
C
A1
TUNER5V_NOT APPLY
C320
4.7uF
10V
TUNER5V
C319
0.1uF
+1.8V
33
+3.3V_CI
C304
0.1uF
16V
R1615
0
B
B
C
C
R333
2.2K
B
R334
10K
+5V
R1616
0
+5V_TUNER
TRNPN_KEC
READY
C
Q306-*1
2SC3875S
2SA1530A-T112-1R
E
SDA1_5V
SCL1_5V
FE_TS_DATA_CLK
FE_TS_DATA[7]
FE_TS_DATA[6]
FE_TS_DATA[5]
FE_TS_DATA[4]
FE_TS_DATA[3]
FE_TS_DATA[2]
FE_TS_DATA[1]
FE_TS_DATA[0]
FE_TS_DATA_VAL
FE_TS_DATA_SYN
E
TUNER5V
R332
10
Q304
+3.3V_TUNER
IC300
TPS2042BDRG4
GND
E
Q306
IN
2
8
7
OC1
OUT1
R339
2K
5V_ANN_MNT
TUNER5V
R329
BOOSTER
0
EN1
5V_ANN_CTL
C315
100uF
16V
C313
0.01uF
1
TUNER5V
R337
4.7K
TUNER5V
R314
47
R313
47
FE_RESET
R310
33
R309
33
33
33
R308
R307
R306
33
R305
33
33
33
R304
R303
33
R302
R301
R300
33
TUNER5V
+5V_TUNER
C305
0.1uF
16V
3
6
4
5
OUT2
R338
10K
TUNER5V
2SC3052
TRNPN_ISA
EN2
OC2
TUNER5V
C314
0.1uF
L300
MLB-201209-0120P-N2
R311
100
SCL2_3.3V
FE_TS_DATA_VAL
FE_TS_DATA[0-7],FE_TS_DATA_CLK,FE_TS_DATA_VAL,FE_TS_DATA_SYN
TUNER5V
+5V_TUNER
C303
0.1uF
16V
R312
C306
100pF
50V
C307
0.1uF
16V
100
SDA2_3.3V
OPTION: RF AGC
(USE ONLY FOR SECAM)
16V
0.1uF
C312
C302
100pF
50V
C1910
47uF
C317
4.7uF
10V
READY
C
B
Q305
2SC3052
TRNPN_ISA
R335
10K
AGC_SPEED_CTL
E
C
+5V_TUNER
B
Q305-*1
2SC3875S
TRNPN_KEC
E
C310
R324
270
1%
0.01uF
R336
0
TU_MAIN
C316
1%
R325
330
270pF
READY
E
R322
0
GND
B
R323
1K
READY
C
Q302
2SA1530A-T112-1R
+5V_TUNER
R330
100
TUNER_VOUT
B
R328
1K
READY
C
+5V_TUNER
Q303
2SA1530A-T112-1R
CTRNPN_KEC
B
TRNPN_ISA
R318
0
C318
220uF
16V
E
R327
0
Q301-*1
2SC3875S
C
E
Q301
B
2SC3052
E
R326
1K
AM_AUDIO
C309
4700pF
C311
4700pF
R320
1K
+5V_TUNER
R316
470
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
R317
82
SIF
Q300
R315
4.7K
2SA1530A-T112-1R
Douglas
TUNER
3
10
LGE Internal Use Only
P/NO : MFL41557602
Jan., 2008
Printed in Korea