Download - Frank`s Hospital Workshop

DC BUS FOR
INVERTER
SEE MD-0788
SHEET 1, 2
DC BUS FOR
DUAL SPEED
STARTER
J1
POWER INPUT BOARD
J2
J3
3 PHASE
ASSEMBLY 732161 SCH 732159
1 PHASE
ASSEMBLY 733798 SCH 733796
FROM J4 AUXILIARY
BOARD (SHEET 2)
LOW SPEED
ROTOR BOARD
ASSEMBLY 732752
SCHEMATIC 732750
TO TUBE 1 / TUBE 2 STATOR
TERMINALS. SEE MD-0764, SHEET 1 AND
CHAPTER 2 OF SERVICE MANUAL
J4
TO T2 ROOM
INTERFACE
TRANSFORMER
SEE MD-0788,
SHEET 1, 2
E17
J3
E21
J6
TO T1 POWER SUPPLY
AUXILIARY TRANSFORMER
SEE MD-0788, SHEET 1, 2
J5
J11
J7
AC MAINS INPUT
REFER TO CHAPTER 2
OF SERVICE MANUAL
J8
J9
TO J5 OF HT TANK
(SHEET 2)
J10
120 VAC TO FAN(S)
SEE MD-0788, SHEET 1
FOR FUTURE USE
SEE MD-0788, SHEET 1
OPTIONAL POWER
OUTPUTS
SEE MD-0788, SHEET 1, 2
DRAWN
G. SANWALD
CHECKED
DATE
02 MAR 2004
INTERCONNECT
DIAGRAM
(INDICO 100)
DES.\MFG.\AUTH.
L. FOSKIN
02 MAR 2004
MD-0843 REV H
SHEET 1 OF 4
Use and disclosure is subject to the restrictions on the title page of this CPI document.
FROM J1, OUTPUT CURRENT
SENSE TRANSFORMER,
ON RESONANT BOARD
(SHEET 3)
J13
J9
FROM J10 GENERATOR
CPU BOARD (SHEET 4)
J10
J11
J12
J1
CONTROL BOARD
ASSEMBLY 732816
SCHEMATIC 732814
FROM J3 GENERATOR
CPU BOARD (SHEET 4)
INVERTER DRIVE
(SHEET 3)
J14
J15
FROM INVERTER
BOARD(S), SHEET 3
J2
J8
J3
J4
J16
J7
J6
J1
J2
J2
J1
J5
J1
J1
J6
TB3
TO TUBE 1 / TUBE 2 STATOR
TERMINALS. SEE MD-0765, SHEET 1
AND CHAPTER 2 OF SERVICE MANUAL
J9
FILAMENT SUPPLY
BOARD
ASSEMBLY 731407
SCHEMATIC 731405
J4
J3
FILAMENT SUPPLY
BOARD
ASSEMBLY 731407
SCHEMATIC 731405
TB2
AUXILIARY BOARD
ASSEMBLY 732221
SCHEMATIC 732219
DUAL SPEED
STARTER BOARD
(OPTIONAL)
ASSEMBLY 728877
SCHEMATIC 728875
SOME MODELS WILL HAVE ONLY
ONE FILAMENT SUPPLY BOARD
J5
J5
J10
J2
J4
J7
J5
X-RAY TUBE HOUSING GROUNDS
INTERNAL SYSTEM GROUNDS
FROM T1 POWER SUPPLY
AUXILARY TRANSFORMER
SEE MD-0788, SHEET 3
TO J4 POWER INPUT
BOARD (SHEET 1)
TO K1 ON RESONANT BOARD
(SHEET 3)
HT TANK
FROM J11 POWER INPUT
BOARD (SHEET 1)
FROM THERMAL SWITCH ON
INVERTER (SHEET 3). SEE MD-0787
DRAWN
G. SANWALD
CHECKED
Use and disclosure is subject to the restrictions on the title page of this CPI document.
INTERCONNECT
DIAGRAM
(INDICO 100)
DES.\MFG.\AUTH.
L. FOSKIN
NOT USED
DATE
02 MAR 2004
02 MAR 2004
MD-0843 REV H
SHEET 2 OF 4
J2
INVERTER BOARD
ASSEMBLY 731804 SCH 731802
ASSEMBLY 732813 SCH 732811
FROM J2 AUXILIARY
BOARD (SHEET 2)
J13
J9
J10
J11
J1
J12
J1
J14
J1
J15
CONTROL BOARD
ASSEMBLY 732816
SCHEMATIC 732814
J4
J6
T4
RESONANT ASSEMBLY
R/F:
ASSEMBLY 732964 SCH 732962
J2
J8
K1
THERMAL SWITCH
(R&F UNITS ONLY)
TO J2 AUXILIARY
BOARD (SHEET 2)
J16
J2
J3
TO J13 CONTROL
BOARD (SHEET 2)
J7
INVERTER BOARD
ASSEMBLY 731804 SCH 731802
ASSEMBLY 732813 SCH 732811
RAD:
ASSEMBLY 732808 SCH 732806
J1
J4
J3
J5
J2
E10
E9
INVERTER BOARD
ASSEMBLY 731804 SCH 731802
ASSEMBLY 732813 SCH 732811
HT TANK
E17
J1
E18
mA/mAs PORT
DEPENDING ON MODEL, ONE, TWO, OR
THREE INVERTER BOARDS WILL BE USED
DRAWN
G. SANWALD
CHECKED
DATE
02 MAR 2004
INTERCONNECT
DIAGRAM
(INDICO 100)
DES.\MFG.\AUTH.
L. FOSKIN
02 MAR 2004
MD-0843 REV H
SHEET 3 OF 4
Use and disclosure is subject to the restrictions on the title page of this CPI document.
TO J1 CONTROL
BOARD (SHEET 2)
TO J2 CONTROL
BOARD (SHEET 2)
TO DAP CHAMBERS. SEE
MD-0828 AND CHAPTER
3F OF SERVICE MANUAL
J10
J3
TO OPTIONAL REMOTE
FLUORO CONTROL
SEE MD-0766
ASSY 728399 SCH 728401
ASSY 733347 SCH 733345
ASSY 734614 SCH 734612
ASSY 734630 SCH 734628
ASSY 737992 SCH 737990
ASSY 737998 SCH 737996
J11
GENERATOR CPU BOARD
ASSEMBLY 734573
SCHEMATIC 734571
J2
SERIAL
COMMUNICATIONS
PORT
AEC BOARD (OPTIONAL)
J1
J4
REFER TO MD-0757
AND CHAPTER 3D
OF SERVICE MANUAL
J1
J2
J3
DAP INTERFACE BOARD
(OPTIONAL)
ASSEMBLY 735992
SCHEMATIC 735990
J13
J15
ACTIVE DOSE
REDUCTION TANK
(OPTIONAL)
J16
J7
J6
J5
J3
TO J15
GENERATOR
INTERFACE BOARD
J11
J10
TB8
24 VDC
TB9
110 VAC
TB10
220 VAC
J9
DIGITAL INTERFACE BOARD (OPTIONAL)
ASSY 733752 SCH 733750
ASSY 733947, 735921 SCH 733946
ASSY 735406 SCH 735404
ASSY 736153 SCH 736151
ASSY 736894 SCH 736892
ASSY 737950 SCH 737948
J6
SEE NOTE
2
J8 *
* SEE NOTE 3
J18
J14
SEE NOTE 1:
J17
J4
J16
REFER TO MD-0767
AND DIGITAL IMAGING
SUPPLEMENT IN FRONT
OF SERVICE MANUAL
TB7
GND
J12
J13
FOR FUTURE USE
ROOM INTERFACE BOARD
ASSEMBLY 733184
SCHEMATIC 733182
TO A2EC2. SEE
MD-0757 SHEET 1
J7 *
J15
J2
J3
J1
J1
J5
J2
FROM X-RAY TUBE THERMAL SWITCH.
SEE MD-0787 AND CHAPTER 2
OF SERVICE MANUAL
FROM T2 ROOM INTERFACE
TRANSFORMER. SEE MD-0788,
SHEET 4
J1
GENERATOR INTERFACE BOARD
ASSEMBLY 732177
SCHEMATIC 732175
NOTE 1: J4 CONNECTS TO J5 ON THE 23 X 56 AND THE 31 X 42 CM CONSOLE, AND TO J2 ON THE TOUCH SCREEN CONSOLE.
J16 CONNECTS TO J8 ON THE RAD-ONLY CONSOLE.
NOTE 2: J17 CONNECTS TO AN EXTERNAL EMERGENCY POWER-OFF SWITCH AND ALSO SUPPLIES POWER FOR
AN INSTALLER-SUPPLIED POWER DISTRIBUTION RELAY. REFER TO MD-0788 SHEET 4, MD-0762 SHEET 1,
AND TO CHAPTER 2 OF THE SERVICE MANUAL FOR DETAILS.
NOTE 3: J7 AND J8 ARE ABS INPUTS. REFER TO MD-0758 AND TO CHAPTER 3E OF THE SERVICE MANUAL
FOR DETAILS.
DRAWN
G. SANWALD
CHECKED
DATE
02 MAR 2004
INTERCONNECT
DIAGRAM
(INDICO 100)
DES.\MFG.\AUTH.
L. FOSKIN
02 MAR 2004
MD-0843 REV H
SHEET 4 OF 4
Use and disclosure is subject to the restrictions on the title page of this CPI document.
3 PHASE AC
MAINS INPUT
F5A
PHASE 3
F5C
NEUTRAL
+
R20
PHASE 2
~
~
~
E23
DC BUS
OUT
-
E15
K1
E8
SOFT START OK
PROTECTION
CIRCUIT
(U1C, Q7, ETC)
2
3
S.S.
OK
JW2
1
F7
1
J4-10
J4-10
J4-8
J4-8
5
4
U2
+12VDC
OK
DS1
DC BUS
OK
+12V
+12V
2
4
5
2
1
3
3
CNCTR
CLOSED
D2
J4-13
D4
J4-2
J4-2
K5
+12V
+12V
J4-4
4
+12V
TP1
5
TUBE 1 / TUBE 2 SELECT
COMMAND TO MD-0787
J4-3
J4-3
J4-14
J4-14
J4-15
J4-15
J4-16
J4-16
J4-18
J4-18
5
Q2
2
F1
J1-3
J5-4
J1-4
J3-3
J2-3
J3-4
J2-4
J3-2
J2-2
DS3
J3-9
J2-9
+12V
DS7
+12V
CONTINUED ON
PAGE 3
RETURN
+12V
D7
F1
120 / 240 VAC
F2
52 / 73 / 94 VAC
F3
COMMON
+12V
+12V
K3
J4-17
208 VAC
73 VAC
J5-3
RN1
4
T1
120 VAC
J1-1
RN1
U3
*
52 VAC
K2
D5
1
RN1
380/400/480 VAC
RN1
J4-4
F1
J6-6
RN2
J4-1
R32
K1
J4-1
K2
RN1
R1, R2
E10
K1
DS6
D8
DUAL SPEED STARTER
IS OPTIONAL. LOW SPEED
STARTER IS STANDARD
IN INDICO 100 GENERATORS
94 VAC
J6-7
SOFT START
FAULT SIGNAL
TO AUXILIARY
BOARD, PAGE 3
+
-**
560 VDC
J6-5
BUZZER
ANNUNCIATOR
(R33-R35, R46, R47,
Q3, Q4)
J2-2 P2-2
RN1
E2 -
240 VAC
DS2
J2-1 P2-1
DS4
J4-13
F2
LS1
RN2
SOFT START
DRIVER
CIRCUIT
(U3B, Q6, ETC)
E9
N/C
+12V
2
E2 -
J6-1
+12V
1
U1
R31
JUMPER NOT
FITTED
(ALL MODELS)
2
D3
K1
F1
R48
JUMPER NOT
FITTED
(ALL MODELS)
E1 +
INVERTER
BOARD
RN2
JW3
1
E1 +
INVERTER
BOARD
DUAL SPEED STARTER BOARD
DC BUS
DISCHARGE
CIRCUIT
(Q1, D10)
DC BUS CHARGED
SENSING
CIRCUIT
(R5-R8, D3)
F2
E1 +
INVERTER
BOARD
E2 -
GROUND
+12V
3 PHASE INDICO 100 GENERATORS USE ONE, TWO, OR THREE
INVERTER BOARDS DEPENDING ON GENERATOR OUTPUT POWER
E11
R16, R17
REFER TO PAGE 5 FOR LOGIC LEVELS,
NOTES, ETC, REFERENCED BY
HEXAGONAL SYMBOL:
F5B
D1
R18, R19
K5
PHASE 1
TP4
TP1
REFER TO MD-0764
LOW SPEED STARTER BOARD
J4-17
J10-3
+12V
R72
D37
FLUORO
FAN ON
6
J4-5
FLUORO FAN
TIMER / DRIVER
CIRCUIT
(U11, Q9, ETC)
+12V
K4
F6
J10-1
K3
F8
J11-4
COOLING FAN(S) USED ON SOME
MODELS. DEPENDING ON THE APPLICATION,
ONE, TWO, OR THREE FANS MAY BE USED
RN1
J4-5
*** JW1
D6
K4
DS5
R&F GENERATORS
ONLY
E21
E17
3 PHASE POWER INPUT BOARD
(REFER TO PAGE 2 FOR 1 PHASE
POWER INPUT BOARD)
TUBE 1 /TUBE 2
SOLENOID
(TWO TUBE HT
TANKS ONLY)
J5-4
F2
J5-6
J11-6
THREE FAN
UNITS ONLY
H.T. TANK
J8-3
FROM PAGE 3
***
230/277 VAC
NEUTRAL
J7-5
J9-1
J9-2
E18
ROOM POWER KIT OPTION
REFER TO SEPARATE SUPPLEMENT,
IF APPLICABLE
CONTINUED
ON PAGE 4
OPTIONAL
GROUND
ROOM INTERFACE CHASSIS
E14
THIS VOLTAGE IS APPROXIMATELY 560 VDC FOR 400 V GENERATORS, AND APPROXIMATELY
680 VDC FOR 480 V GENERATORS
Use and disclosure is subject to the restrictions on the title page of this CPI document.
*** 480 VAC GENERATORS
J7-1
J7-3
J9-5
**
F3
J9-4
*
T1 AND T2 MUST BE TAPPED IN ACCORDANCE WITH THE NOMINAL AC MAINS VOLTAGE.
REFER TO CHAPTER 2 OF THE GENERATOR SERVICE MANUAL.
***
OPTIONAL 400/480 VAC
J8-1
T2 (SHOWN TAPPED
FOR 400 VAC MAINS)
0V
***
JW1 fitted on units
where fans must run
continuously
200V
AUXILIARY BOARD
*
J1-3
240V
J1-5
0V
J1-6
180V
J5-4
200V
J5-3
F4
J5-7
240V
J5-6
DRAWN
G. SANWALD
CHECKED________
FOR FUTURE USE
DES.\MFG.\AUTH.
HTW
DATE
10 MAR 2000
________
DC BUS & POWER
DISTRIBUTION
10 MAR 2000
MD-0788 REV AB
SHEET 1 OF 6
K5
1 PHASE AC
MAINS INPUT
LINE 1
F5A
LINE 2
F5B
SINGLE PHASE INDICO 100 GENERATORS USE
ONE OR TWO INVERTER MODULES DEPENDING
ON GENERATOR OUTPUT POWER
E33
MAINS
RECTIFIER
230
VAC
E34
BUS
CAPACITORS
P1-1
J12-1
NO CONNECTION
R10
5
4
J6-5
2
J2-1 P2-1
J4-3
J4-14
J4-16
J4-16
J4-18
J4-18
J4-17
J4-17
RETURN
J5-3
+12V
D5
5
J5-4
DS7
F4
DS2
Q1
U2
2
R35
4
+12V
+12V
J3-3
R40
K1
R12
R34
1
R33
J4-3
J4-15
F1
DS6
J4-4
J4-14
J6-7
+12V
+12V
J4-1
J4-15
52 VAC
K5
R39
R29
J4-4
73 VAC
J2-2 P2-2
D8
AUXILIARY BOARD
REFER TO PAGE 1
J6-6
K2
D4
K2
J4-1
CONTINUED ON
PAGE 3
DS1
R38
J4-2
120 VAC
1
DC BUS
OK
R36
J4-2
*T1
94 VAC
+12V
DS4
380/400/480 VAC TAPS
208 VAC
U1
+12V
J4-13
E2 -
J6-3
DC BUS CHARGED
SENSING CIRCUIT
(R6-R8, R16-R21, D3, ETC)
1
J4-13
J6-1
240 VAC
F1
J4-8
E2 -
R11
P1-4
J12-4
F2
J4-8
E1 +
INVERTER
BOARD
DC BUS ASSEMBLY
K1
ROOM POWER KIT OPTION
REFER TO SEPARATE SUPPLEMENT,
IF APPLICABLE
J4-10
E1 +
INVERTER
BOARD
VOLTAGE DOUBLER CIRCUIT
GROUND
J4-10
650 VDC
OUT
LOW SPEED
STARTER BOARD
REFER TO PAGE 1
J3-4
J3-2
+12VDC
OK
DS3
J3-9
+12V
D7
J10-3
K3
K4
COOLING FAN(S) USED ON SOME
MODELS. DEPENDING ON THE APPLICATION,
ONE, TWO, OR THREE FANS MAY BE USED
J10-1
+12V
J4-5
J4-5
K3
R37
6
J11-4
J11-6
D6
K4
H.T. TANK
REFER TO PAGE 1
DS5
J8-3
E21
1 PHASE POWER
INPUT BOARD
E17
J8-1
TAPPED
* T2FOR(SHOWN
240 VAC MAINS)
J7-1
J7-3
F4
230 VAC
OPTIONAL
GROUND
ROOM INTERFACE CHASSIS
0V
200V
240V
0V
180V
J7-5
200V
T1 / T2 MUST BE TAPPED IN ACCORDANCE WITH
THE NOMINAL AC MAINS VOLTAGE. REFER TO
CHAPTER 2 OF THE GENERATOR SERVICE MANUAL.
240V
*
F3
OPTIONAL 230 VAC
E14
E18
DRAWN
ROOM POWER KIT OPTION
REFER TO SEPARATE SUPPLEMENT,
IF APPLICABLE
Use and disclosure is subject to the restrictions on the title page of this CPI document.
CONTINUED
ON PAGE 4
G. SANWALD
CHECKED________
DES.\MFG.\AUTH.
HTW
DATE
10 MAR 2000
________
DC BUS & POWER
DISTRIBUTION
10 MAR 2000
MD-0788 REV AB
SHEET 2 OF 6
+35V
J7-1
0V
J7-3
26 VAC
J7-6
R71
F4
C22
R65
26 VAC
D31
R64
J7-2
15 VAC
J6-5
J7-5
+5 V
REGULATOR
TP16
TP8
D33
J7-5
C24,
C25
15 VAC
-12V
R70
+12 VDC
REGULATOR
D29
D27
TP10
TO MD-0786
J7-1
J6-2
J7-2
J6-3
J7-3
TP1 TP15
-12V
R68
-12 VDC
REGULATOR
F2
J6-1
+12V
U4
TO PAGE 1
D30
D16
C19
+12V
+12V
+12V
U5,U6
-35V
F1
TP9
U34
D28
TP7
0V
J7-4
TP5
C21
J7-4
+5V
J6-4
+/-35V
D32
F3
FROM
PAGE 1, 2
+12V
+12V
T1
+12V
-12V
-12V
J4-1
J1-1
J4-3
J1-3
J4-5
J1-5
J4-7
J1-7
U27
J4-9
J1-9
+5 V
REGULATOR
J4-11
J1-11
J4-12
J1-12
J4-13
J1-13
J4-15
J1-15
J4-17
J1-17
J4-19
J1-19
+5V
R32
J5-7
J5-6
J5-3
J5-4
J1-6
J1-5
J1-3
AUXILIARY BOARD
+12V
D1
+12V
+/- 12V/SS FAULT
5.1V REF
J6-7
J6-6
J6-4
J6-3
J8-6
J8-5
TO MD-0786
+
18
CONTACTOR
CLOSED
SIGNAL TO
MD-0765
FLUORO
RAD
+
JUMPER POSITION:
RAD GENERATORS
JUMPER "RAD"
R&F GENERATORS
JUMPER "FLUORO"
+
2
12VDC / SOFT START
FAULT SIGNAL
TO MD-0764, PAGE 1
SOFT START
FAULT SIGNAL
FROM AUXILIARY
BOARD, PAGE 1
J1-3
J9-2
J1-2
J9-5
J1-5
J9-6
J1-6
-35V
1
2
J1-18
J1-19
J2-14
J2-6
J2-15
J2-7
J1-4
J10-25
J10-6
J10-10
J10-29
J10-18
J10-19
J3-14
J3-6
J3-15
J3-7
+15V
R11
R10
J1-29
R2
J1-1
J1-10
U41
-35V
+35V
J1-6
U40
-12V
FILAMENT BOARD
J1-25
U7
+12V
F1
TP2
AUXILIARY BOARD
5
4
1
J9-3
-12V
R227
R217
5
R228
1
J1-4
F2
U3A
+12V
R226
RN2D
4
J9-4
R225
CONTROL
BOARD
+12V
U3D
J1-1
R27, R32
RN4F
2
5
RN2C
4
+12V
Q16
+35V
J9-1
-
R21
R20
DUAL SPEED STARTER IS
OPTIONAL. LOW SPEED
STARTER IS STANDARD IN
INDICO 100 GENERATORS
U3C
+12V
R223
R123
Q1
DUAL SPEED STARTER BOARD
CONTROL BOARD
-12V
+12V
R22
+/- 12V/SS FAULT TO GENERATOR
READY DETECTOR CIRCUIT ON
CONTROL BOARD, SEE MD-0761
-
JW1
TUBE 1/TUBE 2
SELECT SIGNAL
TO MD-0765
J6-5
+35V
9
8
5
J5-5
J8-3
-
7
D19
F2
ONE FILAMENT BOARD IS
STANDARD IN INDICO 100
GENERATORS, THE SECOND
FILAMENT BOARD IS OPTIONAL
+12V
J1-3
TO 2.1 V
CURRENT
SINK
2
1
5
5
4
1
2
R33
14
12
P/S ON
-15V
DS34
DS35
GRN
RED
15
TO 2.1 V
CURRENT
SINK
DATA LATCH,
BUFFER, &
DRIVER
U27, U19
& U16
U17
+5V
12
11
Q4
4
+5V
11
DRIVER
DRIVER
U16
U16
TUBE 1/TUBE 2
SELECT SIGNAL
TO MD-0787
DS22
FLUORO
16
TP2
+5V
FILAMENT BOARD
Q1
DS23
FLUORO
DS2
LOW
TO 2.1 V
CURRENT
SINK
17
DS4
HIGH
TO 2.1 V
CURRENT
SINK
U24
BUFFER
DATA LATCH
& BUFFER
*
DATA BUS
D0..D7
BIT 0
U27, U19
BIT 2
DATA
LATCH
-35V
J1-6
R9
U9
10
D1
R14
DS10
RED
-12V
J1-5
R13
DS9
GRN
F1
+5V
RN11I
CONT.
J1-2
13
RN11A
RN7F
+5V
*
THE POWER SUPPLY ON COMMAND (P/S ON) WHICH ENERGIZES
K1 / K2 ON THE POWER INPUT BOARD IS ISSUED BY THE GENERATOR
CPU BOARD AFTER THE +5 VDC RAIL IS DETECTED BY THE CPU.
THE DC RAILS, INCLUDING THE +5 VDC RAIL, ARE ESTABLISHED
WHEN THE SYSTEM ON COMMAND IS RECEIVED. REFER TO MD-0762.
DATA
LATCH
U27
U49
BIT 7
BIT 3
GENERATOR CPU BOARD
DRAWN
G. SANWALD
CHECKED________
DES.\MFG.\AUTH.
HTW
DATE
10 MAR 2000
________
DC BUS & POWER
DISTRIBUTION
10 MAR 2000
MD-0788 REV AB
PAGE 3
Use and disclosure is subject to the restrictions on the title page of this CPI document.
SHEET 3 OF 6
24 VDC RETURN
J4-12
J5-12
J4-14
J5-14
K3
24 VDC
0V
J1-1
F5
D3
C10
+5V
J1-3
F3
18 VAC
FROM
PAGE 1, 2
K2
J1-4
D1
C16
0V
F4
J1-7
F2
J1-9
F1
220 VAC
+12V
J16-8
-12V
TP5
110 VAC
U40
220 VAC
J10-1
FLUORESCENT LAMP
J10-4
LINE SYNC
TO MD-0767
ZERO CROSS
DETECTOR
220 VAC
220 VAC
R4
+24V
R78
300 VAC
BACKLIGHT
POWER SUPPLY
(Q2, Q3, T1,
C61, ETC)
CONSOLE BOARD (31 X 42 CM CONSOLE)
-15V
K1
TO RAD-ONLY
CONSOLE
(PAGE 5)
LCD DISPLAY ASSEMBLY
TP6
110 VAC
-15V
TP7
-15 V
REGULATOR
-24V
19
R6
U4
R5
110 VAC
TP2
J16-3
+12 V
REGULATOR
-12 V
REGULATOR
18 VAC
TP9
+5V
TP2
TP3
U3
U2
J1-5
F1
CONSOLE BOARD & LCD DISPLAY
ASSEMBLY SHOWN WITHIN DASHED
LINES USED ON 31 X 42 CM CONSOLE
ONLY. REFER TO PAGE 5 FOR
23 X 56 CM CONSOLE AND FOR
RAD-ONLY CONSOLE.
+1.2V
TP10
R3
+5 / +16VDC
POWER SUPPLY
CIRCUIT
(U47, Q4, T1,
D17, D18, ETC.)
F6
+3.3V
TP12
R1
R81
J1-2
J5-15
+ 5V, + 3.3V, +1.2V
AND - 15V
POWER SUPPLY
CIRCUITS
(U9, U10, U11,
D1-D6, L1, ETC.)
TP1
U5
+15 V
REGULATOR
R2
TP13
TP13
18 VAC
J4-15
+5V
TP8
TP7
+15V
+24V
T2
J4-13
J5-13
REFER TO SYSTEM ON, MD-0762
TP11
J2-1
J1-1
J2-3
J1-3
J2-6
J1-6
J2-7
J1-7
J2-8
J1-8
J2-9
J1-9
110 VAC
+24VDC
R7
DS1
D15
POWER ON
ROOM INTERFACE BOARD
+12V
+12V
K1
+24V
+24V
J10-13
J10-19
K2
J10-11
REFER TO SYSTEM ON, MD-0762
REFER TO MD-0757 (AEC) FOR
PINOUTS OF THE DC RAIL CONNECTIONS
ON THE AEC BOARD
J10-16
J10-17
-12V
-12V
-24V
-24V
K3
+24V
J17-3
GENERATOR INTERFACE BOARD
J13-21
J13-23
J13-11
J13-13
J13-17
J3-6
J13-6
J3-1
J13-1
J3-8
J13-8
J3-5
J13-5
-15V
+5V
TP16
-12V
J13-4
J13-7
DS38
DS37
TP18
TP21
J3-7
J11-1
DS33
J11-5
TO REMOTE FLUORO
CONTROL, PAGE 5
TP20
J13-2
J3-4
+12V
R89
-15V
J3-2
+5V
R75
R80
TP4
+24V
+12V
TP19
DS36
-15V
+15V
+15V
+12V
R85
-12V
+5V
TP17
R77
J13-15
THE DIGITAL I/O BOARD IS OPTIONAL WITH R&F
GENERATORS
REFER TO MD-0767 (DIGITAL INTERFACE) FOR
PINOUTS OF THE DC RAIL CONNECTIONS
SHOWN TO THE RIGHT OF THIS TEXT
+5V
J13-3
R76
-15V
J3-3
-15V
DS39
R90
+12V
J13-9
+15V
+15V
+24V
R86
+15V
R81
+5V
J17-4
R78
TO COIL OF POWER DISTRIBUTION
RELAY (CUSTOMER SUPPLIED)
MAXIMUM 100 MA
AEC BOARD
-12V
GENERATOR CPU BOARD
DIGITAL I/O BOARD
DRAWN
G. SANWALD
CHECKED________
DES.\MFG.\AUTH.
HTW
DATE
10 MAR 2000
________
DC BUS & POWER
DISTRIBUTION
10 MAR 2000
MD-0788 REV AB
SHEET 4 OF 6
Use and disclosure is subject to the restrictions on the title page of this CPI document.
+12V
+12V
+5V
U8
J11-1
P1-1
J11-5
P1-5
+5 V
REGULATOR
D4
+5V
+12V
GENERATOR CPU BOARD
(FROM PAGE 4)
+5V
J1-17
J2-17
J1-18
J2-18
J1-15
J2-15
J1-19
J2-19
J1-20
J2-20
+12V
REMOTE FLUORO
DISPLAY BOARD
REMOTE FLUORO
CONTROL BOARD
REMOTE FLUORO CONTROL OPTIONAL WITH
INDICO 100 R&F GENERATORS
J5-12
REFER TO SYSTEM ON, MD-0762
J5-14
FROM GENERATOR
INTERFACE BOARD
(PAGE 4)
+5V
+5V
TP2
J5-13
F1
J5-15
+ 5 / -20VDC
POWER SUPPLY
CIRCUIT
(U30, Q5, T1,
D7, D8, ETC.)
+5V
J8-1
J1-1
J8-2
J1-2
J8-23
J1-23
U31
-12 V
REGULATOR
-12V
J8-24
J1-24
J8-25
J1-25
J8-26
J1-26
CONSOLE DISPLAY BOARD
U32
THESE ITEMS ARE
USED ON THE 23 X 56
CM CONSOLE ONLY.
300 VAC
BACKLIGHT
POWER SUPPLY
J10-1
-12V
FLUORESCENT LAMP
J10-5
CONSOLE CPU BOARD (23 x 56 CM CONSOLE)
J16-3
J8-3
LCD DISPLAY ASSEMBLY
+5V
TP3
+3.3V
TP7
FROM GENERATOR
INTERFACE BOARD
(PAGE 4)
TP2
J16-8
J8-8
F1
+ 5V, + 3.3V, +1.2V
AND - 20V
POWER SUPPLY
CIRCUITS
(U12, U18, U20,
D3-D7, L1, ETC.)
+1.2V
TP6
TP14
TP8
+5V
THESE ITEMS ARE
USED ON THE “RAD-ONLY”
CONSOLE ONLY.
TP9
19
300 VAC
BACKLIGHT
POWER SUPPLY
(Q1, Q2, T1,
C36, ETC.)
-20V
J5-1
FLUORESCENT LAMP
J5-5
DRAWN
CONSOLE BOARD (RAD-ONLY CONSOLE)
LCD DISPLAY ASSEMBLY
G. SANWALD
CHECKED________
DES.\MFG.\AUTH.
HTW
DATE
10 MAR 2000
________
DC BUS & POWER
DISTRIBUTION
10 MAR 2000
MD-0788 REV AB
SHEET 5 OF 6
Use and disclosure is subject to the restrictions on the title page of this CPI document.
NOTE
REFERENCE
REMARKS
1
THIS VOLTAGE WILL BE APPROXIMATELY 0 VDC WHEN THE DC BUS CAPACITORS ARE NOT CHARGED. THIS WILL RISE TO APPROXIMATELY 6 VDC WHEN THE DC BUS CAPACITORS ARE FULLY CHARGED.
2
THE DC BUS CAPACITORS MUST CHARGE WITHIN APPROXIMATELY 0.25 SECONDS OF THE GENERATOR BEING SWITCHED ON. IF THE DC BUS CAPACITORS DO NOT CHARGE NORMALLY, THE SOFT START
OK PROTECTION CIRCUIT ENERGIZES RELAY K1 (SEE # 4) AND INHIBITS OPERATION OF THE SOFT START DRIVER CIRCUIT (SEE # 3).
3
“LOW” (APPROXIMATELY 0 VDC) COMMANDS THE MAIN CONTACTOR K5 ON THE POWER INPUT BOARD TO CLOSE. “HIGH” (APPROXIMATELY 12 VDC) = CONTACTOR OPEN. THIS OUPUT WILL NOT SWITCH
“LOW” IF THE DC BUS CAPACITORS ARE NOT CHARGED (SEE # 1 & 2).
4
K1 REMAINS DE-ENERGIZED (CONTACTS AS SHOWN) IF NO SOFT-START FAULT IS DETECTED. THEREFORE, K1 AND K2 ON THE POWER INPUT BOARD WILL ENERGIZE WHEN THE GENERATOR IS SWITCHED
ON. A SOFT-START FAULT ENERGIZES K1 ON THE AUXILIARY BOARD, DE-ENERGIZING K1 ON THE POWER INPUT BOARD. THIS WILL INHIBIT FURTHER DC BUS CHARGING.
5
“LOW” (APPROXIMATELY 0 VDC) = TUBE 2 SELECTED, “HIGH” (APPROXIMATELY 12 VDC) = TUBE 1 SELECTED.
“LOW” (APPROXIMATELY 0 VDC) = FLUORO FAN(S) ON, “HIGH” (APPROXIMATELY 12 VDC) = FLUORO FAN(S) OFF. FAN(S) ARE SWITCHED ON DURING PULSED OR CONTINUOUS FLUORO OPERATION, AND
REMAIN ON FOR APPROXIMATELY 20 MINUTES AFTER SWITCHING TO RAD MODE.
“LOW” INDICATES CONTACTOR CLOSED (SEE # 3). THE CONTACTOR CLOSED SIGNAL OCCURS APPROXIMATELY 10 SECONDS AFTER INITIAL GENERATOR TURN-ON, ASSUMING NORMAL DC BUS CHARGING.
“HIGH” (APPROXIMATELY 12 VDC) = RAD / PULSED FLUORO MODE. “LOW” (APPROXIMATELY 0 VDC) = CONTINUOUS FLUORO MODE. USED ON R&F GENERATORS ONLY.
“HIGH” (APPROXIMATELY 12 VDC) = PULSED FLUORO / LOW POWER MODE. “LOW” (APPROXIMATELY 0 VDC) = HIGH POWER RAD MODE. NOT USED ON ALL MODELS, REFER TO MD-0786 FOR DETAILS.
24 VDC (APPROXIMATELY) ENERGIZES K1 AND / OR K2 ON THE POWER INPUT BOARD, INITIATING THE POWER-ON SEQUENCE. SEE # 4.
“HIGH” (APPROXIMATELY 5 VDC) = TUBE 2 SELECTED. “LOW” (APPROXIMATELY 0 VDC) = TUBE 1 SELECTED.
“HIGH” (APPROXIMATELY 5 VDC) = RAD / PULSED FLUORO MODE. “LOW” (APPROXIMATELY 0 VDC) = CONTINUOUS FLUORO MODE. USED ON R&F GENERATORS ONLY.
“HIGH” (APPROXIMATELY 5 VDC) = PULSED FLUORO / LOW POWER MODE. “LOW” (APPROXIMATELY 0 VDC) = HIGH POWER RAD MODE. NOT USED ON ALL MODELS, REFER TO MD-0786 FOR DETAILS.
DS9 LIT = CONTACTOR CLOSED, DS10 LIT = CONTACTOR NOT CLOSED.
DS34 LIT = GENERATOR ON COMMAND ISSUED (CONSOLE PASSED ALL SELF TESTS). DS35 LIT = GENERATOR ON COMMAND NOT ISSUED (DURING CONSOLE SELF TESTS, OR IF SELF TESTS FAILED).
6
7
8
9
10
11
12
13
14
15
16
17
18
19
DS22 LIT = FLUORO SELECTED, DS23 LIT = RAD SELECTED.
DS2 LIT = PULSED FLUORO / LOW POWER MODE. DS4 LIT = HIGH POWER RAD MODE. SEE # 13.
D1 LIT INDICATES + OR - 12 VDC FAULT, OR SOFT START FAULT.
THE VOLTAGE WAVEFORM AT THIS TEST POINT IS DEPICTED IN FIGURE 1 BELOW.
18 s
4V
FIGURE 1
-8 V
DRAWN
G. SANWALD
CHECKED________
DES.\MFG.\AUTH.
HTW
DATE
10 MAR 2000
________
DC BUS & POWER
DISTRIBUTION
10 MAR 2000
MD-0788 REV AB
SHEET 6 OF 6
Use and disclosure is subject to the restrictions on the title page of this CPI document.
24 VDC RETURN
T2
F5
D3
J17-2
J17-1
+ 24 VDC
*
S3
Q1
Q2
R15
24 VDC SUPPLY FOR
SYSTEM ON/OFF.
SEE MD-0788, PAGE 4
LOCKOUT
NORMAL
D4
S1
OFF
K3
D16
K2
R13
Q3
DS1
S2
ON
K1
3
R & F MEMBRANE
CONSOLE
ON
P1-3
J3-3
J5-10
J4-10
1
P1-2
J3-2
J5-11
J4-11
2
P1-1
J3-1
J5-12
J4-12
REFER TO DC BUS &
POWER DISTRIBUTION,
MD-0788, PAGE 4
JW1
3
2
1
JUMPER POSITION:
TO ENERGIZE K1 ONLY WHEN
THE CONSOLE IS SWITCHED ON
JUMPER JW1 PINS 1-2
TO ENERGIZE K1 AT ALL TIMES THAT
THE GENERATOR AC MAINS IS ON
JUMPER JW1 PINS 2-3
(K1 SWITCHES THE 110 & 220 VAC
SUPPLIES TO THE ROOM
INTERFACE BOARD)
OFF
CONSOLE
BOARD
KEYBOARD ASSEMBLY
RAD-ONLY
CONSOLE
ON
P1-15
J7-15
J8-6
J16-6
P1-16
J7-16
J8-7
J16-7
P1-17
J7-17
J8-3
J16-3
OFF
CONSOLE
BOARD
KEYBOARD ASSEMBLY
DS1
J1-1
J16-1 R154
J1-3
J16-3
J1-4
J16-4
GENERATOR INTERFACE BOARD
USE DRAWING DC BUS & POWER DISTRIBUTION, MD-0788, IN CONJUNCTION WITH THIS DOCUMENT
TOUCH SCREEN
CONSOLE
J28-10
J4-10
* TO CONNECT AN EMERGENCY-OFF SWITCH, REMOVE JUMPER FROM J17-1 TO J17-2. THEN CONNECT
THE EMERGENCY OFF SWITCH TO J17-1 AND J17-2.
OFF
SW1
J1-5
J16-5
J28-11
J4-11
J1-6
J16-6
J28-12
J4-12
ON
SW2
FRONT PANEL BOARD
TOUCH SCREEN
BOARD
DRAWN
G. SANWALD
CHECKED_________
DATE
02 JUN 2000
_________
SYSTEM ON
DES.\MFG.\AUTH.
L. FOSKIN
02 JUN 2000
MD-0762 REV H
SHEET 1 OF 2
Use and disclosure is subject to the restrictions on the title page of this CPI document.
NOTE
REFERENCE
REMARKS
1
MOMENTARILY PRESSING ON CONNECTS THIS LINE TO “24 VDC RETURN”. THIS LATCHES RELAY DRIVERS ON THE GENERATOR INTERFACE BOARD,
ENERGIZING K2 AND K3, AND POSSIBLY K1 (DEPENDING ON JW1 SETTING). SEE NOTE ADJACENT TO JW1 ON THIS DOCUMENT.
2
MOMENTARILY PRESSING OFF CONNECTS THIS LINE TO “24 VDC RETURN”. THIS UNLATCHES RELAY DRIVERS ON THE GENERATOR INTERFACE BOARD,
DE-ENERGIZING K2 AND K3, AND POSSIBLY K1 (DEPENDING ON JW1 SETTING).
3
DS1 LIT INDICATES THE PRESENCE OF THE 24 VDC SUPPLY SHOWN. THIS 24 VDC SUPPLY WILL BE PRESENT IF THE GENERATOR IS CONNECTED TO A
LIVE AC MAINS SUPPLY.
DRAWN
G. SANWALD
CHECKED_________
DATE
02 JUN 2000
_________
SYSTEM ON
DES.\MFG.\AUTH.
L. FOSKIN
02 JUN 2000
MD-0762 REV H
SHEET 2 OF 2
Use and disclosure is subject to the restrictions on the title page of this CPI document.
+24V
NOTE *
SPARE /
TABLE
STEPPER
BUCKY
CONTACTS
TB1-5
J2-15
J9-15
TB1-4
J2-16
J9-16
4
TB2-5
J2-13
J9-13
TB2-4
J2-14
J9-14
TB2-7
J2-11
J9-11
R53
+24V
TB2-6
J2-12
3
2
J2-24
J9-24
TB3-4
J2-25
J9-25
3
1
JW10
1
5
2
4
2
JW9
1
R55
R66
J9-12
TB3-5
4
NOTE *
1
5
2
4
1
JW7
1
5
U7, U12, U18,
U19, U25
U21
R54
4
2
U31
R56
+24V
U29
R67
REMOTE TOMO
SELECT
2
+24V
NOTE *
4
COLLIMATOR
INTERLOCK
3
NOTE *
4
3
2
1
JW2
SEE
MD-0761
D0
J12-1
J6-1
D1
J12-2
J6-2
D2
J12-3
J6-3
D3
J12-4
J6-4
D4
J12-5
J6-5
D5
J12-6
J6-6
D6
J12-7
J6-7
D7
J12-8
J6-8
R23
TOMO
EXPOSURE
TB3-7
J2-22
J9-22
TB3-6
J2-23
J9-23
TB4-4
J2-21
J9-21
U8
U10
R21
ROOM DOOR
INTERLOCK ***
+24V
U14
TB4-5
R29
J2-20
R38
4
2
1
5
R34
R36
2
4
4
U13
J9-20
TB4-7
3
J2-19
T2 FROM MD-0787
J9-19
R33
2
+24V
R32
TB4-8
THERMAL
SWITCH 1
+24V
NOTE *
+24V
TB4-6
THERMAL
SWITCH 2
5
1
JW3
1
5
BUFFER, DRIVER
AND ADDRESS
DECODER CIRCUITS
U9
R22
U16
1
4
2
R37
TB4-9
T1 FROM MD-0787
MULTIPLE SPOT
EXPOSURE
I.I.
SAFETY
TB5-12
J2-17
J9-17
TB5-11
J2-18
J9-18
TB6-4
J2-9
J9-9
TB6-3
J2-10
J9-10
+24V
NOTE *
+24V
4
NOTE *
3
2
R35
4
3
2
JW8
1
1
JW6
1
5
2
4
U20
J2-8
TB6-5
REMOTE FLUORO
EXPOSURE ***
REMOTE
PREP
+24V
J9-8
TB6-6
J2-7
J9-7
TB6-8
J2-5
J9-5
TB6-7
J2-6
J9-6
R68
**
U30, U42,
U44
R70
R71
1
5
2
4
R52
U27
R69
DATA BUS
DO..D7
+24V
NOTE *
REMOTE
EXPOSURE
TB6-10
J2-3
J9-3
TB6-9
J2-4
J9-4
4
TP14
REFER TO PAGE
3 FOR DEFINITION
OF INPUTS
J2-1
J2-2
+24V
NOTE *
4
J9-1
J9-2
3
2
R77
R76
JW15
1
3
1
JW14
1
5
2
4
2
R75
U28
R74
**
U41,
U43
ROOM INTERFACE BOARD
GENERATOR INTERFACE BOARD
THIS PAGE SHOWS THE ROOM INTERFACE INPUTS. ROOM INTERFACE OUTPUTS ARE SHOWN ON PAGE 2
** ADDITIONAL CIRCUITS ARE USED IN THE AREAS INDICATED **. THESE CIRCUITS ARE NOT
RELEVANT TO THIS ROOM INTERFACE DIAGRAM, HOWEVER, THEY ARE PART OF THE X-RAY
EXPOSURE FUNCTION AND ARE SHOWN ON MD-0761
*** REFER TO “ROOM DOOR INTERLOCKS” ON SHEEET 3.
Use and disclosure is subject to the restrictions on the title page of this CPI document.
*
24 VDC EXTERNAL INPUT POSITION
FOR JW2, JW3, JW6, JW7, JW8, JW9,
JW10, JW14, JW15 SHOWN.
JUMPER CONNECTS PINS 2-3; 24 VDC
APPLIED EXTERNALLY ACTIVATES
THE INPUT(S) BY ENERGIZING THE
APPROPRIATE OPTO-COUPLER.
GENERATOR CPU BOARD
*
DRY CONTACT INPUT POSITION
FOR JW2, JW3, JW6, JW7, JW8, JW9,
JW10, JW14, JW15 SHOWN. JUMPER
CONNECTS PINS 1-2 AND 3-4; AN
EXTERNAL DRY CONTACT CLOSURE
ACTIVATES THE INPUT(S) BY ENERGIZING
THE APPROPRIATE OPTO-COUPLER.
DRAWN
G. SANWALD
CHECKED
S. BLAKE
DES.\MFG.\AUTH.
L. FOSKIN
DATE
13 APR 2000
14 APR 2000
ROOM
INTERFACE
13 APR 2000
MD-0763 REV K
SHEET 1 OF 3
FOR +24 VDC SOURCE, REFER TO
MD-0788, PAGE 4, ON
GENERATOR INTERFACE BOARD
U6, U7, U11, U12
U24, U25, U34
+24V
+24V
J9-40
J2-40
J9-39
J2-39
C2
TB1-2
JW12 ***
R2
K1
DRIVE 1
J9-30
TB1-1
TP1
J2-30
C1
K1
JW1
1
2
3
4
TP2
DRIVE 2
J9-29
TOMO / BUCKY 4
SELECT
5
6
7
8
R1
TB1-11
JW9 ***
K2
DRY * LIVE *
TB1-12
J2-29
BUCKY 3
SELECT
K2
TB11
TP3
DRIVE 3
J6-1
J12-1
J9-28
J2-28
J6-2
J12-2
2
3
4
5
7
8
C3
K4
J2-27
K4
TB2-2
JW11 ***
R3
K1
D1
6
DRY * LIVE *
K3
TP4
DRIVE 4
1
K6
K3
D0
J9-27
JW2
K3
TB2-1
K2
BUCKY 2
SELECT
TP5
DRIVE 5
J6-3
J12-3
J9-34
C4
J2-34
220 VAC
K5
D2
JW3
1
2
3
4
5
TB10
6
7
8
TB2-11
JW10 ***
R4
K4
DRY * LIVE *
TB2-12
TP6
DRIVE 6
J6-5
J12-4
J12-5
J12-6
TB3-1
K6
D3
D4
ADDRESS DECODERS,
BUFFER, REGISTER,
AND DRIVER
CIRCUITS
JW4
1
2
3
4
5
TP7
DRIVE 7
J9-31
6
7
K5
8
TB3-12
JW14 ***
C6
110 VAC
J2-35
R6
TB9
D5
TP9
J6-7
J12-7
J9-36
JW5
1
2
3
4
5
K9
J6-8
J12-8
J9-37
6
7
8
TB4-1
K10
J9-38
TB8
J2-38
TP12
DRIVE 12
J9-33
+24V
JW6
1
2
3
K9
4
K10
LIVE 24 VDC **
J2-33
TB5-4
TUBE 2 INDICATOR
MAG 3
TB5-7
TB5-6
MAG 2
TB5-5
J2-26
DRIVE 1 TO
DRIVE 13 = “LOW”
ENERGIZES
THE RELAYS
TUBE 1 INDICATOR
TB5-3
TP13
J9-26
TUBE 1 / TUBE 2
INDICATOR (COMM)
DRY **
K12
DRIVE 13
ROOM
LIGHT
TB5-2
A JUMPER WIRE MUST BE CONNECTED TO
TB11 PIN 1, 2, 3, 4 OR 5 AS APPROPRIATE
FROM TB8, TB9, OR TB10 IN ORDER TO
SUPPLY 24 VDC, 110 VAC, OR 220 VAC
FROM THE SELECTED OUTPUT
K11
DATA BUS
DO..D7
TB4-2
NOTE THE FOLLOWING IF USING JW1, JW2,
JW3, JW4, OR JW5 IN THE LIVE CONTACT
POSITION:
24 VDC E6
TP11
DRIVE 11
TB4-3
K7
J2-37
D7
TB4-12
DRY * LIVE *
TP10
DRIVE 10
K8
JW13
J2-36
D6
TOMO / BUCKY
START
TB4-11
C5
K6
K8
DRIVE 9
COLLIMATOR
BYPASS
TB3-11
TP8
J9-35
TB3-2
DRY * LIVE *
J2-31
K7
DRIVE 8
J6-6
J2-32
R5
J6-4
J9-32
BUCKY 1
SELECT
TB5-8
K12
TB7
K13
K11
+24V
TB5-10
MAG 1
TB5-9
TP14
JW7
K13
1
2
3
TB5-1
4
+24V
DRY **
TB6-1
LIVE 24 VDC **
JW8
1
2
3
TB6-2
4
ALE
OUTPUT
TB6-11
DRY **
GENERATOR CPU BOARD
THIS PAGE SHOWS THE ROOM INTERFACE
OUTPUTS. ROOM INTERFACE INPUTS ARE
SHOWN ON PAGE 1
GENERATOR INTERFACE BOARD
*
LIVE CONTACT
DRY CONTACT
Use and disclosure is subject to the restrictions
on the title page of this CPI document.
DRY CONTACT POSITION
FOR JW1 TO JW5 SHOWN.
JUMPER CONNECTS PINS 4-6
ROOM INTERFACE BOARD
LIVE CONTACT
DRY CONTACT
LIVE CONTACT POSITION
FOR JW1 TO JW5 SHOWN.
JUMPER CONNECTS PINS 6-8
**
LIVE CONTACT 24VDC
TB6-12
LIVE 24 VDC **
LIVE CONTACT 24VDC
DRY CONTACT
DRY CONTACT
DRY CONTACT POSITION FOR
JW6 TO JW8 SHOWN.
JUMPER CONNECTS
PINS 2-3
LIVE CONTACT 24VDC POSITION
FOR JW6 TO JW8 SHOWN.
JUMPERS CONNECT
PINS 1-2 AND 3-4
***
THESE JUMPERS MAY NEED TO BE INSERTED
IN SOME APPLICATIONS. REFER TO
CHAPTER 3B FOR DETAILS.
DRAWN
G. SANWALD
CHECKED
S. BLAKE
DES.\MFG.\AUTH.
L. FOSKIN
DATE
13 APR 2000
SPARE
OUTPUT
14 APR 2000
ROOM
INTERFACE
13 APR 2000
MD-0763 REV K
SHEET 2 OF 3
INPUT
DESCRIPTION
SPARE / TABLE STEPPER INPUT
When used with the table stepper / kV-mAs reduction for peripheral angiography option (used for peripheral runoff studies), this input
tells the generator to advance to the next kV/mAs step.
When the above option is not enabled, this input may be programmed as a spare input.
BUCKY CONTACTS
This indicates that the Bucky is ready for an exposure (the grid is moving). The outputs of all Buckys must be connected in parallel to this single
input.
COLLIMATOR INTERLOCK
This is the input for the collimator interlock. This may be programmed to inhibit exposures if this input is not active.
REMOTE TOMO SELECT
This input, when active, remotely selects tomography.
TOMO EXPOSURE
Requests a tomographic exposure when this input is active. The exposure starts when the input is activated, and stops when the input is
deactivated.
ROOM DOOR INTERLOCK
This is the interlock for the X-ray room door. If programmed, will inhibit an exposure when this input is not active.
THERMAL SWITCH 2
Input for the tube 2 thermal switch. Exposures are inhibited when this input is not active. The power supply is also turned off to prevent rotor
operation.
THERMAL SWITCH 1
Input for the tube 1 thermal switch. Exposures are inhibited when this input is not active. The power supply is also turned off to prevent rotor
operation.
MULTIPLE SPOT EXPOSURE
Enables density compensation when doing multiple exposures on a single film. In this mode of operation, the X-ray field is usually coned down
to a small area. Due to the resulting AEC field cutoff, an AEC density offset may be required. This is designated multiple spot compensation.
The function MULT. SPOT COMP in the AEC calibration menus applies the required compensation.
I.I SAFETY / REMOTE HLF SELECT Refer to chapter 3B: On applicable units, if the HLF SELECT input is CONSOLE, this will be the input for the image intensifier position interlock.
If the HLF SELECT input is REMOTE, this will be the high-level fluoro select input.
REMOTE FLUORO EXPOSURE
Fluoro foot switch input. Fluoro exposures are requested when this input is active.
REMOTE PREP
External PREP request, typically generated by room equipment.
REMOTE EXPOSURE
External X-ray EXPOSE command from room equipment (i.e. table or digital imaging system).
Certain inputs will only be active if enabled in programming (per chapter 3C), and / or the generator includes the corresponding option.
ROOM DOOR INTERLOCKS
DOOR
INTERLOCK
SWITCH
Configuration A
Inhibits new exposures if the room
door is open. Does not interrupt
exposures in process when the
door is opened.
TB4-4
TB4-5
FLUORO
FOOT
SWITCH
(R&F UNITS
ONLY)
DOOR
INTERLOCK
SWITCH
Configuration B
ROOM DOOR INTERLOCK
DOOR INTERLOCK SWITCH
TB6-5
TB6-6
Inhibits new exposures if the room
door is open. Stops fluoro exposures
if the room door is opened
during a fluoro exposure.
REMOTE FLUORO EXPOSURE
TB4-4
TB4-5
ROOM DOOR INTERLOCK
TB6-5
TB6-6
REMOTE FLUORO EXPOSURE
FLUORO FOOT SWITCH
NOTE: For this configuration, the room door interlock switch must be a
double-pole type (one pole for the room door interlock, with the second
pole in series with the fluoro foot switch).
DRAWN
G. SANWALD
CHECKED
S. BLAKE
DES.\MFG.\AUTH.
L. FOSKIN
DATE
13 APR 2000
14 APR 2000
ROOM
INTERFACE
13 APR 2000
MD-0763 REV K
SHEET 3 OF 3
Use and disclosure is subject to the restrictions on the title page of this CPI document.
+24V
+24V
2
4
1
5
U22
5
2
4
2
4
LAST IMAGE
HOLD CIRCUIT
(U39, C30, ETC.)
REMOTE FLUORO
EXPOSURE INPUT
TP5
TP6
+5V
+5V
J5-6
J4-6
J5-7
J4-7
J5-8
J4-8
R19
1
FROM
RAD-ONLY
CONSOLE
(PAGE 3)
U15
R25
2
4
1
5
2
4
ADDRESS DECODER,
DATA LATCH, AND
DRIVER
1
5
U18, U25
2
4
U37
R18
2
J13-7
R72
COM
CPU
1
5
2
4
U46
RN14C
J12-5
J6-5
RN14D
5
U25, U12, U7
BUFFER AND
ADDRESS
DECODER
J12-7
J6-7
RN14B
J6-4
RN14E
4
J12-4
5
KV CONTROL
REFER TO MD-0759
4
1
3
2
4
4
3
2
JW15
1
SEE NOTE 1
1
J9-3
U4
3
MA CONTROL
REFER TO MD-0760
R77
2
J9-4
J13-9
1
5
2
4
1
5
2
4
U25, U12, U7
U43
X-RAY
TO 2.1 V
CURRENT
SINK
+24V
U2
HAND
SWITCH
DS41
U28
1
U3
3
PREP
DS42
4
+24V
J16-4
J16-5
FLUORO
FOOT
SWITCH
5
R12
R11
J4-9
BUFFER AND
ADDRESS
DECODER
J16-3
4
J6-6
U18, U25
+24V
U38
U18
DATA BUS
D0..D7
J12-6
2
R20
+5V
FPGA
EXP
SWT
4
2
R70
+5V
+12V
SEE NOTE 1
J5-9
R13
J9-8
U30
R14
R16
R15
1
EXPOSURE ENABLE
COMMAND FROM
MD-0767, PAGE 1
BUFFER AND ADDRESS
DECODER (U18, U25)
5
R24
TP4
EXPOSURE ENABLE COMMAND
TO J10-35 (PAGE 2)
3
ADDRESS DECODER,
DATA LATCH, AND
DRIVER
4
1
J6-17
U25, U12, U7
U42
2
J12-17
U32
U44
REFER TO PAGE 4 FOR LOGIC LEVELS,
NOTES, ETC, REFERENCED BY
HEXAGONAL SYMBOL:
1
R92
5
5
R82
1
1
RN19B
NOTE: THE PORTION OF THE REMOTE FLUORO EXPOSURE,
REMOTE EXPOSURE, AND REMOTE TOMO SELECT INPUTS
SHOWN WITHIN THE DASHED OUTLINES IS DETAILED ON
MD-0763, PAGE 1
R39, R57
1.
J13-3
REMOTE
EXPOSURE
INPUT
J13-1
R76
J13-5
J3-18
CONSOLE BOARD
J3-19
ADDRESS DECODER,
DATA LATCH, AND
DRIVER
J12-5
RN14D
J6-5
4
BUFFER AND ADDRESS
DECODER (U18, U25)
U41
J3-20
+24V
4
P1-18
3
2
JW2
1
SEE NOTE 1
RN14A
J9-24
P1-19
PREP
THE CONSOLE BOARD &
KEYBOARD ASSEMBLY
SHOWN ON THIS PAGE IS
USED ON THE 31 X 42 CM
CONSOLE ONLY. REFER TO PAGE
3 FOR THE 23 X 56 CM CONSOLE
AND THE RAD-ONLY CONSOLE,
AND PAGE 4 FOR THE
TOUCH SCREEN CONSOLE.
R23
J9-25
1
5
X-RAY
P1-20
KEYBOARD ASSEMBLY
2
4
REMOTE
TOMO
SELECT
INPUT
1
5
R21
2
J6-8
U25, U12, U7
U8
ADDRESS DECODER,
DATA LATCH, AND
DRIVER
BUFFER AND ADDRESS
DECODER (U18, U25)
GENERATOR CPU BOARD
4
DRAWN
U10
G. SANWALD
CHECKED
S. BLAKE
DES.\MFG.\AUTH.
4
GENERATOR INTERFACE BOARD
Use and disclosure is subject to the restrictions on the title page of this CPI document.
DATA BUS
D0..D7
J12-8
L. FOSKIN
DATE
26 APR 2000
26 APR 00
26 APR 2000
X-RAY EXPOSURE
RAD/FLUORO
MD-0761 REV L
SHEET 1 OF 4
TUBE 1 / TUBE 2 MISMATCH &
THERMOSTAT OPEN SIGNAL
FROM MD-0787
13
J1-4
GRN
6
R174
RN11D
DS31
RED
TO 2.1 V
CURRENT
SINK
DS27
GRN
7
U27
D19
+5V
14
DS26 X-RAY
DS28
9
5
2
4
RN5E
12
RESET COMMAND TO MD-0759, PAGE 1 &
MD-0760, PAGE 2
J9-9
J3-9
J9-7
J3-7
ENABLE COMMAND TO MD-0764
H.T. TANK
U4
J10-14
RED
J1-33
RN2A
10
+12V
15
J10-33
U19, U16
J10-15
J1-15
“PREP ENABLED”
DETECTOR CKT
(U11B, U10C, ETC)
RN1C
5
1
11
EXPOSURE ENABLE COMMAND
FROM PAGE 1
12
J1-34
RN4B
“GENERATOR READY”
DETECTOR CIRCUIT
(U10A, Q6, D37, ETC)
J10-16
18
CONTINUED
ON PAGE 3
Q12
+/- 12V/SS FAULT FROM MD-0788,
PAGE 3 (CONTROL BOARD)
RN1H
1
5
“X-RAY REQUEST”
DETECTOR CKT
(U11D, RN7, ETC)
FILAMENT FAULT FROM MD-0760, PAGE 1
STATOR FAULT FROM MD-0764 & MD-0765
U5
J1-35
RN1F
2
4
HIGH KV / INVERTER FAULT FROM MD-0759, PAGE 1
& HIGH MA FAULT FROM MD-0760, PAGE 2
16
HV / MA FAULT TO MD-0760, PAGE 1
TP12
RN1G
1
5
2
4
U3
RN1E
“X-RAY REQUEST”
DETECTOR CKT
(U10D, RN7, ETC)
TP14
LOGIC “OR / NOR”
CIRCUITS (U10B, U14,
Q4, Q13, D91, ETC)
17
DRIVE ENABLE COMMAND TO MD-0759, PAGE 1
CONTROL BOARD
DRAWN
G. SANWALD
CHECKED
S. BLAKE
DES.\MFG.\AUTH.
L. FOSKIN
Use and disclosure is subject to the restrictions on the title page of this CPI document.
J1-22
R133
J10-35
J1-16
GENERATOR CPU BOARD
J1-3
D25
4
2
RN1D
PREP COMMAND TO MD-0764 & MD-0765
D24
U2
J10-34
DATA BUS
D0..D7
D21
TP18
BUFFER AND
DRIVER
DATA
LATCH
1
“KV ENABLED”
DETECTOR CKT
(U11A, RN8, ETC)
RN2B
8
TO 2.1 V
CURRENT
SINK
U33F
13
TP10
J1-14
YEL
PREP
R173
RN2F
DS30
KV
EN
+12V
J8-4
+5V
RN11C
RN11B
+5V
AUXILIARY BOARD
DATE
26 APR 2000
26 APR 00
26 APR 2000
X-RAY EXPOSURE
RAD/FLUORO
MD-0761 REV L
SHEET 2 OF 4
+5V
P/S
READY
DS17
OPTO-COUPLER “ON”
= GENERATOR READY
J1-3
FROM
PAGE 2
J1-22
J5-6
TO 2.1 V
CURRENT
SINK
J5-7
U24
J5-8
1
5
2
4
5
1
U14
U6
J10-22
5
1
BUFFER
J10-3
R9
RED
R8
GRN
19
1
DS18
R10
RN7D
+5V
4
5
2
4
J4-7
J4-8
U10
U12
2
1
J4-6
4
2
J5-9
U3
TO
GENERATOR
INTERFACE
BOARD
(PG 1)
J4-9
BUFFER
DATA BUS
D0..D7
CONTROL BOARD
5
GENERATOR CPU BOARD
5
1
U21
1
4
4
2
5
1
4
2
U11
U13
2
DATA BUS
D0..D7
1
TP12
+3.3V
TB1-1
TP13
J8-4
+3.3V
J8-5
R56
R55
J8-3
J16-4
J16-5
J16-3
TO
GENERATOR
INTERFACE
BOARD
(PG 1)
FOOT
SWITCH
PREP
U21
HAND
SWITCH
X-RAY
TB1-2
TB1-3
TB1-4
FPGA
COM
4
DATA BUS
D0..D7
PREP
HAND
SWITCH
X-RAY
COM
1
U16
4
1
3
2
2
REMOVE JW1
TO DISABLE THE
CONSOLE PREP
BUTTON
J3-3
REMOVE JW2
TO DISABLE THE
CONSOLE X-RAY
BUTTON
J3-1
JW1
JW2
J7-3
CONSOLE CPU BOARD
J6-6
CONSOLE CPU BOARD
J6-8
J6-10
U17
3
J3-5
TB1-5
J7-2
PREP
P1-18
J2-18
J3-6
P1-19
J2-19
J3-8
P1-20
J2-20
J3-10
X-RAY
J7-1
KEYBOARD ASSEMBLY
CIRCUITS SHOWN WITHIN
DASHED LINES ARE USED
ON THE 23 X 56 CM
CONSOLE ONLY.
DISPLAY BOARD
P1-3
PREP
P1-2
Use and disclosure is subject to the restrictions on the title page of this CPI document.
P1-1
DRAWN
X-RAY
KEYBOARD ASSEMBLY
CIRCUITS SHOWN WITHIN
DASHED LINES ARE USED
ON RAD-ONLY CONSOLE.
G. SANWALD
CHECKED
S. BLAKE
DES.\MFG.\AUTH.
L. FOSKIN
DATE
26 APR 2000
26 APR 00
26 APR 2000
X-RAY EXPOSURE
RAD/FLUORO
MD-0761 REV L
SHEET 3 OF 4
J30-1
X-RAY
J30-3
PREP
J30-5
HAND
SWITCH
COM
PREP
SW1
J2-3
J21-3
J28-7
J2-4
J21-4
J28-8
J2-5
J21-5
J28-9
EXP
SW2
FRONT PANEL BOARD
TOUCH SCREEN BOARD
NOTE
REFERENCE
TO J4 ON
GENERATOR
INTERFACE
BOARD
(PG 1)
CIRCUITS SHOWN WITHIN
DASHED LINES ARE USED
ON THE TOUCH SCREEN
CONSOLE ONLY.
REMARKS
1
“LOW” (APPROXIMATELY 1 VDC) AT THESE POINTS INDICATES FOOT SWITCH INPUT CLOSED, PREP SWITCH PRESSED, OR X-RAY SWITCH PRESSED RESPECTIVELY. “HIGH” (APPROXIMATELY 24 VDC) =
OPEN CIRCUIT (I.E. NOT PRESSED) FOOT SWITCH, OR PREP SWITCH, OR X-RAY SWITCH. FOR RAD-ONLY CONSOLE, “LOW” INDICATES PREP SWITCH PRESSED, OR X-RAY SWITCH PRESSED, RESPECTIVELY.
2
3
“LOW” (APPROXIMATELY 1 VDC) = AN X-RAY EXPOSURE HAS BEEN REQUESTED VIA ONE OF SEVERAL EXPOSURE INPUTS. “HIGH” (APPROXIMATELY 24 VDC) = NO X-RAY EXPOSURE HAS BEEN REQUESTED.
EXPOSURE ENABLE LINE. “LOW” (APPROXIMATELY 0 VDC) INDICATES AN X-RAY EXPOSURE REQUEST, “HIGH” (APPROXIMATELY 5 VDC) = NO X-RAY EXPOSURE HAS BEEN REQUESTED.
4
THE CATHODE OF THE ASSOCIATED LED IS HELD “LOW” UNDER CPU CONTROL DURING AN X-RAY EXPOSURE REQUEST ONLY. NO MEANINGFUL MEASUREMENTS CAN BE MADE ON THIS LINE AS THIS IS A
DATA LINE. THE REQUIRED DATA IS LATCHED BY THE REGISTER CIRCUIT(S) AT THE APPROPRIATE TIME.
5
THE OUTPUT OF THE ASSOCIATED LED IS LATCHED BY A REGISTER. THIS IS THEN READ BY THE DATA BUS AT THE APPROPRIATE TIME. AS THIS IS A DATA LINE, NO MEANINGFUL MEASUREMENTS CAN BE
MADE AT THIS CONNECTION.
6
7
8
9
10
11
12
13
14
15
16
17
DS30 LIT = KV ENABLE REQUEST SENT. THIS IS NECESSARY TO MAKE AN X-RAY EXPOSURE. DS31 LIT = KV ENABLE NOT REQUESTED.
DS27 LIT = PREP REQUEST SENT. DS28 LIT = PREP NOT REQUESTED.
DS26 LIT = X-RAY EXPOSURE IN PROCESS.
“HIGH” (APPROXIMATELY 5 VDC) = KV ENABLED, “LOW” (APPROXIMATELY 0 VDC) = KV NOT ENABLED.
“HIGH” (APPROXIMATELY 5 VDC) = PREP REQUESTED. “LOW” (APPROXIMATELY 0 VDC) = PREP NOT REQUESTED.
“HIGH” (APPROXIMATELY 5 VDC) = X-RAY REQUESTED. “LOW” (APPROXIMATELY 0 VDC) = X-RAY NOT REQUESTED.
“LOW” = X-RAY EXPOSURE REQUESTED AS PER # 3. THIS LINE MUST BE “LOW” IN ORDER FOR THE X-RAY EXPOSURE LED’S ON THE CONTROL BOARD TO BE ENERGIZED (SEE # 16).
“LOW” = (APPROXIMATELY 0 VDC) = TUBE 1 / TUBE 2 MISMATCH OR THERMOSTAT OPEN FAULT. “HIGH” (APPROXIMATELY 12 VDC) = NO FAULT.
“HIGH” (APPROXIMATELY 12 VDC) = KV ENABLED, “LOW” (APPROXIMATELY 0 VDC) = KV NOT ENABLED.
“HIGH” (APPROXIMATELY 12 VDC) = PREP REQUESTED, “LOW” (APPROXIMATELY 0 VDC) = PREP NOT REQUESTED.
“HIGH” (APPROXIMATELY 12 VDC) = X-RAY REQUESTED, “LOW” (APPROXIMATELY 0 VDC) = X-RAY NOT REQUESTED.
“HIGH” (APPROXIMATELY 5 VDC) = OUTPUT DRIVE ENABLED, “LOW” (APPROXIMATELY 0 VDC) = OUTPUT DRIVE DISABLED.
18
ALL INPUTS TO THE “GENERATOR READY DETECTOR CIRCUIT” MUST BE AT THE CORRECT LOGIC LEVEL IN ORDER TO BE ABLE TO MAKE AN X-RAY EXPOSURE. THIS MEANS ALL FOUR FAULT INPUTS SHOWN
MUST BE CLEARED, AND THE KV ENABLE AND PREP COMMANDS MUST BE PRESENT.
19
DS17 LIT INDICATES GENERATOR READY TO MAKE AN EXPOSURE. THIS REQUIRES THAT ALL CONDITIONS PER # 18 BE SATISFIED. DS18 LIT INDICATES A “GENERATOR READY DETECTOR CIRCUIT” INPUT IS
NOT SATISFIED TO ENABLE AN X-RAY EXPOSURE.
DRAWN
G. SANWALD
CHECKED
S. BLAKE
DES.\MFG.\AUTH.
L. FOSKIN
Use and disclosure is subject to the restrictions on the title page of this CPI document.
DATE
26 APR 2000
26 APR 00
26 APR 2000
X-RAY EXPOSURE
RAD/FLUORO
MD-0761 REV L
SHEET 4 OF 4
TP9 TP8
J1-31
R89
7
+
U16A
+12V
D80
R208
HIGH KV
DETECTOR
AND LATCH
(U31, U32A, U33A)
HV ON DETECTOR
CIRCUIT (U30C
U30D, Q6, ETC)
JW3
125kV 150kV
“OR”
LOGIC
JUMPER POSITION:
125kV GENERATORS
JUMPER “125kV”
150 kV GENERATORS
JUMPER “150kV”
R25
1
-
1
J10-7
J1-7
3+
J1-26 R25, R44
D93
CATHODE OVERVOLTAGE
SIGNAL TO MD-0760, PG 2
R220
INVERTER 1
FAULT LATCH &
LOGIC INVERTER
(U39B, U35F)
INVERTER 1
FAULT DETECTOR
(T3, U36, D83, ETC)
INVERTER 2
FAULT LATCH &
LOGIC INVERTER
(U39C, U35E)
INVERTER 2
FAULT DETECTOR
(T4, U37, D84, ETC)
INVERTER 3
FAULT LATCH &
LOGIC INVERTER
(U39D, U35D)
INVERTER 3
FAULT DETECTOR
(T5, U38, D85, ETC)
J14-1
J14-3
J15-1
INVERTER FAULT SIGNALS
FROM PAGE 2
J15-3
J16-1
J16-3
4
1
R71
ERROR AMPLIFIERS
INCLUDES U13B, U21A
R70
U13A
-
R106
D49
-
D35
R107
65+
+
+
U13B
R43
U21A
R175
7
VCO
INCLUDES U19, U20,
U23, U25, U27, Q10
U21B
R108
+12V
ANODE OVERVOLTAGE
SIGNAL TO MD-0760, PG 2
TP17 TP19
D48
2-
J10-26
D92
+5V
R26, R45
U14A
J9-8
R50
U12B
R132
2
3+
6
5
INV 1
R46
U24A
2
1
U26A
3
2
DRIVE PULSES
CONTINUED ON PAGE 2
U26B
U24B
5
4
7
6
4
5
D66
D70
DATA BUS
D0..D7
Ir
R62
3
2
+
-
D27-D30
R66
U15
R64
7
R63
HIGH RESONANT
CURRENT LATCH
& LOGIC INVERTER
(U32D, U33D)
CURRENT SENSE
R65
D/A
CONVERTER
KV FEEDBACK SIGNAL
FROM PAGE 3
D87-D89, U35C
D86
U22
+
D82
INV 2
11
kV
D63
TP2
7
+12V
D81
INV 3
D69
U33E
TP26
+12V
R172
10
3
R69
R221
RESET COMMAND
FROM MD-0761, PG 2
J9-5
J9-7
R54
R23
HV ON SIGNAL
TO MD-0767, PG 1
A/D
CONVERTER
5
U16B
HIGH KV / INVERTER FAULT
TO GENERATOR READY
DETECTOR CIRCUIT ON
CONTROL BOARD,
SEE MD-0761, PG 2
+12V
U37
6
R171
RN2B
-
R48
2
3
R180
J10-12
J9-6
R49
U12A
R37
-
1
2
3
R52
R24
J1-12
+
3
U15A
RN4B
J10-31
R67
R72
RN2A
R91
R210
+
2
+
R209
R31
-
1
-
1
R215
RN4A
R68
R42
R26
5
U15B
R35
+
6
R36
-
R41
TP6 TP8
7
R53
2
2
T1
T2
DRIVE ENABLE
COMMAND FROM
MD-0761, PAGE 2
-12V
GENERATOR CPU BOARD
CONTROL BOARD
J13-4
J13-1
H.T. PRIMARY CURRENT SENSE
FROM PAGE 2
DRAWN
G. SANWALD
CHECKED
S. BLAKE
DES.\MFG.\AUTH.
L. FOSKIN
DATE
18 MAY 2000
18 MAY 2000
18 MAY 2000
KV CONTROL &
FEEDBACK
MD-0759 REV E
SHEET 1 OF 4
Use and disclosure is subject to the restrictions on the title page of this CPI document.
E1: 560 / 650 VDC (+)
J2-1
J2-3
J10-1
J1-1
J10-2
J1-2
J10-3
J1-3
J10-4
J1-4
* USED ON R&F
GENERATORS ONLY
TO J14-1
TO J14-3
K1 *
REFER TO MD-0786 FOR
K1 DRIVE CIRCUITS
INVERTER FAULT
SIGNAL, TO PAGE 1
MOSFET
SWITCHES
MOSFET
SWITCHES
E3
MOSFET
SWITCHES
MOSFET
SWITCHES
*
E4
INVERTER BOARD #1
E2: 560 / 650 VDC (-)
E1: 560 / 650 VDC (+)
J2-1
J2-3
GATE DRIVE CIRCUIT
FOR MOSFET INVERTER
(INCLUDES Q19 TO Q26)
J11-1
J1-1
J11-2
J1-2
TO J15-1
TO J15-3
INVERTER FAULT
SIGNAL, TO PAGE 1
MOSFET
SWITCHES
MOSFET
SWITCHES
H.T. PRIMARY CURRENT
CONTINUED ON PAGE 3
E3
J11-3
J1-3
J11-4
J1-4
MOSFET
SWITCHES
MOSFET
SWITCHES
E4
INVERTER BOARD #2
E2: 560 / 650 VDC (-)
E1: 560 / 650 VDC (+)
J2-1
J2-3
K2
J12-1
J1-1
J12-2
J1-2
J12-3
J1-3
J12-4
J1-4
TO J16-1
TO J16-3
INVERTER FAULT
SIGNAL, TO PAGE 1
MOSFET
SWITCHES
MOSFET
SWITCHES
E3
DRIVE PULSES
FROM PAGE 1
MOSFET
SWITCHES
MOSFET
SWITCHES
E4
+12V
K2
E2: 560 / 650 VDC (-)
REFER TO
MD-0786
CONTROL BOARD
RESONANT BOARD
J1-1
J1-4
INVERTER BOARD #3
INDICO 100 GENERATORS USE ONE, TWO, OR THREE INVERTER
MODULES DEPENDING ON GENERATOR OUTPUT POWER
H.T. PRIMARY CURRENT
SENSE, TO PAGE 1
TO J13-1
TO J13-4
DRAWN
G. SANWALD
CHECKED
S. BLAKE
DES.\MFG.\AUTH.
L. FOSKIN
DATE
18 MAY 2000
18 MAY 2000
18 MAY 2000
KV CONTROL &
FEEDBACK
MD-0759 REV E
SHEET 2 OF 4
Use and disclosure is subject to the restrictions on the title page of this CPI document.
HV ANODE
BOARD
J1
ANODE
S
C
L
TO J9-8
KV FEEDBACK
SIGNAL
TO PAGE 1
TO J9-7
TO J9-5
TO J9-6
J3-8
HV MULT
ASSY +
(ANODE)
J3-7
J3-5
J3-6
E9
HV MULT
ASSY(CATHODE)
E10
FROM
PAGE 2
C
L
S
TANK LID
BOARD
RESONANT BOARD
HV CATHODE
BOARD
J2
CATHODE
PART OF H.V. OIL TANK
** ONE TUBE H.T. OUTPUTS ARE SHOWN. TWO TUBE
TANKS WILL HAVE A SECOND PAIR OF H.T. OUTPUTS
DRAWN
G. SANWALD
CHECKED
S. BLAKE
DES.\MFG.\AUTH.
L.FOSKIN
DATE
18 MAY 2000
18 MAY 2000
18 MAY 2000
KV CONTROL &
FEEDBACK
MD-0759 REV E
SHEET 3 OF 4
Use and disclosure is subject to the restrictions on the title page of this CPI document.
NOTE
REFERENCE
REMARKS
1
2
3
kV REFERENCE OUTPUT, GENERATED BY THE CPU. SCALING IS 1 VOLT OUT = 15 kV OF GENERATOR OUTPUT.
kV FEEDBACK TO THE CPU. SCALING IS 1V = 20 KV OF GENERATOR OUTPUT.
HV ON SIGNAL. THIS IS “HIGH” (APPROXIMATELY 5 VDC) WHEN HIGH VOLTAGE IS ON, “LOW” (APPROXIMATELY 0 VDC) WHEN HIGH VOLTAGE IS OFF.
4
THE VOLTAGE AT TP17 AND TP19 SHOULD BE A 50% DUTY CYCLE SQUARE WAVE, RANGING IN FREQUENCY FROM APPROXIMATELY 80 kHz TO APPROXIMATELY 250 kHz, DEPENDING ON GENERATOR
OUTPUT POWER. SEE FIGURE 1.
12 VDC
0 VDC
FIGURE 1
DRAWN
G. SANWALD
CHECKED
S. BLAKE
DES.\MFG.\AUTH.
L.FOSKIN
DATE
18 MAY 2000
18 MAY 2000
18 MAY 2000
KV CONTROL &
FEEDBACK
MD-0759 REV E
SHEET 4 OF 4
Use and disclosure is subject to the restrictions on the title page of this CPI document.
+5V
J2-8
RN7C
JW1
5.5 A 6.5 A
1
3
2
J2-7
FIL
BUFFER &
CURRENT LIMIT
CIRCUIT
J2-9
DS14
DS13
JW1 SELECTS MAXIMUM
FILAMENT CURRENT
5.5 OR 6.5 AMPS
ERROR
AMPLIFIER &
DRIVER CIRCUIT
+12V
RED
TP2
TO 2.1 V
CURRENT
SINK
U24
OPTO-COUPLER
“ON” = NO FILAMENT
FAULT
BUFFER
5
RN7E
+5V
RN2H
GRN
J10-4
2
J10-23
DS12
RED
U24
5
1
4
2
J10-5
J1-5
J10-24
J1-24
R137
3
RN2G
TP3
J2-6
JW1
J3-2
J2-2
J3-8
J3-10
J2-10
J3-7
TP2
5
TP1
-
7
R24
J10-9
J1-9
J3-6
J10-28
J1-28
J3-5
RN11E
LARGE
U27
JW5 JUMPER POSITION:
INDICO GENERATORS
JUMPER PINS 1-2
DO NOT USE JUMPER
POSITION 2-3
SMALL
TO 2.1 V
CURRENT
SINK
2
BUFFER AND
DRIVER
DATA
LATCH
3
RN6E
+5V
U24
J2-6
U19, U16
2
J10-17
J1-17
J10-36
J1-36
OPTO-COUPLER
“ON” = LARGE FOCUS
SELECTED
“LG/SM REQUEST”
DETECTOR CKT
RN1A
(U11C, Q2, ETC)
5
1
JW1
J3-11
TO J3-6, J3-5, J3-9, J3-10
ON CONTROL BOARD
BUFFER
5
FIL CURRENT FEEDBACK
SIGNAL (SM) TO PAGE 2
RN2E
J1-8
1
2
J2-4
J2-3
J2-2
FIL CURRENT FEEDBACK
SIGNAL (LG) TO PAGE 2
4
J10-27
J1-27
BUFFER &
CURRENT LIMIT
CIRCUIT
J2-9
ERROR
AMPLIFIER &
DRIVER CIRCUIT
TP1
U10
DATA BUS
D0..D7
LARGE FILAMENT DRIVE
CONTINUED ON PAGE 2
JW1 SELECTS MAXIMUM
FILAMENT CURRENT
5.5 OR 6.5 AMPS
J2-10
+12V
J10-8
J5-1
3
4
2
RN1B
5.5 A 6.5 A
1
3
2
J2-5
4
U1
OPTO-COUPLER
“ON” = SMALL FOCUS
SELECTED
J8
INDICO 100 GENERATORS WITH STANDARD SINGLE FILAMENT BOARD (TYPICALLY USED IN RAD
ONLY GENERATORS) USE THE FILAMENT BOARD CONFIGURATION SHOWN BELOW
JW5
1
J5-2
INDICO 100 GENERATORS WITH OPTIONAL TWO FILAMENT BOARDS (TYPICALLY USED IN R&F
GENERATORS) USE THE FILAMENT BOARD CONFIGURATION SHOWN ABOVE
+5V
DS25
J2-1
T1
RMS
CONVERTER
CIRCUIT
FILAMENT SUPPLY BOARD (LARGE)
+
U14B
DS24
C22
BUFFER /
AMPLIFIER &
FILAMENT
CURRENT
COMPARATOR
J2-2
FILAMENT CURRENT
FEEDBACK SIGNAL
(LG) TO PAGE 2
R11
6
SMALL FILAMENT DRIVE
CONTINUED ON PAGE 2
ERROR
AMPLIFIER &
DRIVER CIRCUIT
J2-10
R17
D/A
CONVERTER
J5-3
3
J3-9
TP1
1
J4
JW1 SELECTS MAXIMUM
FILAMENT CURRENT
5.5 OR 6.5 AMPS
BUFFER &
CURRENT LIMIT
CIRCUIT
J2-9
TP21
U14D
5.5 A 6.5 A
1
3
2
J2-5
R7
14
J5-4
FILAMENT SUPPLY BOARD (SMALL)
HV / MA FAULT
FROM MD-0761,
PAGE 2
R5
R10
Q14
T1
RMS
CONVERTER
CIRCUIT
J3-10
Q15
R136
1
U22
J2-3
RN4C
OPTO-COUPLER
“ON” = NO HV / MA
FAULT
12 +
RN4D
U8
BUFFER
D/A
CONVERTER
J1-23
+12V
TO 2.1 V
CURRENT
SINK
C22
BUFFER /
AMPLIFIER &
FILAMENT
CURRENT
COMPARATOR
J2-4
FILAMENT CURRENT
FEEDBACK SIGNAL
(SM) TO PAGE 2
HV
GRN
13 -
J1-4
U7
DS11
U18
TP1
J2-10
FILAMENT FAULT
TO MD-0761, PAGE 2
1
4
3
RN4A
R75
J2-1
C22
T1
BUFFER /
AMPLIFIER &
FILAMENT
CURRENT
COMPARATOR
RMS
CONVERTER
CIRCUIT
TP2
J2-11
Q3
J5-3
J5-4
+12V
K1
K1
SMALL FILAMENT DRIVE
CONTINUED ON PAGE 2
J5-1
J5-2
LARGE FILAMENT DRIVE
CONTINUED ON PAGE 2
FILAMENT SUPPLY BOARD (UNIVERSAL)
GENERATOR CPU BOARD
REFER TO PAGE 4 FOR LOGIC LEVELS,
NOTES, ETC, REFERENCED BY
HEXAGONAL SYMBOL:
CONTROL BOARD
DUE TO SPACE RESTRICTIONS, THIS PAGE SHOWS
ONLY THE MAJOR FILAMENT BLOCKS. REFER TO
PAGE 3 FOR A MORE DETAILED FUNCTIONAL
DIAGRAM OF THE FILAMENT SUPPLY BOARD.
DRAWN
G. SANWALD
CHECKED
S. BLAKE
DES.\MFG.\AUTH.
L. FOSKIN
DATE
12 MAY 2000
12 MAY 2000
FILAMENT DRIVE
& MA CONTROL
15 MAY 2000
MD-0760 REV G
SHEET 1 OF 4
Use and disclosure is subject to the restrictions on the title page of this CPI document.
LARGE
J5-1
J4-1
J5-2
J4-2
FROM J2-4
FILAMENT CURRENT
FEEDBACK SIGNAL
(LG) FROM PAGE 1
FROM J2-2
FROM J2-3
J3-4
J2-3
J3-3
J2-11
SM FILAMENT FEEDBACK
CONTINUED ON PAGE 3
J2 **
CATHODE
C
S
L
5
FROM PAGE 1
FILAMENT CURRENT
FEEDBACK SIGNAL
(SM) FROM PAGE 1
FROM J2-1
J3-2
J1-13
J3-1
J1-32
LG FILAMENT FEEDBACK
CONTINUED ON PAGE 3
8
J4-4
6-
7
R4
J1-11
U30B
R3
J1-30
R15
J2-1
R14
J2-9
5+
-
9
6
TP6 TP7
+
U9
7
C
L
HIGH MA FAULT TO
GENERATOR READY
DETECTOR CIRCUIT
ON CONTROL BOARD,
SEE MD-0761, PAGE 2
+12V
TP2 TP3
J3-1
RN6C, RN6D
J3-2
6-
E18
10
FLUORO MA FEEDBACK
CONTINUED ON PAGE 3
U33E
ANODE I
D65
D95
R38
U6B
D72
HIGH ANODE
CURRENT LATCH
& LOGIC INVERTER
(U32C, U33C)
ANODE OVERCURRENT DETECTOR
(U18, RN9E-H, ETC.)
7
5+
RN6A, RN6B
J9-2
ANODE OVERVOLTAGE
SIGNAL FROM MD-0759, PG 1
R19
R8
J9-1
R212
R179
R9
R7
R34
RAD MA FEEDBACK
CONTINUED ON PAGE 3
11
S
HV ANODE
BOARD
3
R36
R33, R32
R164
R213
H.T.TANK
2
J1
ANODE
R165
R216
FILAMENT SUPPLY
BOARD
R5
R163
CATHODE
H.T. BOARD
R6
J5-4
TP4 TP5
R16
J4-3
R17
SMALL
J5-3
mA
TEST
JACK
RESET COMMAND
FROM MD-0761, PG 2
+
E17
R177
+12V
CATHODE OVERVOLTAGE
SIGNAL FROM MD-0759, PG 1
R39
RN6G, RN6H
J9-4
2-
R18
J3-4
J3-3
3+
RN6F, RN6E
CATHODE OVERCURRENT DETECTOR
(U17, RN9A-D, ETC.)
1
U6A
D96
HIGH CATHODE
CURRENT LATCH
& LOGIC INVERTER
(U32B, U33B)
CATHODE
D64
C
S
J2
CATHODE
R40
L
J9-3
D71
H.T.TANK
HV CATHODE
BOARD
TANK LID
BOARD
PART OF HV OIL TANK
** ONE TUBE H.T. OUTPUTS ARE SHOWN. TWO TUBE
TANKS WILL HAVE A SECOND PAIR OF H.T. OUTPUTS
Use and disclosure is subject to the restrictions on the title page of this CPI document.
DRAWN
CONTROL BOARD
G. SANWALD
CHECKED
S. BLAKE
DES.\MFG.\AUTH.
L. FOSKIN
DATE
12 MAY 2000
12 MAY 2000
FILAMENT DRIVE
& MA CONTROL
15 MAY 2000
MD-0760 REV G
SHEET 2 OF 4
MAXIMUM FILAMENT CURRENT
LIMIT CIRCUIT
6
JW1
TP25 TP24
R57
+
-
U1A
RN8D
2
6.5 A
1
5.5 A
+35V
-12V
RN9D
65
J3-3
R63
7
+
U30B
RN8C
RN9C
D6
R62
J3-11
ERROR AMPLIFIER, PWM REGULATOR,
AND FILAMENT CURRENT DRIVERS
3
R61
SM FILAMENT FEEDBACK
FROM ON PAGE 2
SET MAX
CURRENT
11
R72
Q6
J2-8
R63
J2-7
R64
6-
7
5+
6
R64
R65
J2-5
R66
+
U4B
R71
J2-6
Q12
TP3
U3
R77
U1B
TP23 TP22
R67
R95
PWM
REGULATOR
RN8B
J10-13
R59
1
+
U30A
RN8A
RN9A
R85
23
Q13
Q7
R60
J10-32
LG FILAMENT FEEDBACK
FROM ON PAGE 2
RN9B
J2-9
3
U37
11
+12V
R38
K1 IS FITTED ON “UNIVERSAL” (LARGE/SMALL)
FILAMENT BOARDS. J8 IS FITTED ON LARGE
FILAMENT BOARDS, AND J4 IS FITTED ON
SMALL FILAMENT BOARDS.
RN1D
RN2D
910 +
J10-11
R34
-
12 +
J5-3
J8
14
U15D
R23
RN1C
J5-4
J4
13
U15C
RN2C
K1
J2-11
R29
8
J5-1
K1
R84
A/D
CONVERTER
R39
J10-30
J5-2
TP4
TP2
TP10
TP7
RAD MA FEEDBACK
FROM ON PAGE 2
-35V
10
TP1
J2-10
C22
12
J2-4
R67
J2-3
R68
U4A
1.7 V
Ref
U2A
-
TP11 TP14
R45
R50
J2-2
R69
J2-1
R70
D12, 13
D27, 28
U7
Q1
+
T1
RMS
CONVERTER
-
+
RN4C
-
3+
J3-1
1
+
U2B
U23A
RN5D
R79
R21
FILAMENT CURRENT SENSE, RMS
CONVERTER, AND FILAMENT FEEDBACK
R87
2-
R88
FLUORO MA FEEDBACK
FROM ON PAGE 2
RN5C
RN4D
J3-9
GENERATOR CPU BOARD
DATA BUS
D0..D7
FILAMENT SUPPLY BOARD
DRAWN
G. SANWALD
CHECKED
S. BLAKE
DES.\MFG.\AUTH.
L. FOSKIN
DATE
12 MAY 2000
12 MAY 2000
FILAMENT DRIVE
& MA CONTROL
15 MAY 2000
MD-0760 REV G
SHEET 3 OF 4
Use and disclosure is subject to the restrictions on the title page of this CPI document.
NOTE
REFERENCE
1
2
3
4
5
6
REMARKS
FILAMENT REFERENCE OUTPUTS, GENERATED BY THE CPU. SCALING IS 1 VOLT OUT = 1 AMP OF FILAMENT CURRENT.
“HIGH” (APPROXIMATELY 5 VDC) = LARGE FOCUS SELECTED, “LOW” (APPROXIMATELY 0 VDC) = SMALL FOCUS SELECTED. THIS SIGNAL IS USED IN SINGLE FILAMENT SUPPLY GENERATORS ONLY.
“HIGH” (APPROXIMATELY 12 VDC) = FILAMENT FAULT (FILAMENT CURRENT < 2 A). “LOW” (APPROXIMATELY 0 VDC) = NO FILAMENT FAULT.
“HIGH” (APPROXIMATELY 12 VDC) = LARGE FOCUS SELECTED, “LOW” (APPROXIMATELY 0 VDC) SMALL FOCUS SELECTED.
PRIMARY FILAMENT CURRENT AT THESE POINTS MAY BE CONFIRMED USING A CURRENT PROBE ON ONE OF THE OUTPUT LEADS ON THE SMALL OR LARGE PAIR OF OUTPUTS.
THE VOLTAGE AT THESE TEST POINTS WILL BE APPROXIMATELY 1 VDC = 1 AMP OF FILAMENT CURRENT.
7
THESE TEST POINTS ALLOW MEASUREMENT OF A VOLTAGE PROPORTIONAL TO ANODE CURRENT. THE SCALING IS 0.4 VDC = 100 mA. SHORT EXPOSURE TIMES MUST BE CONSIDERED AND APPROPRIATE
MEASUREMENT TECHNIQUES MUST BE USED.
8
9
10
11
THESE TEST POINTS ARE SCALED 1 VDC = 100 mA OF X-RAY CURRENT.
THESE TEST POINTS ARE SCALED 1 VDC = 2.5 mA OF X-RAY CURRENT (R&F GENERATORS ONLY).
FILAMENT FEEDBACK CURRENT TEST POINT. THIS IS SCALED 1 VDC = 1 AMP OF FILAMENT CURRENT.
PWM OUTPUT. THE WAVEFORM WILL BE AS PER FIGURE 1 FOR LOW AND HIGH FILAMENT CURRENT DEMAND.
Approx 25 usec (40 kHz)
+12 V
LOW FILAMENT
DEMAND
0V
FIGURE 1
+12 V
HIGH FILAMENT
DEMAND
0V
DRAWN
G. SANWALD
CHECKED
S. BLAKE
DES.\MFG.\AUTH.
L. FOSKIN
DATE
12 MAY 2000
12 MAY 2000
FILAMENT DRIVE
& MA CONTROL
15 MAY 2000
MD-0760 REV G
SHEET 4 OF 4
Use and disclosure is subject to the restrictions on the title page of this CPI document.
REFER TO PAGE 2 FOR LOGIC LEVELS,
NOTES, ETC, REFERENCED BY
HEXAGONAL SYMBOL:
+12V
TUBE 1
SHIFT
J3-3
MAIN
R1
J3-9
J1-1
R121
J1-20
*
K2
+12V
CONTINUED
ON PAGE 2
RN4E
R138
J6-10
Q18
J5-10
2
D7
R29
J4-9
J4-9
J3-8
J2-8
1
COMM
K4
+12V
R30
Q3
See note
TUBE 2
K1
STATOR FAULT TO GENERATOR
READY DETECTOR CIRCUIT ON
CONTROL BOARD, SEE MD-0761
J3-7
SHIFT
J3-5
MAIN
J3-1
COMM
K3
TP1
3
J5-8
COMMON FROM J1-4. REFER
TO LOW SPEED STARTER
BOARD ON MD-0788, PAGE 1
JUMPER POSITION:
INDICO 100 GENERATORS
JUMPER “1.5S” FOR 1.5 SEC
BOOST, NO JUMPERS FOR
2.5 SEC BOOST. REFER TO
CH. 2 OF SERVICE MANUAL.
DO NOT USE JUMPER
POSITION “.15S”
JW1
TP3
1.5S
TP3
J4-11
J4-11
J3-7
52 / 73 / 94 VAC FROM J1-3.
REFER TO LOW SPEED STARTER
BOARD ON MD-0788, PAGE 1
TP4
7
6
J8-4
J1-4
R35
J4-12
J3-6
AUXILIARY BOARD
Q1
U1
ZERO
CROSS
CIRCUIT
J2-6
+12V
D1
8
K1
J4-6
J4-6
J3-10
+12V
J2-10
D15
D2
J2-9
POWER INPUT BOARD
CONTROL BOARD
F2
TP2
J4-12
Q15
D17
U2
ZERO
CROSS
CIRCUIT
+12V
R46
ENABLE COMMAND
FROM MD-0761,
PAGE 2
D18
R45
12 VDC / SOFT START
FAULT SIGNAL
FROM MD-0788,
PAGE 3
+12V
Q2
J2-7
5
TUBE 1 / TUBE 2 MISMATCH &
THERMOSTAT OPEN SIGNAL
FROM MD-0787
F1
+12V
R36
4
BOOST AND
RUN LOGIC
CIRCUIT
(U1, U10, U18
Q2, Q12, ETC.)
.15S
120 / 240 VAC FROM J1-1. REFER
TO LOW SPEED STARTER
BOARD ON MD-0788, PAGE 1
F3
R5
J6-8
R1
PREP COMMAND
FROM MD-0761,
PAGE 2
TUBE SELECT SIGNAL FROM J2-9. REFER TO LOW
SPEED STARTER BOARD ON MD-0788, PAGE 1
K4
LOW SPEED STARTER BOARD
*
NOTE: The phase shift circuit may
consist of one or more capacitor
DRAWN
G. SANWALD
CHECKED________
DES.\MFG.\AUTH.
HTW
DATE
10 MAR 2000
________
LOW SPEED
STARTER
10 MAR 2000
MD-0764 REV G
SHEET 1 OF 2
Use and disclosure is subject to the restrictions on the title page of this CPI document.
RN7A
+5V
DS20
GRN
U24
9
ROTOR
DS21
RED
TO 2.1 V
CURRENT
SINK
OPTO-COUPLER
“ON” = NO FAULT
J10-1
BUFFER
5
J1-1
1
FROM
PAGE 1
U5
4
2
J10-20
J1-20
DATA BUS
D0..D7
GENERATOR CPU BOARD
NOTE
REFERENCE
CONTROL BOARD
REMARKS
1
2
3
4
5
6
“HIGH” (APPROXIMATELY 6-11 VDC) = NO STATOR FAULT, “LOW” (<APPROXIMATELY 2 VDC) = STATOR FAULT (LOW OR NO STATOR CURRENT).
“LOW” (APPROXIMATELY 0 VDC) = NO STATOR FAULT, “HIGH” (APPROXIMATELY 12 VDC) = STATOR FAULT (LOW OR NO STATOR CURRENT).
“HIGH” (APPROXIMATELY 10 VDC) = PREP REQUESTED, “LOW” (APPROXIMATELY 1 VDC) = PREP NOT REQUESTED.
“LOW” (APPROXIMATELY 0 VDC) = BOOST REQUESTED, “HIGH” (APPROXIMATELY 12 VDC) = BOOST NOT REQUESTED (BOOST REQUESTED FOR APPROXIMATELY 1.5 SEC AFTER PREP INITIATED).
“LOW” (APPROXIMATELY 0 VDC) = RUN REQUESTED, “HIGH” (APPROXIMATELY 12 VDC) = RUN NOT REQUESTED (RUN REQUESTED AFTER BOOST COMPLETE, AND FOR DURATION THAT PREP IS PRESSED).
“HIGH” (APPROXIMATELY 12 VDC) = LOW SPEED STARTER ENABLED, “LOW” (APPROXIMATELY 0 VDC) = STARTER DISABLED (SEE # 7).
7
THIS POINT MUST BE “HIGH” (AS PER # 6) TO ENABLE THE LOW SPEED STARTER. THIS REQUIRES THE ENABLE COMMAND TO BE PRESENT (”HIGH”), AND THE TUBE 1 /TUBE 2 MISMATCH &THERMOSTAT
OPEN SIGNAL TO BE “HIGH”. IF THE 12 VDC / SOFT START FAULT SIGNAL IS LOW (INDICATING A FAULT), J1-4 WILL NOT BE PULLED LOW DUE TO THE DIODE SHOWN CONNECTED TO THIS PIN ON PAGE 1.
8
“LOW” (APPROXIMATELY 0 VDC) ENERGIZES K1 ON THE LOW SPEED STARTER BOARD, ENABLING THE STARTER. “HIGH” (APPROXIMATELY 12 VDC) DE-ENERGIZES K1 ON THE LOW SPEED STARTER BOARD.
AS PER # 6 AND 7, NO ENABLE COMMAND, OR PRESENCE OF A TUBE 1 / TUBE 2 MISMATCH & THERMOSTAT OPEN FAULT, OR A 12 VDC / SOFT START FAULT WILL INHIBIT LOW SPEED STARTER OPERATION.
9
DS20 LIT INDICATES NORMAL STATOR CURRENTS. DS 21 LIT INDICATES STATOR FAULT, OR LOW SPEED STARTER IS IN STANDBY MODE.
DRAWN
G. SANWALD
CHECKED________
DES.\MFG.\AUTH.
HTW
DATE
10 MAR 2000
________
LOW SPEED
STARTER
10 MAR 2000
MD-0764 REV G
SHEET 2 OF 2
Use and disclosure is subject to the restrictions on the title page of this CPI document.
CS1, U10, U11
SW2 *
SW1 *
RN7G
HS
LS
R24
DS7
U17, U18
U19, U22, U24
TO 2.1 V
CURRENT
SINK
DATA
LATCH
U19, U16
J10-2
J1-2
J10-21
J1-21
2
J4-6
J1-6
J4-8
J1-8
J4-2
J1-2
J4-4
J1-4
CONTACTOR
CLOSED
SIGNAL FROM
MD-0788, PAGE 3
DUAL SPEED
STARTER CPU,
BUFFERS,
DRIVERS
1
5
2
4
K2
K3
J4-14
J1-14
J4-16
J1-16
K6
1
5
2
4
U14
J10-1
5
E5
TUBE 2
SELECT
E8
TB2-1
COMM
TUBE 2
K2-B
**
SHIFT
CAPACITOR
ARRANGEMENT
733317-12, 13
735925-12, 13
E7
TB3-3
SHIFT
TB3-2
MAIN
TB3-1
COMM
E6
C2
K7
C4
C3
E14
R1
R121
J1-20
MAIN
R32
K3
C1
RN4E
R138
J4-10
J1-10
REMOVE WIRE
FOR 15.5 uF LS
(-15 ONLY)
7
E5
**
E5
E8
Q18
CONTROL BOARD
E14
SHIFT
CAPACITOR
ARRANGEMENT
733317-15, 16, 17
735925-15, 16, 17
C1
E6
K7
E6
K7
K3
E7
C2
STATOR FAULT TO
GENERATOR READY
DETECTOR CIRCUIT
ON CONTROL BOARD,
SEE MD-0761
E8
K3
C1
E7
GENERATOR CPU BOARD
K5
C22
C6
DATA BUS
D0..D7
+12V
K6
+12V
J10-20
TB2-2
K2-A
K1-B
J1-1
1
2
SHIFT
**
U5
4
TB2-3
K4
+12V
BUFFER
K1-A
D47
R42
TUBE 1/TUBE 2
SELECT SIGNAL
FROM MD-0788,
PAGE 3
OPTO-COUPLER
“ON” = NO FAULT
TUBE 1
K5
PREP
INITIATED
+12V
+5V
8
560 / 650 VDC (-)
K1
Q5
4
U24
IGBT
SWITCH
(Q3)
U13
3
TO 2.1 V
CURRENT
SINK
IGBT
SWITCH
(Q1)
K4
R41
R94
RN7A
4
+12V
Q7
RED
2
IGBT
SWITCH
(Q4)
HIGH SPEED
SELECT
R96
D47
GRN
5
IGBT
SWITCH
(Q2)
6
PREP COMMAND
FROM MD-0761
ROTOR
1
U12
+12V
DS21
DRIVER
CIRCUIT AND
FAULT
CURRENT
LATCH
(U1-U10,
T1-T4, ETC).
R40
BUFFER AND
DRIVER
DS20
5
R31
U27
560 / 650 VDC (+)
DS1
INVERTER
FAULT
DS8
1
INVERTER
FAULT
DETECTOR
+5V
+5V
C3
C4
E14
C3
C2
C5
SHIFT
CAPACITOR
ARRANGEMENT
733317-01, 02
735925-01, 02
DUAL SPEED STARTER BOARD
* REFER TO CHAPTER 2 OF SERVICE MANUAL FOR THE
PROCEDURE TO SET DIP SWITCHES SW1 AND SW2
** REFER TO SHEET 2 FOR SHIFT CAPACITOR VALUES
DRAWN
G. SANWALD
CHECKED
STEVE BLAKE
DES.\MFG.\AUTH.
L.FOSKIN
DATE
30 MAR 2000
30 MAR 2000
30 MAR 2000
DUAL SPEED
STARTER
MD-0765 REV E
SHEET 1 OF 2
Use and disclosure is subject to the restrictions on the title page of this CPI document.
DUAL SPEED STARTER ASSY
K3
LOW SPD (1)
CLOSED
733317-01 733317-02 733317-12 733317-13 733317-15 733317-16 733317-17
735925-01 735925-02 735925-12 735925-13 735925-15 735925-16 735925-17
K7
OPEN
LOW SPD (2)
CLOSED
CLOSED
HIGH SPD (1)
OPEN
OPEN
HIGH SPD (2)
OPEN
CLOSED
31 uF
60 uF
6 uF
20 uF
36 uF
30 uF
15.5 / 28 uF
31 uF
30 uF
37.5 uF
31 uF
N/A
37.5 uF
37.5 uF
6 uF
5 uF
3 uF
6 uF
5 uF
7.5 uF
6 uF
6 uF
12.5 uF
12.5 uF
DUAL SPD
DUAL SPD
DUAL SPD
DUAL SPD
DUAL SPD
DUAL SPD
DUAL SPD
STARTER ASSY STARTER ASSY STARTER ASSY STARTER ASSY STARTER ASSY STARTER ASSY STARTER ASSY
733317-01
733317-02
733317-12
733317-13
733317-15
733317-16
733317-17
735925-01
735925-02
735925-12
735925-13
735925-15
735925-16
735925-17
CAPACITOR
VALUE
VALUE
VALUE
VALUE
VALUE
VALUE
VALUE
C1
25 uF
40 uF
30 uF
25 uF
12.5 uF
25 uF
25 uF
C2
N/A
N/A
30 uF
25 uF
6 uF
12.5 uF
15 uF
C3
12.5 uF
40 uF
15 uF
12.5 uF
6 uF
12.5 uF
10 uF
C4
12.5 uF
40 uF
15 uF
12.5 uF
6 uF
12.5 uF
10 uF
C5
N/A
N/A
N/A
N/A
6 uF
12.5 uF
15 uF
C6
N/A
N/A
N/A
N/A
12.5 uF
N/A
N/A
NOTE
REFERENCE
REMARKS
3
DS8 LIT INDICATES HIGH SPEED SELECTED, DS7 LIT INDICATES LOW SPEED SELECTED.
“HIGH” (APPROXIMATELY 5 VDC) = HIGH SPEED SELECTED, “LOW” (APPROXIMATELY 0 VDC) = LOW SPEED SELECTED.
“LOW” (APPROXIMATELY 7 VDC) = CONTACTOR CLOSED AND PREP REQUESTED. THIS INITIATES THE BOOST CYCLE. “HIGH” (APPROXIMATELY 12 VDC) = BOOST NOT REQUESTED (PREP COMMAND NOT
RECEIVED, OR CONTACTOR IS NOT CLOSED).
4
“LOW” (APPROXIMATELY 0 VDC) = TUBE 2 SELECTED, “HIGH” (APPROXIMATELY 12 VDC) = TUBE 2 DESELECTED. THIS CONDITION DEFAULTS TO TUBE 1.
5
DS1 LIT INDICATES AN INVERTER CURRENT FAULT. POSSIBLE CAUSES INCLUDE INCORRECT DIP SWITCH SETTINGS FOR THE TUBE IN USE (SEE ** ON PAGE 1), INCORRECT STATOR IMPEDANCE, OR
DEFECTIVE STATOR CABLE.
6
7
8
K4 OPEN CIRCUITS THE STATOR COMMON LEAD AT ALL TIMES THAT THE DUAL SPEED STARTER IS IN STANDBY MODE.
“LOW” (APPROXIMATELY 0 VDC) = NO STATOR FAULT, “HIGH” (APPROXIMATELY 12 VDC) = STATOR FAULT (LOW OR NO STATOR CURRENT).
DS20 LIT INDICATES NORMAL STATOR CURRENTS. DS21 LIT INDICATES STATOR FAULT, OR DUAL SPEED STARTER IS IN STANDBY MODE.
1
2
DRAWN
G. SANWALD
CHECKED
STEVE BLAKE
DES.\MFG.\AUTH.
L.FOSKIN
DATE
30 MAR 2000
30 MAR 2000
30 MAR 2000
DUAL SPEED
STARTER
MD-0765 REV E
SHEET 2 OF 2
Use and disclosure is subject to the restrictions on the title page of this CPI document.
NOTE
REFERENCE
K1
REFER TO
MD-0759
PAGE 2
R44
+12V
FLUORO CONTACTOR DRIVE
CIRCUITS
APPLICABLE TO R&F
GENERATORS ONLY
+12V
D36
RAD
MODE
1
FROM J1-5 (AUXILIARY
BOARD), SEE MD-0788,
PAGE 3
J2-1
J2-1
J2-2
J2-2
Q5
2
J2-3
R47
1
D36 LIT INDICATES RAD OR PULSED FLUORO
MODE. D36 NOT LIT INDICATES CONTINUOUS
FLUORO MODE.
2
“LOW” (APPROXIMATELY 0 VDC) = K1 ON
RESONANT BOARD ENERGIZED IN RAD / PULSED
FLUORO MODE. “HIGH” (APPROXIMATELY 12 VDC)
= K1 ON RESONANT BOARD DE-ENERGIZED IN
CONTINUOUS FLUORO MODE.
3
“LOW” (APPROXIMATELY 0 VDC) = K1 ON POWER
MODE SELECT BOARD ENERGIZED IN FLUORO OR
LOW POWER RAD MODE (< 20 kW APPROX). “HIGH”
(APPROXIMATELY 12 VDC) = K1 ON POWER MODE
SELECT BOARD DE-ENERGIZED IN HIGH POWER
RAD MODE (> 20kW APPROX).
K1
R79
RAD-ONLY UNITS
ARE FITTED WITH
A JUMPER FROM
J2-2 TO J2-3
AUXILIARY BOARD
REMARKS
RESONANT BOARD
(R&F GENERATORS ONLY)
R239
+12V
FROM J8-5 (CONTROL
BOARD), SEE MD-0788,
PAGE 3
R237
ENERGIZING K2
DISABLES DRIVE
TO INVERTER
BOARD No. 3
R238
Q27
+12V
K2
D106
D104
D105
3
R240
Q17
R241
FROM J8-3 (CONTROL
BOARD) SEE MD-0788,
PAGE 3
K2
THE POWER-MODE SELECT
CIRCUIT IS USED ON 80 AND 100 KW
GENERATORS ONLY
REFER TO
MD-0759,
PAGE 2
CONTROL BOARD
DRAWN
G. SANWALD
CHECKED________
DES.\MFG.\AUTH.
HTW
DATE
21 MAR 2000
________
RAD / FLUORO AND
POWER MODE SELECT
21 MAR 2000
MD-0786 REV E
SHEET 1 OF 1
Use and disclosure is subject to the restrictions on the title page of this CPI document.
+5V
+5V
RN5
J18-2
THERMAL SWITCH INPUT
FOR INDICO 100 SP UNITS
(FUTURE USE)
RN5
R126
J18-1
U51
U25
R124
J18-3
BUFFER
BUFFER
J6-5
RN14D
D4
J12-4
J6-4
RN14E
D3
R125
J18-4
J12-5
+24V
R122
R123
+24V
1
5
1
5
2
4
U52
4
2
U53
DATA BUS
DO..D7
R127
GENERATOR INTERFACE BOARD
ON OFF
3
1
2
JUMPER POSITION:
R&F GENERATORS (WITH THERMAL SWITCH)
NO JUMPER FITTED
RAD GENERATORS (NO THERMAL SWITCH)
JUMPER JW4 PINS 2-3 (OFF)
4
+12V
D42
R41
JW4
R39
+12V
THERMAL
CUTOFF
OPEN
R40
J2-4
R43
Q10
J2-3
+12V
D26
1
5
2
4
1
5
2
4
TUBE 1 / TUBE 2
TELLBACK LOGIC
CIRCUIT
(U9, U10, R84)
R7
Q8
+5V
INVERTER BOARD
FOR TUBE 1 / TUBE 2
SOLENOID DRIVE
CIRCUITS SEE
MD-0788, PAGE 1
TUBE 1 / TUBE 2 SELECT
SIGNAL FROM MD-0788,
PAGE 3
U8
TUBE 1 / TUBE 2
RELAY CONTACTS
(SHOWN IN TUBE
1 POSITION)
J5-1
J11-1
J4-20
J4-20
J5-2
J11-2
J4-19
J4-19
TUBE 1 / TUBE 2 SELECT
COMMAND FROM MD-0788,
PAGE 1
R28
TUBE 2
SELECTED
1
DS5
DS6
TUBE
2
TUBE
1
U35
+12V
D39
R38
+5V
RN7H
U7
TUBE 1 / TUBE 2 MISMATCH &
THERMOSTAT OPEN SIGNAL TO
MD-0764 AND MD-0761, PAGE 2
5
R8
+12V
RN11H
R6
THERMAL SWITCH ON
INVERTER HEATSINK
(ALL R&F UNITS)
3
DECODER/
DEMULTIPLEXER
J1-2
J8-2
J2-5
J3-5
J1-1
J8-1
J2-13
J3-13
1
U3
2
2
5
4
OPTO COUPLER
“ON” = TUBE 2 SELECTED
H.T. TANK
POWER INPUT
BOARD
AUXILIARY BOARD
CONTROL BOARD
GENERATOR CPU BOARD
REFER TO MD-0763 (ROOM INTERFACE) FOR INTERLOCKS ACCESSED VIA THE ROOM INTERFACE BOARD
REFER TO PAGE 2 FOR TUBE THERMAL SWITCH CONNECTIONS AT THE STATOR TERMINAL BLOCK
DRAWN
G. SANWALD
CHECKED
S. BLAKE
DES.\MFG.\AUTH.
L. FOSKIN
DATE
18 MAY 2000
18 MAY 2000
INTERLOCKS &
TUBE 1 / TUBE 2
TELLBACK
18 MAY 2000
MD-0787 REV G
SHEET 1 OF 2
Use and disclosure is subject to the restrictions on the title page of this CPI document.
TUBE 1
STATOR
TERMINAL
BLOCK
J5-1
NOTE
REFERENCE
REMARKS
1
2
“LOW” (APPROXIMATELY 0 VDC) = TUBE 2 SELECTED, “HIGH” (APPROXIMATELY 10 VDC) = TUBE 1 SELECTED.
“LOW” (APPROXIMATELY 0 VDC) = TUBE 2 SELECTED, “HIGH” (APPROXIMATELY 12 VDC) = TUBE 1 SELECTED.
3
DS6 LIT INDICATES TUBE 1 SELECTED. DS5 LIT INDICATES TUBE 2 SELECTED. NEITHER LED LIT INDICATES A MISMATCH BETWEEN THE
TUBE THAT HAS BEEN REQUESTED, AND THE TUBE THAT HAS ACTUALLY BEEN SELECTED (SEE # 5).
4
5
“LOW” (APPROXIMATELY 0 VDC) = INVERTER THERMAL SWITCH CLOSED (OR JUMPERED VIA JW4), “HIGH” (APPROXIMATELY 12 VDC) =
INVERTER THERMAL SWITCH OPEN, OR JW4 JUMPER OMITTED ON RAD GENERATORS.
THERMAL
SWITCH
TUBE 1 THERMOSTAT TO T1
ON MD-0763, PAGE 1
J5-2
TUBE 2
STATOR
TERMINAL
BLOCK
J5-3
TUBE 2 THERMOSTAT TO T2
ON MD-0763, PAGE 1
THERMAL
SWITCH
J5-4
THE TUBE 1 / TUBE 2 TELLBACK LOGIC CIRCUIT ENSURES THAT THE TUBE ACTUALLY SELECTED MATCHES THE TUBE THAT WAS
REQUESTED. FOR EXAMPLE, IF TUBE 2 WAS REQUESTED BY THE CONSOLE BUT TUBE 1 WAS ACTUALLY SELECTED BY THE H.T. TANK,
THE LOGIC CIRCUIT WILL INDICATE A FAULT CONDITION.
GENERATOR INTERFACE BOARD
DRAWN
G. SANWALD
CHECKED
S. BLAKE
DES.\MFG.\AUTH.
L. FOSKIN
DATE
18 MAY 2000
18 MAY 2000
INTERLOCKS &
TUBE 1 / TUBE 2
TELLBACK
18 MAY 2000
MD-0787 REV G
SHEET 2 OF 2
Use and disclosure is subject to the restrictions on the title page of this CPI document.
REFER TO PAGE 10 FOR LOGIC LEVELS,
NOTES, ETC, REFERENCED BY
HEXAGONAL SYMBOL:
+24V
+12V
J10-13
GAIN CONTROL SIGNAL
FROM MD-0758
(NOT USED AT THIS TIME)
J10-19
J10-16
J10-11
-24V
U25, U23
RN14H
D0
RN14G
D1
RN14F
D2
RN14E
D3
RN14D
D4
RN14C
D5
RN14B
D6
RN14A
D7
-12V
U33
J6-1
J12-1
8
11
4
CH 4 SELECT
J10-2
J6-2
J12-2
7
12
4
CH 3 SELECT
J10-3
J6-3
J12-3
6
13
4
CH 2 SELECT
J10-4
J6-4
J12-4
5
14
4
CH 1 SELECT
J10-5
15
5
“R” FIELD SELECT
J10-7
BUFFER &
DATA LATCH
DRIVER
J6-5
J12-5
J6-6
J12-6
3
16
5
“M” FIELD SELECT
J10-8
J6-7
J12-7
2
17
5
“L” FIELD SELECT
J10-9
J6-8
J12-8
1
18
7
START
J10-6
4
CONTINUED
ON FOLLOWING
PAGES
R88
+5V
R87
+5V
TP10
9
10
8
CPU
R99
1
U28
R100
J7-19
J11-19
Q6
U45C
PTSTOP
J10-1
PTRAMP
J10-15
PTREF
J10-10
R85
TP12
R42
R44
TP9
6
R86
Q5
2
TP11
J11-4
2
U37
9
J7-4
10
J11-1
TP12
RN5B
3
+12V
TP4
U18
9
D/A
CONVERTER
-
10 +
8
4
5
2
1
J10-17
R89
U46
R30
3
R117
+
U23C
Q7
+12V
R116
-
8
A/D
CONVERTER
J7-1
-12V
U14C
GENERATOR INTERFACE BOARD
J14-6
J14-7
J14-14
J14-3
J14-1
J14-2
J14-4
J14-12
J14-13
J14-15
J14-8
J14-9
J14-10
J14-11
DATA BUS
DO..D7
GENERATOR CPU BOARD
THIS INTERFACE NO
LONGER USED
DRAWN
G. SANWALD
CHECKED
__________
DATE
02 JUN 2000
__________
AEC
DES.\MFG.\AUTH.
L. FOSKIN
Use and disclosure is subject to the restrictions on the title page of this CPI document.
02 JUN 2000
MD-0757 REV J
SHEET 1 OF 10
+500V
DS5
CHAMBER 2 SELECT
CHAMBER 1 SELECT
START
J10-3
J10-4
J10-5
J10-6
J5-2
DS3
TP24
DS4
CH 4
U3C
U3B
U3F
+12V +24V
RN3C
*
RN3A
CH 1
U3D
J5-6
CONVERTER
CIRCUIT
12 VDC TO 45 VDC
AND +/-300 / +500 VDC
CH 2
D4
D11
Q1
SET
VALUE
*
U3A
+12V +24V
11
RIGHT FIELD SELECT
MIDDLE FIELD SELECT
LEFT FIELD SELECT
J5-7
J10-8
J5-8
J10-9
D30
R89
J11-9
D65
Q3
*
J12-4
START
J12-3
MIDDLE
J12-2
J12-6
Q4
*
RIGHT
*
MIDDLE
R67
S1C
TP17
J5-19
TP20
2
TP23
J2-11
J12-9
TP6
-
TP5
TP7
+
+12V
J5-17
C11
TP4
J10-16
*
C4
J5-11
-12V
CH 1
TP21
J5-16
S3A
-24V
S2C
R3
CH 4
R53
TP3 3
CH 2
TP19
RN4C
J5-10
CH 3
S3C
J5-1
R13
D27
R56
7
-
RN4D
S3D
3
U2A
RN4B
STRT
SAMPLE
& HOLD
J3-12
J3-7
J4-2
J4-1
J4-3
+45V
J14-4
START
J14-3
MIDDLE
J14-2
J14-6
13
R35
J4-8
J4-10
L/R
J4-9
R/L
J4-11
J14-5
J14-9
CH 4
+
S1A
R FIELD SEL
L FIELD SEL
CHAMBER O/P
GROUND
AEC CH 2
+/-300 V
+/-300/+500 V
+45 V
RESET/START
M FIELD SEL
R FIELD SEL
L FIELD SEL
CHAMBER O/P
GROUND
AEC CH 3
+/-300 V
+/-300/+500 V
+45 V
RESET/START
M FIELD SEL
R FIELD SEL
L FIELD SEL
CHAMBER O/P
GROUND
J4-12
J4-7
AEC CH 4
+/-300 V
+/-300/+500 V
+45 V
RESET/START
M FIELD SEL
R FIELD SEL
L FIELD SEL
CHAMBER O/P
GROUND
R36
AEC BOARD
THIS SHEET APPLIES TO AEC BOARD ASSEMBLY 734614
DESIGNATES AN ANALOG SWITCH. THESE ARE I.C. “SWITCHES” THAT ARE
SWITCHED ON / OFF BY APPLYING THE APPROPRIATE LOGIC LEVEL.
REFER TO CHAPTER 3D FOR INSTALLATION AND CALIBRATION DETAILS.
Use and disclosure is subject to the restrictions on the title page of this CPI document.
J3-11
J14-1
H.V.
TP14
U6
THE -24V OUTPUTS ON J1 TO J4 AND THE +/- 12V OUTPUTS ON J1 TO J4
AND J11 TO J14 ARE NOT SHOWN ON THIS DIAGRAM. THESE ARE
DETAILED ON THE CONNECTOR PIN OUT TABLES IN CHAPTER 3D.
R/L
+/-300V
JW1
1
2
3
U1A
R14
GENERATOR INTERFACE BOARD
J3-8
J3-10
J3-9
J13-9
2
D22
J3-1
L/R
J13-5
R57
RIGHT
+
+12V
CH 4
M FIELD SEL
R58
JW2
1
2
3
-
J10-1
J13-6
LEFT
R12
+
PT STOP
J10-10
R54
J5-15
RESET/START
TP2 10
-
PT REF
J10-15
J13-2
13
S1B
9
S3B
PT RAMP
J13-3
MIDDLE
CH 3
U2B
R11
J13-4
START
TP13
S2D
R4
+45V
JW3
1
2
3
CH 3
J2-7
J3-3
RIGHT
S2B
R2
R32
+
J10-11
CH 2
S4
U4A
U4B
S2A
R1
STRT
J2-12
J3-2
J13-1
H.V.
JW4
1
2
3
CH 1
-
J10-17
J5-13
+
J10-13
8
+24V
J2-10
R/L
+/-300V
-
J10-19
+/-300/+500 V
+45 V
R68
LEFT
TP18
J2-8
J2-9
CH 2
FROM
PAGE 1
J2-1
L/R
J12-5
13
LEFT
J1-7
J2-3
+45V
TP12
J5-9
J1-12
J2-2
J12-1
H.V.
JW5
1
2
3
*
D40
Q2
J1-11
+/-300V
JW6
1
2
3
+12V +24V
*
*
R/L
J11-5
RIGHT
J10-7
J1-9
AEC CH 1
+/-300 V
R90
LEFT
START
+12V +24V
J11-6
J1-8
J1-10
L/R
CH 1
S1D
STRT
J11-2
13
+45V
INCLUDES U7 AND T1
J11-3
MIDDLE
TP11
D16
RN3B
U3E
J11-4
START
JW7
1
2
3
TP9
RN3D
CH 3
D12
J5-5
H.V.
RN4A
D5
J5-4
*
J1-1
J1-3
+45V
RIGHT
D6
J5-3
+/-300V
J11-1
H.V.
JW8
1
2
3
+12V
TP22
J1-2
+/-300V
LEFT
12
RN6E
RN6D
RN6A
DS2
TP10
+12V
R66
CHAMBER 3 SELECT
J10-2
DS1
+12V
R79
CHAMBER 4 SELECT
+12V
RN6C
+12V
RN6B
+12V
*
DESIGNATES A FACTORY CONFIGURED LOGIC OR SIGNAL LEVEL. AEC
BOARDS ARE CONFIGURED AT THE TIME OF ORDER TO BE COMPATIBLE
WITH THE SPECIFIED AEC CHAMBER(S). FOR EXAMPLE, THE START
SIGNAL TO THE CHAMBER MAY BE FACTORY CONFIGURED TO BE ACTIVE
LOW (0 V), ACTIVE HIGH +12 V, OR ACTIVE HIGH +24 V.
DRAWN
G. SANWALD
CHECKED
__________
DATE
02 JUN 2000
__________
AEC
DES.\MFG.\AUTH.
L. FOSKIN
02 JUN 2000
MD-0757 REV J
SHEET 2 OF 10
AEC CH 1
AEC CH 3
2
J1-5
2
3
J1-2
4
RN1
5
8
RN1
1
J1-1
J1-6
R10
U2A
J1-3
J1-4
MIDDLE
SELECT
R13
7
+
U4B
7
5
8
CATH (L)
ANODE (M)
GROUND
5
4
RN7
RN7
MIDDLE
SELECT
R7
JW2
R27
-
R22
3
1
+
U4C
RN9
6
7
5
8
RN9
2
J11-4
1
J11-2
J11-1
2
3
4
RN9
RN9
ANODE (L)
CATH (L)
ANODE (M)
CATH (M)
ANODE (L)
J3-5
4
RN2
5
8
RN2
CATH (L)
J3-1
1
ANODE (M)
CATH (M)
J3-3
ANODE (R)
RN8
6
7
5
8
RN8
J3 (shell)
GROUND
2
6
5
4
RN8
RN8
1
J13-5
JW6
ANODE (L)
1
U5C
CATH (L)
J13-3
R28
R23
CH 3
SELECT
3
CATH (R)
J13-6
3
CATH (R)
3
RN10
6
7
5
8
RN10
2
J13-4
1
J13-2
J13-1
2
3
ANODE (M)
CATH (M)
4
RN10
RN10
ANODE (R)
CATH (R)
J13-7
U9A
U5D
CH 3
OUT
(NEXT PG)
CH 1
OUT
(NEXT PG)
AEC CH 2
AEC CH 4
4
RN11
5
8
RN11
1
J2-1
+
J2-6
R33
J2-3
J2-4
MIDDLE
SELECT
R51
-
R47
1
+
U14B
3
3
RN13
5
8
RN13
CATH (R)
MIDDLE
SELECT
R45
3
RN15
6
7
RN15
2
J12-4
1
J12-2
J12-1
6
5
4
RN15
5
8
RN15
+
R53
CH 2
OUT
(NEXT PG)
THIS SHEET APPLIES TO AEC BOARD ASSEMBLY 737992. THIS
PAGE SHOWS THE INPUT CIRCUITS; THE SIGNAL PROCESSING
CIRCUITS ARE CONTINUED ON THE NEXT PAGE.
REFER TO CHAPTER 3D FOR INSTALLATION AND CALIBRATION DETAILS.
1
ANODE (M)
CATH (M)
7
RN12
J4-2
2
4
RN12
5
8
RN12
CATH (L)
J4-1
1
ANODE (M)
CATH (M)
J4-3
ANODE (R)
CATH (R)
CH 4
SELECT
U15D
5
8
RN14
J4 (shell)
GROUND
2
2
3
4
RN14
RN14
1
J14-5
JW8
J14-3
R58
7
U15C
7
J14-6
3
R56
ANODE (R)
6
CATH (R)
U17A
2
LEFT
SELECT
RN14
3
RN16
6
7
RN16
2
J14-4
1
J14-2
J14-1
6
5
4
RN16
5
8
RN16
ANODE (L)
CATH (L)
ANODE (M)
CATH (M)
ANODE (R)
CATH (R)
J14-7
U17B
CH 4
OUT
(NEXT PG)
DESIGNATES AN ANALOG SWITCH. THESE ARE I.C. “SWITCHES”
THAT ARE SWITCHED ON / OFF BY APPLYING THE APPROPRIATE
LOGIC LEVEL (0V = OFF, 5V = ON).
DRAWN
G. SANWALD
CHECKED
__________
DATE
02 JUN 2000
__________
AEC
DES.\MFG.\AUTH.
L. FOSKIN
Use and disclosure is subject to the restrictions on the title page of this CPI document.
ANODE (L)
J4-5
3
1
RIGHT
SELECT
J12-7
U16B
U14D
ANODE (L)
6
J4-6
R52
U15B
CATH (L)
RN12
J4-4
R49
J12-3
R57
5
ANODE (R)
1
J12-5
3
6
U9B
GROUND
2
JW4
7
U14C
4
7
U15A
CATH (M)
J2 (shell)
J12-6
3
R55
7
ANODE (M)
U16A
2
LEFT
SELECT
6
RN13
R41
CATH (L)
2
1
RIGHT
SELECT
RN13
R44
R46
5
U8B
ANODE (L)
R34
J2-5
JW7
R54
2
6
RIGHT
SELECT
-
7
J2-2
+
7
U14A
6
RN11
-
R40
3
RN11
3
+
R43
-
RIGHT
SELECT
2
JW3
3
-
2
1
LEFT
SELECT
+
1
LEFT
SELECT
CH 2
SELECT
J3-2
2
U3B
2
LEFT
SELECT
ANODE (R)
R16
U4D
RN2
J3-6
1
RIGHT
SELECT
J11-7
U8A
7
U5B
J11-3
3
3
R14
R11
J11-5
7
J3-4
1
J11-6
6
2
ANODE (R)
CATH (R)
RN2
U3A
CATH (M)
J1 (shell)
2
3
1
U5A
U2B
2
LEFT
SELECT
6
RN7
R6
R70
6
1
RIGHT
SELECT
CH 1
SELECT
-
R9
3
RN7
ANODE (L)
JW5
3
RIGHT
SELECT
R50
RN1
R8
7
R17
+
U4A
6
-
1
RN1
+
-
R69
3
-
R5
+
3
RIGHT
SELECT
2
JW1
-
2
1
LEFT
SELECT
+
1
LEFT
SELECT
02 JUN 2000
MD-0757 REV J
SHEET 3 OF 10
8
7
6
5
1
2
CHAMBER 4 SELECT
CHAMBER 3 SELECT
CHAMBER 2 SELECT
CHAMBER 1 SELECT
START
RIGHT FIELD SELECT
MIDDLE FIELD SELECT
FEFT FIELD SELECT
J10-2
J5-2
R67
J10-3
J5-3
R66
J10-4
J5-4
R65
J5-5
R64
J10-5
3
DS3
DS4
RN3
+5V
RN3
+5V
RN3
+5V
RN3
+5V
U6
4
DS1
DS2
2
18
3
17
4
16
5
CH 3 SELECT
CH 2 SELECT
15
CH 1 SELECT
INVERTING
BUFFER
J10-6
J5-6
D28
6
14
J10-7
J5-7
R63
7
13
J10-8
J5-8
R62
8
12
J10-9
J5-9
R61
9
11
CH 1 OUT
(FROM PREVIOUS
PAGE)
CH 4 SELECT
RIGHT SELECT
CH 2 OUT
(FROM PREVIOUS
PAGE)
MIDDLE SELECT
LEFT SELECT
+5V
R36
TP1 15
FROM
PAGE 1
+12V
R15
R18
+5V
U1
R21
R39
Q2
+5 V
REGULATOR
TP2 14
R35
1
TP6
J5-17
J10-11
J5-11
TP7
R25
CH 1
SELECT
J5-10
J10-1
J5-1
1
2
3
R31
R2
R60
CH 3
SELECT
CH 4 OUT
(FROM PREVIOUS
PAGE)
CH 4
SELECT
R19
R20
R12
R32
R3
R4
D37
SAMPLE
& HOLD
R24
TP5
D38
7
-
6
7
U11A
+12V
+5V
65+
U12B
R26
-
J10-10
R1
C31
J5-15
5
U11B
CH 2
SELECT
+
PT STOP
3
R29
6
R37
TP4
2 TP3
+
R59
PT REF
CH 3 OUT
(FROM PREVIOUS
PAGE)
-12V
7
J10-15
3
R38
R42
PT RAMP
2
U12A
-
J10-17
-
J5-13
+
J10-13
3
R30
2
+
U10
GENERATOR INTERFACE BOARD
THIS SHEET APPLIES TO AEC BOARD ASSEMBLY 737992. THIS
PAGE SHOWS THE SIGNAL PROCESSING CIRCUITS; THE INPUT
CIRCUITS ARE SHOWN ON THE PREVIOUS PAGE.
REFER TO CHAPTER 3D FOR INSTALLATION AND CALIBRATION DETAILS.
AEC BOARD
DESIGNATES AN ANALOG SWITCH. THESE ARE I.C. “SWITCHES”
THAT ARE SWITCHED ON / OFF BY APPLYING THE APPROPRIATE
LOGIC LEVEL (0V = OFF, 5V = ON).
DRAWN
G. SANWALD
CHECKED
__________
__________
AEC
DES.\MFG.\AUTH.
L. FOSKIN
Use and disclosure is subject to the restrictions on the title page of this CPI document.
DATE
02 JUN 2000
02 JUN 2000
MD-0757 REV J
SHEET 4 OF 10
+5V
R52
R50
CHAMBER 3 SELECT
CHAMBER 2 SELECT
CHAMBER 1 SELECT
START
RIGHT FIELD SELECT
MIDDLE FIELD SELECT
LEFT FIELD SELECT
J10-2
J10-3
J5-2
J5-3
R61
2
R62
J10-4
J5-4
R63
J10-5
J5-5
R64
+12V
18
3
CH 4 SELECT
R40
17
J5-6
J10-7
J5-7
J10-8
J10-9
Q5
CH 3 SELECT
4
16
5
15
6
14
R66
7
13
J5-8
R67
8
12
J5-9
R68
9
11
D20
R38
CH 2 SELECT
CH 1 SELECT
13
R1
U1D
R2
+12V
D11
R37
D10
LEFT
SELECT
D9
MIDDLE
SELECT
Q3
Q2
RIGHT
SELECT
NO CONNECTION
J2-6
+12V
MIDDLE
SELECT
START
TP2
R3
J5-11
-12V
8
CH 1 SELECT
R11
J2-7
R4
NO CONNECTION
+
R13
CH 4 SELECT
J3-6
JW3
1
2
3
+12V
MIDDLE
SELECT
START
TP3
13
R5
CH 3
SELECT
J10-1
R14
U4B
TP6
+12V
R31
R32
R34
+
R69
+
6
U8A
D25
TP10
U7A
START/
R33
D27
-
7
3
SAMPLE
& HOLD
2
NO CONNECTION
J4-6
RIGHT
SELECT
JW1
1
2
3
+12V
MIDDLE
SELECT
START
TP4
+
REFER TO CHAPTER 3D FOR INSTALLATION AND CALIBRATION DETAILS.
J4-3
J4-4
J4-8
13
R7
CH 4
SELECT
J4-5
J4-7
J4-9
U1A
THIS SHEET APPLIES TO AEC BOARD ASSEMBLY 737998
MIDDLE
RESET/START
+12V
CHAMBER O/P
-12V
GROUND
LEFT/RIGHT
RIGHT/LEFT
MIDDLE
RESET/START
+12V
CHAMBER O/P
-12V
GROUND
N/C
J4-2
U9
GENERATOR INTERFACE BOARD
RIGHT/LEFT
AEC CH 4
JW2
1
2
3
9
LEFT/RIGHT
-12V
LEFT
SELECT
TP5 10
J5-1
+5V
R6
U8B
R30
J3-5
J3-7
U1B
-
J5-10
3
J3-4
J3-9
+
+
PT STOP
J10-10
2 TP8
J3-3
J3-8
-
TP9
-12V
GROUND
N/C
J3-2
CH 3 SELECT
*
CHAMBER O/P
AEC CH 3
RIGHT
SELECT
R12
+12V
-12V
JW4
1
2
3
CH 2 SELECT
START/
U4A
PT REF
J2-5
LEFT
SELECT
TP7
J5-15
J2-4
J2-8
13
U1C
J5-17
J10-15
J2-3
J2-9
TP11 TP12
RESET/START
N/C
J2-2
CH 2
SELECT
Q1
J5-13
RIGHT/LEFT
MIDDLE
AEC CH 2
JW5
1
2
3
+12V
LEFT/RIGHT
-12V
RIGHT
SELECT
+5 V
REGULATOR
PT RAMP
J1-5
J1-7
JW6
1
2
3
+5V
FROM
PAGE 1
J1-4
J1-8
LEFT
SELECT
U3
J10-11
START
TP1
J1-3
J1-9
R36
+12V
J10-17
+12V
MIDDLE
SELECT
CH 1
SELECT
Q4
+12V
J10-13
J1-6
START
INVERTING
BUFFER
J10-6
D12
N/C
J1-2
JW7
1
2
3
START/
R35
CHAMBER 4 SELECT
DS4
DS3
NO CONNECTION
RIGHT
SELECT
R39
DS2
JW8
1
2
3
+5V
U6
DS1
AEC CH 1
LEFT
SELECT
+5V
R51
+5V
R49
+5V
R8
LEFT/RIGHT
RIGHT/LEFT
MIDDLE
RESET/START
+12V
CHAMBER O/P
-12V
GROUND
-12V
AEC BOARD
DESIGNATES AN ANALOG SWITCH. THESE ARE I.C. “SWITCHES” THAT ARE
SWITCHED ON / OFF BY APPLYING THE APPROPRIATE LOGIC LEVEL.
DRAWN
G. SANWALD
CHECKED
__________
DATE
02 JUN 2000
__________
AEC
DES.\MFG.\AUTH.
L. FOSKIN
Use and disclosure is subject to the restrictions on the title page of this CPI document.
02 JUN 2000
MD-0757 REV J
SHEET 5 OF 10
+12V
+12V
+12V
-12V
D45
R21
R20
+12V
R18
+12V
R16
R23
+12V
D46
J1-19
J1-15
J1-15
J1-17
J1-17
J1-1
J5-1
J1-4
J5-4
J1-2
J5-2
-24V
D47
+300V
R22
R47
-12V
+12V
-12V
-24V
TP3
R28
-24V
65+
7
FEEDBACK
U1B
CH 2
D38
J5-4
MIDDLE 1
LEFT 1
INCLUDES U3, Q1-Q4,
D1-D6, D12-D21,
AND T1
U2A
U2D
TO
SHT 8
5.1V REFERENCE
D41
D40
+12V
-12V
START
J10-6
R14
-24V
D36
J5-6
RIGHT 1_
TO START
SHT 8
FROM
SHT 7
+12V +24V
R90*
R29*
LEFT 1_
SIGNAL 1_ TO SHT 8
START 2~
NEXT PG.
RIGHT 2_
R42
FROM
PAGE 1
R43
FROM
SHT 7
D69*
PT REF
PT STOP
J10-15
J10-10
J10-1
SIGNAL 2_ TO SHT 8
D34
J5-15
J5-10
FROM
SHT 8
J5-1
START 3~
NEXT PG.
JW29
D33
RIGHT 3_
FROM
SHT 7
JW30
SIGNAL 3_ TO SHT 8
JW31
J5-19
D24
+24V
JW32
START 4~
NEXT PG.
TP1
J10-13
J5-13
J10-17
J5-17
+12V
J10-16
J5-16
SIGNAL 4_ TO SHT 8
J6-1
J2-3
J6-3
J2-5
J6-5
J2-7
J6-7
J2-9
J6-9
J2-11
J6-11
J2-13
J6-13
J2-15
J6-15
J2-17
J6-17
J2-19
J6-19
J2-2
J6-2
J2-4
J6-4
J2-6
J6-6
J2-8
J6-8
J2-10
J6-10
J2-12
J6-12
J2-14
J6-14
J2-16
J6-16
J2-18
J6-18
J2-20
J6-20
START 1
START 2
RIGHT 1
RIGHT 2
MIDDLE 1
MIDDLE 2
LEFT 1
LEFT 2
SIGNAL 1
SIGNAL 2
RIGHT 2
-24V
LEFT 2
SIGNAL 2
+45V
TO AEC INPUT
CONNECTORS J1 -J4
START 3
+12V
-12V
RIGHT 3
-24V
MIDDLE 3
LEFT 3
START 3
SIGNAL 3
RIGHT 3
START 4
MIDDLE 3
RIGHT 4
LEFT 3
SIGNAL 3
MIDDLE 4
-12V
-24V
START 4
RIGHT 4
MIDDLE 4
LEFT 4
SIGNAL 4
REFER TO CHAPTER 3D FOR INSTALLATION AND CALIBRATION DETAILS.
Use and disclosure is subject to the restrictions on the title page of this CPI document.
THIS MANUAL FOR DETAILS
J2-4
J2-5
J2-6
J2-7
J2-8
J2-9
J2-10
J2-11
J2-12
J3-3
J3-4
J3-5
J3-6
J3-7
J3-8
J3-9
J3-10
J3-11
J3-12
J4-2
+12V
JW36
* NOT FITTED ON ALL MODELS. REFER TO SUP734654 IN THE FRONT OF
J2-3
J4-1
+500V
JW35
DESIGNATES AN ANALOG SWITCH. THESE ARE I.C. “SWITCHES” THAT ARE
SWITCHED ON / OFF BY APPLYING THE APPROPRIATE LOGIC LEVEL.
J1-11
J1-12
-24 V
GND
RESET/START
RIGHT
MIDDLE
LEFT
CHAMBER O/P
+500 V
+300 V
+45 V
+12 V
-12 V
-24 V
GND
RESET/START
RIGHT
MIDDLE
LEFT
CHAMBER O/P
+500 V
+300 V
+45 V
+12 V
-12 V
-24 V
GND
RESET/START
RIGHT
MIDDLE
LEFT
CHAMBER O/P
AEC CH 4
SIGNAL 4
TP5
THIS SHEET APPLIES TO AEC BOARD ASSEMBLY 734654, WHICH
CONSISTS OF AEC INTERFACE BOARD 728399 AND AEC BOARD
734630. THE AEC BOARD CIRCUITS ARE CONTINUED ON PAGES
7 AND 8.
J1-10
-12 V
LEFT 4
+45V
AEC BOARD
J1-9
J3-2
+300V
-1000V
GENERATOR INTERFACE BOARD
J1-8
J3-1
+500V
D30
D32
J1-7
+12 V
AEC CH 3
MIDDLE 2
+300V
-12V
J1-6
+300 V
+45 V
START 2
JW34
TP5
J5-11
MIDDLE 4_
LEFT 4_
JW33
D28
J10-11
RIGHT 4_
FROM
SHT 7
D26
TP2
MIDDLE 3_
LEFT 3_
D22
J10-19
MIDDLE 2_
LEFT 2_
Q4
PT RAMP
MIDDLE 1_
J2-1
J1-5
J2-1
+45V
-1000V
START 1~
NEXT PG.
J1-4
J2-2
+300V
+12V
J1-3
+500 V
AEC CH 2
+500V
U1A
CH 1
D39
J5-5
U1B
R10
J10-5
D42
R19
CHAMBER 1 SELECT
J10-4
CH 3
D37
J5-3
RIGHT 1
SIGNAL 1
U1C
R24
CHAMBER 2 SELECT
J10-3
D43
START 1
CONVERTER CIRCUIT
12 VDC TO 45 VDC,
300 VDC, 500 VDC,
AND -1000 VDC
CH 4
D44
J5-2
+45V
16
U2C
CHAMBER 3 SELECT
J10-2
J1-1
J1-2
+300V
+12V
U1D
CHAMBER 4 SELECT
AEC CH 1
+500V
R27
J1-19
+500V
+12V
R31
J5-3
R32
U1F
R15
U1E
+45V TP4
+12V
J1-3
J7-1
J7-2
J7-3
J7-4
J4-3
J4-4
J4-5
J4-6
J4-7
J4-8
J4-9
J4-10
J4-11
J4-12
+500 V
+300 V
+45 V
+12 V
-12 V
-24 V
GND
RESET/START
RIGHT
MIDDLE
LEFT
CHAMBER O/P
AEC INTERFACE BOARD
DRAWN
G. SANWALD
CHECKED
__________
DATE
02 JUN 2000
__________
AEC
DES.\MFG.\AUTH.
L. FOSKIN
02 JUN 2000
MD-0757 REV J
SHEET 6 OF 10
+12V +24V
R28
R26
R27
R8
R5
Q2
Q1
D31
JW5
D19
D1
D8
D3
D23
JW23
MIDDLE 2_
D12
JW16
J2
SHT
6
JW9
D10
JW15
LEFT 2_
JW8
JW17
LEFT 3_
D5
JW25
MIDDLE 3_
D14
JW11
D15
JW19
LEFT 4_
D7
R12
JW27
MIDDLE 4_
D16
JW20
R6
D35
D18
R110
JW73
U19C
R103
R99
R107
JW70
U16C
R102
R101
JW65
U17D
R65
23+
S/S OUT 1
SHT 8
START 2~
SHT 6
JW52
GENERATOR INTERFACE BOARD
THIS SHEET APPLIES TO AEC BOARD ASSEMBLY 734654, WHICH
CONSISTS OF AEC INTERFACE BOARD 728399 AND AEC BOARD
734630. THE AEC BOARD CIRCUITS ARE CONTINUED ON PAGES
6 AND 8.
REFER TO CHAPTER 3D FOR INSTALLATION AND CALIBRATION DETAILS.
R48
R74, R46
R38
U6A
1
65+
JW74
R105
JW69
R100
JW64
U17C
R62
7
U6B
S/S OUT 2
SHT 8
START 3~
SHT 6
JW57
R44
R88, R67
R47
R112
U16B
JW66
R66
JW71
U19D
JW63
U16A
Use and disclosure is subject to the restrictions on the title page of this CPI document.
JW67
U17A
U16D
R109
U19A
JW68
U17B
JW47
JW72
U19B
R104
RIGHT 4_
JW28
R10
D13
R111
RIGHT 3_
JW26
D6
JW12
J2
SHT
6
D11
JW18
D27
RIGHT 2_
JW24
J2
SHT
6
D4
JW10
RIGHT 1_
JW22
D2
JW7
D29
JW21
MIDDLE 1_
JW14
D20
D25
D17
JW13
LEFT 1_
JW6
D21
Q3
D9
R69
R73, R80
23+
R57
1
U14A
S/S OUT 3
SHT 8
START 4~
SHT 6
JW62
R64
R87, R54
65+
7
S/S OUT 4
SHT 8
U14B
R59
R9
START 1~
SHT 6
+12V +24V
R29*
+12V +24V
R90*
J5-9
R68
J10-9
R90*
LEFT FIELD SELECT
J5-8
R29*
MIDDLE FIELD SELECT
J5-7
J10-8
R90*
FROM
PAGE 1
J10-7
R29*
RIGHT FIELD SELECT
AEC BOARD
DESIGNATES AN ANALOG SWITCH. THESE ARE I.C. “SWITCHES” THAT ARE
SWITCHED ON / OFF BY APPLYING THE APPROPRIATE LOGIC LEVEL.
* NOT FITTED ON ALL MODELS. REFER TO SUP734654 IN THE FRONT OF
THIS MANUAL FOR DETAILS
DRAWN
G. SANWALD
CHECKED
__________
DATE
02 JUN 2000
__________
AEC
DES.\MFG.\AUTH.
L. FOSKIN
02 JUN 2000
MD-0757 REV J
SHEET 7 OF 10
START
FROM SHT 6
R36
+
U3B
R121
5
R41
2
3
U4A
U7A
JW44
R50G
U7B
JW43
R50F
R86
JW45
JW46
R50H
R50C
R37
1
2
SIGNAL 1_
FROM SHT 6
S/S OUT 1
FROM SHT 7
C9
3
R40
U5A
R91
C39
1
START
FROM SHT 6
U5B
D51
R34
R120
R50D
-
CH 1
FROM SHT 6
5
7
+
R45
JW3
+
R1
6
-
7
C4
R50B
+
JW2
6
R52
R50E
R50A
U4C
C48
START
FROM SHT 6
R2
1
+
U3A
U13A
R70D
R70G
R30
SIGNAL 3_
FROM SHT 6
S/S OUT 3
FROM SHT 7
R106
R93
+
R94
7
1
U15A
2
2
3
U12B
JW58
R82B
6
5
JW59
R82C
U15B
R83
JW60
JW61
R82D
U13B
START
FROM SHT 6
R63
R82H
R82G
R79
5
R82F
-
R61
6
+
R22
7
+
U3D
JW55
JW56
R81
R82A
R82E
+
R95
U12A
R84
+12V
-
+
C32
1
JW54
R70C
3
JW53
R70B
5
U8B
R55
D65
R35
S/S OUT 2
FROM SHT 7
3
C15
JW42
SIGNAL 2_
FROM SHT 6
C19
R4
R96
6
U12D
JW41
CH 4
FROM SHT 6
2
U8A
2
U2
1
-
7
START
FROM SHT 6
U9B
START
FROM SHT 6
R77
R70H
2
U9A
R19
7
R56
R92
R25
U3C
R97
R24
3
-
D49
+
C33
1
R70F
-
PT STOP
5
D59
R33
R98
D50
R72
6
+
R17
PT REF
-
7
+
TO
SHT 6
JW50
JW51
R71
R70A
R70E
C14
JW38
PT RAMP
U4B
U12C
R3
CH 3
FROM SHT 6
R51C
R85
R60
JW37
R53
JW49
3
TP4
TP3
R51B
5
3
JW48
C20
R76
3
2
U11A
U10A
2
1
2
START
FROM SHT 6
+12V
6
U11B
+
R108
START
FROM SHT 6
-
R32
R113
C36
D56
-
+
CH 2
FROM SHT 6
R51G
R49
JW40
R51H
U10B
R31
U18A
5
7
R51D
7
C12
R51F
-
JW39
3
6
R39
2
+
+
U18B
1
-
5
R116
R75
R51A
R51E
U4D
+
7
6
R58
-
R114
+
R118
SIGNAL 4_
FROM SHT 6
S/S OUT 4
FROM SHT 7
C21
3
R78
AEC BOARD
THIS SHEET APPLIES TO AEC BOARD ASSEMBLY 734654, WHICH
CONSISTS OF AEC INTERFACE BOARD 728399 AND AEC BOARD
734630. THE AEC BOARD CIRCUITS ARE CONTINUED ON PAGES
8 AND 9.
DESIGNATES AN ANALOG SWITCH. THESE ARE I.C. “SWITCHES”
THAT ARE SWITCHED ON / OFF BY APPLYING THE APPROPRIATE
LOGIC LEVEL (0V = OFF, 12V = ON).
DRAWN
G. SANWALD
CHECKED
__________
DATE
02 JUN 2000
__________
AEC
DES.\MFG.\AUTH.
REFER TO CHAPTER 3D FOR INSTALLATION AND CALIBRATION DETAILS.
Use and disclosure is subject to the restrictions on the title page of this CPI document.
L. FOSKIN
02 JUN 2000
MD-0757 REV J
SHEET 8 OF 10
+5V
+5V
+5V
LEFT
R39
R50
R49
D29
U6
DS2
DS1
CHAMBER 4 SELECT
J10-2
R61
J5-2
STRT
INVERTED
2
Q7
+12V
+12V
CHAMBER 3 SELECT
J10-3
R62
J5-3
3
17
CHAMBER 2 SELECT
CHAMBER 1 SELECT
J10-5
R63
J5-4
4
R64
J5-5
16
5
15
INVERTING
BUFFER
CH 2
J1-6
START
PORTRAIT
J1-4
START
J1-3
MIDDLE
J1-11
PORTRAIT
13 TP1
D12
D28
J10-4
J1-2
JW7
1
2
3
Q5
J1-13
INVERTED
CH 1
R2
R1
J1-5
R38
R70
U1D
Q4
Q6
CH 1
AEC CH 1
J1-8
RIGHT
R40
R71
18
+12V
JW8
1
2
3
+12V
J1-7
J1-9
+12 V
LEFT/RIGHT
RIGHT/LEFT
RESET/START
MIDDLE
PORTRAIT
INVERTED
CHAMBER O/P
-12 V
GROUND
-12V
RIGHT FIELD SELECT
MIDDLE FIELD SELECT
LEFT FIELD SELECT
J10-6
J5-6
J10-7
J5-7
J10-8
J5-8
J10-9
J5-9
D20
R66
R67
R68
6
14
7
13
8
12
9
11
LEFT
+12V
+12V
J10-13
FROM
PAGE 1
J10-17
J10-11
+24V
J5-13
D10
LEFT
Q2
J2-2
J2-6
JW5
1
2
3
RIGHT
START
MIDDLE
PORTRAIT
13 TP2
Q1
J5-17
INVERTED
CH 2
R4
R3
J2-4
J2-3
J2-11
J2-13
J2-5
U1C
J5-11
AEC CH 2
J2-8
RIGHT
D9
MIDDLE
Q3
TP11 TP12
+12V
+12V
R36
J5-19
R37
D11
J10-19
+12V
JW6
1
2
3
R35
START
J2-7
-12V
J2-9
J10-16
J5-16
LEFT/RIGHT
RIGHT/LEFT
RESET/START
MIDDLE
PORTRAIT
INVERTED
CHAMBER O/P
-12 V
GROUND
-12V
8 TP7
-24V
+12 V
STRT
S2B
R11
CH 1
TP8 2
TP9 3
U2A
PT REF
J5-15
J10-10
J5-10
R30
R12
CH 2
R32
-
PT RAMP
J10-15
U2B
R4
+
U8B
TP6
R69
+5V
-
J5-1
U4A
-
U4B
D27
+
+12V
-
+
J10-1
TP5 10
+
PT STOP
9
+
R34
7
U8A
R33
-
D25
3
U7A
STRT
R31
2
SAMPLE
& HOLD
+
U9
TP10 6
GENERATOR INTERFACE BOARD
THIS SHEET APPLIES TO AEC BOARD ASSEMBLY 739389
REFER TO CHAPTER 3D FOR INSTALLATION AND CALIBRATION DETAILS.
AEC BOARD
DESIGNATES AN ANALOG SWITCH. THESE ARE I.C. “SWITCHES” THAT ARE
SWITCHED ON / OFF BY APPLYING THE APPROPRIATE LOGIC LEVEL.
DRAWN
G. SANWALD
CHECKED
__________
DATE
02 JUN 2000
__________
AEC
DES.\MFG.\AUTH.
L. FOSKIN
Use and disclosure is subject to the restrictions on the title page of this CPI document.
02 JUN 2000
MD-0757 REV J
SHEET 9 OF 10
NOTE
REFERENCE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
REMARKS
“HIGH” (APPROXIMATELY 5 VDC) = NO PTSTOP (PHOTOTIMER STOP) SIGNAL RECEIVED FROM AEC BOARD. “LOW” (APPOXIMATELY 0 VDC) = PTSTOP SIGNAL RECEIVED FROM AEC BOARD.
AEC RAMP. THIS IS A SIGNAL RAMPING FROM 0 TOWARD +10 VDC. THE ACTUAL MAGNITUDE WILL DEPEND ON THE AEC TECHNIQUE.
AEC REFERENCE VOLTAGE, 0 TO +10 VDC, DEPENDING ON AEC TECHNIQUE. THE LENGTH OF THE AEC EXPOSURE IS PROPORTIONAL TO THE AEC REFERENCE VOLTAGE.
“HIGH” (> 10 VDC) = AEC CHANNEL DESELECTED, “LOW” (APPROXIMATELY 0 VDC) = AEC CHANNEL SELECTED.
“HIGH” (> 10 VDC) = L, M, R, FIELD DESELECTED, “LOW” (APPROXIMATELY 0 VDC) = L, M, R, FIELD SELECTED.
“HIGH” (> 10 VDC) = NO AEC STOP REQUEST (INSUFFICIENT RAMP TO TERMINATE AEC EXPOSURE), “LOW” (APPROXIMATELY 0 VDC) = AEC STOP REQUESTED (AEC EXPOSURE TERMINATED).
“HIGH” (> 10 VDC) = AEC START NOT REQUESTED, “LOW” (APPROXIMATELY 0 VDC) = AEC START REQUESTED.
THE VOLTAGE AND MAGNITUDE OF THE RAMP AT THIS POINT SHOULD BE APPROXIMATELY THE SAME AS THE PT RAMP OUTPUT, NOTE REFERENCE 2 .
THIS WILL BE A NEGATIVE DC VOLTAGE OR RAMP, DEPENDING ON AEC CHAMBER OUTPUT. THE MAGNITUDE OF THE DC VOLTAGE OR RAMP IS DEPENDENT ON THE AEC TECHNIQUE IN USE.
THIS WILL BE A POSITIVE DC VOLTAGE OR RAMP, DEPENDING ON AEC CHAMBER OUTPUT. THE MAGNITUDE OF THE DC VOLTAGE OR RAMP IS DEPENDENT ON THE AEC TECHNIQUE IN USE.
R79 ADJUSTS THE +45V, +300V, AND +500V OUTPUTS FROM THE DC TO DC CONVERTER CIRCUIT. REFER TO CHAPTER 3D FOR DETAILS.
THE VOLTAGE AT TP22 SHOULD BE APPROXIMATELY AS SHOWN IN FIGURE 1 (BELOW). THE MAXIMUM DUTY CYCLE WILL BE APPROXIMATELY 45%, DEPENDING ON THE LOAD ON THE HV SUPPLIES.
THE VOLTAGE AT THIS TEST POINT IS THE OUTPUT OF THE AEC CHAMBER. REFER TO THE AEC CHAMBER MANUFACTURERS DOCUMENTATION FOR DETAILS.
THIS WILL BE A POSITIVE DC VOLTAGE. THE MAGNITUDE OF THE DC VOLTAGE IS DEPENDENT ON THE AEC TECHNIQUE IN USE.
THIS IS THE START SIGNAL. “HIGH” (5 VDC) = START = ANALOG SWITCHES CLOSED, “LOW” (0 VDC) = START = ANALOG SWITCHES OPEN.
THIS WILL BE A VOLTAGE BETWEEN 0 AND 5.1 V, DEPENDING ON THE SETTING OF THE ACTIVE POTENTIOMETER R10, R19, OR R24..
200 kHz
12 VDC
0 VDC
FIGURE 1
DRAWN
G. SANWALD
CHECKED
__________
DATE
02 JUN 2000
__________
AEC
DES.\MFG.\AUTH.
L. FOSKIN
Use and disclosure is subject to the restrictions on the title page of this CPI document.
02 JUN 2000
MD-0757 REV J
SHEET 10 OF 10
“DIGITAL IMAGING” ABS
FROM MD-0767, PAGE 1
JW13 *
R43
JW12 *
R62
JW23 = OUT
1
R120
R63
2
2
3
4
J7-4
J7-10
U17A
6
5
-
7
R41
9
+
10
U17B
JW24
(IN)
R118
R54
R58
13 -
-
J11-3
8
J7-3
12 +
+
U17C
JW25
(OUT)
14
R56
SAMPLE AND HOLD
CIRCUIT (U47,
R95, C102, ETC.)
A/D
CONVERTER
U23D
TP8
C22
J7-5
J7-7
1
TP9
-12V
CONTROL SIGNALS
FROM DATA BUS
ADDRESS REGISTERS
(U24, U25)
J7-12
DIGITAL
POTENTIOMETER
U49
1
R50
PMT / PHOTO DIODE /
PROPORTIONAL DC
VIDEO INPUT &
AEC OUTPUT
JW27 *
U37
R52
D13
R45
+
C19
R42
3
R61
+12V
R64
1
R51
R121
3
-
R44
JW11 *
JW4 *
2
RN5A
JW26 *
1
JW23
R27
JW21 *
1
TP13 TP15
R31
R65
TP14
DATA BUS
D0..D7
J8
2
COMPOSITE VIDEO
INPUT
JW19 *
R49
3
R47
13 -
R28
C21
JW20 *
JW5 *
R26
D11
U34
14
U17D
GAIN CONTROL SIGNAL
TO MD-0757
DRIVER
R46
REFER TO CHAPTER
3E OF SERVICE MANUAL
FOR DETAILS ON
ABS INPUT CONNECTIONS
R30
C20
12 +
GENERATOR INTERFACE BOARD
* REFER TO CHAPTER 3E OF SERVICE MANUAL TO DETERMINE REQUIRED JUMPER
POSITIONS FOR THESE CONNECTORS.
GENERATOR CPU BOARD
NOTE
REFERENCE
REMARKS
1
A DC VOLTAGE WILL BE PRESENT FROM TP8 (TO TP9 OR GROUND),
AND FROM TP13 TO TP15 WHEN OPERATING WITH ABS ON. THIS
VOLTAGE WILL TYPICALLY RANGE FROM 0.5 TO 5 VDC, AND WILL
VARY DEPENDING ON THE NOMINAL DOSE VALUE IN THE
ABS SETUP MENU.
DRAWN
G. SANWALD
CHECKED
KVR
DES.\MFG.\AUTH.
L. FOSKIN
DATE
16 MAY 2000
ABS
(AUTOMATIC BRIGHTNESS
STABILIZATION)
16 MAY 2000
16 MAY 2000
MD-0758 REV E
SHEET 1 OF 1
Use and disclosure is subject to the restrictions on the title page of this CPI document.
DS15
DS19
TXD
RXD
R43
U20
UART
+5V
LS1
R46
+5V
U11
RS-232
TRANSMITTER /
RECEIVER
U7
RN3E
RN3F
RN3G
RN3H
J11-3
P1-3
J11-7
P1-7
J11-2
P1-2
J11-8
P1-8
RS-232
RECEIVER /
DRIVER
MICROCONTROLLER
(CPU, EPROM **,
J1-1
J2-1
J1-2
J2-2
J1-3
J2-3
J1-4
J2-4
J1-5
J2-5
J1-6
J2-6
J1-7
J2-7
J1-8
J2-8
J1-9
J2-9
J1-10
J2-10
J1-11
J2-11
J1-12
J2-12
J1-13
J2-13
J1-14
J2-14
ADDRESS DECODERS
& LOGIC CIRCUITS)
U1, U2, U3, U4
LED
DISPLAYS
DATA LATCHES
(U6-U9)
(7 SEGMENT
DISPLAYS &
STATUS LEDs)
DS1-DS23
DRIVERS
(U1-U4, U10)
U5
** U3 IS THE EPROM.
BUFFER
DATA & ADDRESS
BUS
DATA BUS
D0..D7
GENERATOR CPU BOARD
J1-1
P1-1
J1-2
P1-2
J1-3
P1-3
J1-4
P1-4
J1-5
P1-5
J1-6
P1-6
J1-7
P1-7
J1-8
P1-8
J1-9
P1-9
J1-10
P1-10
REMOTE FLUORO DISPLAY BOARD
REMOTE FLUORO CONTROL BOARD
FRONT PANEL
KEYBOARD
SWITCHES
KEYBOARD ASSEMBLY
REMOTE FLUORO CONTROL UNIT
LIMITED TROUBLESHOOTING CAN BE PERFORMED ON THE REMOTE FLUORO CONTROL ASSEMBLY IN THE FIELD. THE DC RAILS CAN BE CHECKED (REFER TO MD-0788),
AND THE TXD AND RXD LEDs ON THE GENERATOR CPU BOARD MAY BE OBSERVED (THESE WILL FLASH ON AND OFF TO INDICATE DATA FLOW). MEANINGFUL MEASUREMENTS
CANNOT BE MADE ON COMMUNICATIONS, DATA, AND CONTROL LINES.
DRAWN
G. SANWALD
CHECKED _________
DATE
02 JUN 2000
_________
REMOTE FLUORO
CONTROL
DES.\MFG.\AUTH.
L. FOSKIN
02 JUN 2000
MD-0766 REV D
SHEET 1 OF 1
Use and disclosure is subject to the restrictions on the title page of this CPI document.
+24V
+15V
+5V
J13-11
J13-13
J13-17
J13-15
-15V
RN14H
D0
RN14G
D1
RN14F
D2
RN14E
D3
RN14D
D4
RN14C
D5
RN14B
D6
RN14A
D7
J6-1
J12-1
J6-2
J12-2
J6-3
J12-3
J6-4
J12-4
J6-5
J12-5
J6-6
J12-6
J6-7
J12-7
J6-8
J12-8
J6-9
J12-9
RN4A
RN4C
RN4E
RN4G
RN3A
J13-1
RN4B
RN3B
RN4D
RN3D
RN4F
RN3F
RN4H
RN3H
RN3C
J13-2
J13-3
RN3E
J13-4
J13-5
RN3G
J13-6
J13-7
J13-8
WRITE ENABLE
J6-11
J12-11
READ ENABLE
J6-13
J12-13
J13-12
RESET
J6-20
J12-20
J13-16
J6-15
J12-15
J7-20
J11-20
R91
ADDRESS LATCH ENABLE
HV ON SIGNAL FROM
MD-0759, PAGE 1
4
5
6
DS40
U45B
1
2
3
U28
CPU
R84
J13-18
J13-19
EXPOSURE ENABLE COMMAND
TO MD-0761, PAGE 1
J13-14
“DIGITAL IMAGING” ABS
TO MD-0758
J13-20
EXTERNAL SYNC
R97
5
1
4
2
CONTINUED
ON PAGES
2 TO 19
J13-22
3
SYNC
J7-15
2
J11-15
JW22
1
U45A
3
2
R115
RN19D
+5V
J13-10
U51
JW3
1
LINE SYNC FROM
MD-0788, PAGE 4
JUMPER POSITION:
INTERNAL (LINE SYNC)
JUMPER PINS 1-2
EXTERNAL (DIGITAL IMAGING SYNC)
JUMPER PINS 2-3
JUMPER POSITION:
INVERTED SYNC
JUMPER PINS 1-2
NON-INVERTED SYNC
JUMPER PINS 2-3
J13-9
J13-21
J13-23
DATA, ADDRESS,
AND CONTROL BUS
GENERATOR CPU BOARD
GENERATOR INTERFACE BOARD
DRAWN
G. SANWALD
CHECKED
KVR
DES.\MFG.\AUTH.
L. FOSKIN
DATE
16 MAY 2000
17 MAY 2000
17 MAY 2000
DIGITAL
INTERFACE
MD-0767 REV M
SHEET 1 OF 19
Use and disclosure is subject to the restrictions on the title page of this CPI document.
+5V
+15V
+24V
J1-11
J1-13
J3-7
J1-17
J3-1
J1-15
J3-3
TP1
-15V
TP2
U7
R2
+24V
J2-20
MUX
R3
J2-21
R11
J1-20
+24V
J3-9
J1-14
5
2
4
R1
1
U16
DS4
FROM
PAGE 1
DS6
EXON
J1-1
U4
PFL
DS7
DS8
HCF
F1
PREP
U6
J1-2
+24V
DS9
DS10
GEN
READY
TOMO
J1-7
J1-8
1
5
2
4
U14
J2-3
J1-4
J1-6
J3-5
J2-7
J1-3
J1-5
ADDRESS DECODER
CIRCUITS
(U1, U2, U3A, U6A)
DATA
LATCH
J2-4
DRIVER
J2-5
J3-6
J2-6
J2-22
J1-10
J3-2
J1-12
+24V
J3-4
J1-16
+24V
J3-8
U8
BUFFER
5
1
4
2
J1-9
R7
R6
J1-18
J3-10
J2-1
R17
2
+24V
+24V
R16
4
U10
1
+24V
R15
6
+24V
R14
4
5
1
+24V
R12
J1-19
5
JW1
+24V
R10
2
U3B
+24V
R13
3
J2-9
DS1
U13
J1-21
OFL
+24V
+24V
5
J2-23
1
BUFFER
DS2
U12
2
STOP
EXP.
J2-2
+24V
+24V
R4
4
5
1
J2-12
DS3
U11
4
J2-10
R9
SW1
R8
U9
R5
J1-23
O.EXP
2
J2-11
DIGITAL I/O BOARD
THIS SHEET APPLIES TO DIGITAL I/O BOARD ASSEMBLY 733752.
REFER TO THE DIGITAL IMAGING SUPPLEMENT IN THE SERVICE MANUAL
FOR DETAILS REGARDING THE CONNECTIONS TO J2, J3.
DRAWN
G. SANWALD
CHECKED
KVR
DES.\MFG.\AUTH.
L. FOSKIN
DATE
16 MAY 2000
17 MAY 2000
17 MAY 2000
DIGITAL
INTERFACE
MD-0767 REV M
SHEET 2 OF 19
Use and disclosure is subject to the restrictions on the title page of this CPI document.
+24VR
+5V
+15V
J1-11
J1-13
J1-17
+24VR
+24VR
+24V
D6
F1
J1-15
D5
R10
J3-25
J2-1
J3-27
J2-3
J3-29
J2-5
J3-31
J2-7
J3-33
J2-9
J3-35
J2-11
Q1
D3
12 U10D 11
13
J1-19
R9
-15V
J2-13
J2-17
U17
J2-19
MONOSTABLE
TIMER
J2-18
D4
J2-20
U14
U16
J2-14
J1-1
J2-12
J1-2
J2-10
J1-3
J2-8
J1-4
DATA
LATCH
J1-5
J1-6
DRIVER
J2-6
+24V
ADDRESS DECODER
CIRCUITS
(U1, U2, U9, U10C)
J1-7
J2-2
R15
J1-8
J2-4
+24VR
J1-10
U13
J1-12
R13
U15
J3-34
Q2
J2-23
J3-32
J1-16
J3-30
J1-18
D1
DATA
LATCH
J3-28
DRIVER
J3-26
J3-36
FROM
PAGE 1
+24V
+24VR
+24VR
+24VR
+24VR
R14
U12
R12
Q3
J1-9
BUFFER
5
J1-21
1
R1
U3
J1-23
1
R2
U4
4
U11
5
1
R3
J2-16
J3-47
J2-22
U5
4
2
5
4
2
D2
2
J3-41
J3-39
SW1
J3-37
J3-38
BUFFER
J3-40
J3-42
J3-44
5
1
4
2
U6
R4
5
1
4
2
U7
R5
5
1
4
2
R6
J3-46
U8
+24VR
J2-15
J3-45
R16
J3-43
J2-24
J3-48
J1-22
J2-21
J1-20
DIGITAL I/O BOARD
THIS SHEET APPLIES TO DIGITAL I/O BOARD ASSEMBLY 733947.
REFER TO THE DIGITAL IMAGING SUPPLEMENT IN THE SERVICE MANUAL
FOR DETAILS REGARDING THE CONNECTIONS TO J2, J3.
DRAWN
G. SANWALD
CHECKED
KVR
DES.\MFG.\AUTH.
L. FOSKIN
DATE
16 MAY 2000
17 MAY 2000
17 MAY 2000
DIGITAL
INTERFACE
MD-0767 REV M
SHEET 3 OF 19
Use and disclosure is subject to the restrictions on the title page of this CPI document.
+24VR
+5V
+15V
+24VR
+24VR
+24V
J3-25
J2-1
J1-11
J3-27
J2-3
J1-13
J3-29
J2-5
J3-31
J2-7
J1-17
D6
F1
J1-15
D5
R10
J3-33
J2-9
J3-35
J2-11
Q1
D3
12 U10D 11
13
J1-19
J2-13
J2-17
R9
-15V
U17
J2-19
MONOSTABLE
TIMER
J2-18
D4
* THESE ARE SERIAL COMMUNICATION LINES. REFER TO MD-0829, SHEET 1, FOR
THE CORRESPONDING CONNECTIONS ON THE GENERATOR INTERFACE BOARD.
** REFER TO MD-0761, SHEET 1, FOR THE PREP AND X-RAY INPUTS ON THE
GENERATOR INTERFACE BOARD.
*** REFER TO MD-0762, SHEET 1, FOR THE POWER ON & OFF INPUTS ON THE
GENERATOR INTERFACE BOARD.
J2-20
U14
U16
J2-14
J1-1
J2-12
J1-2
J2-10
J1-3
J1-4
DATA
LATCH
J1-5
J1-6
DRIVER
+24V
ADDRESS DECODER
CIRCUITS
(U1, U2, U9, U10C)
J1-7
J4-1
J2-6
J4-2
J2-4
+24VR
J2-2
J4-5
J1-10
U13
J1-12
R13
U15
J3-34
Q2
J2-23
J3-32
J1-16
J3-30
J1-18
D1
DATA
LATCH
J3-28
DRIVER
J3-26
+24V
+24VR
J5-7
J5-2
J5-8
J4-7
PREP SW **
J4-8
X-RAY SW **
J5-5
J4-10 “ON” SW ***
J4-11 “OFF” SW ***
J4-12 COMMON***
J4-3
J3-36
+24VR
FROM J4
GENERATOR
INTERFACE
BOARD
J5-3
*
*
*
*
J4-4
R15
J1-8
J2-8
J4-9
+24VR
+24VR
**
R14
U12
R12
Q3
J1-9
BUFFER
5
J1-21
1
R1
U3
J1-23
U11
1
R2
U4
4
FROM
PAGE 1
5
1
4
2
R3
J3-47
U5
4
2
5
2
J2-16
J2-22
D2
J3-41
J3-39
SW1
J3-37
J3-38
BUFFER
J3-40
J3-42
J3-44
5
1
R4
5
1
U7
U6
4
2
R5
5
1
4
2
R6
+15V
J3-46
U8
4
2
J6-1
J2-15
+24VR
J3-45
J6-2
R16
J3-43
J6-3
J2-24
J6-4
J3-48
J1-22
J6-6
J2-21
J1-20
J6-7
THE CIRCUITS WITHIN THE DASHED LINES ARE IDENTICAL TO THOSE
ON PAGE 3. REFER TO PAGE 3 FOR THE FULL SIZED DIAGRAM
J6-8
J6-11
+15V
J6-12
J6-9
J7-2
J6-10
J7-3
J7-1
J7-4
J7-5
U18
U19
DATA
LATCH
DRIVER
TO X-RAY
MINI-CONSOLE.
(SHEET 5)
J6-13
TO MINI-CONSOLE X-RAY
EXPOSURE INDICATOR.
(SHEET 5)
J6-5
J6-14
J7-7
DIGITAL I/O BOARD
THIS SHEET APPLIES TO DIGITAL I/O BOARD ASSEMBLY 735921.
REFER TO THE DIGITAL IMAGING SUPPLEMENT IN THE SERVICE MANUAL
FOR DETAILS REGARDING THE CONNECTIONS TO J2, J3, J5.
DRAWN
G. SANWALD
CHECKED
KVR
DES.\MFG.\AUTH.
L. FOSKIN
DATE
16 MAY 2000
17 MAY 2000
17 MAY 2000
DIGITAL
INTERFACE
MD-0767 REV M
SHEET 4 OF 19
Use and disclosure is subject to the restrictions on the title page of this CPI document.
J1-1
J1-2
DS1
DS2
RAD
EXP
FLUORO
EXP
DS3
PREP
DS4
PWR
ON
LS1
LS2
J1-4
J1-6
J1-3
J1-5
J1-7
FROM J6
(SHEET 4)
J1-8
J1-9
J1-10
ON
OFF
J1-13
J1-11
J2-1
J2-2
J1-12
PREP
J2-3
X-RAY
HAND
SWITCH
(OPTIONAL)
J2-4
J1-14
X-RAY MINI CONSOLE
J3-2
J3-3
DS1
RAD
EXP
DS2
FLUORO
EXP
LS1
FROM J7
(SHEET 4)
LS2
J3-1
J3-5
J3-7
J3-4
MINI CONSOLE X-RAY EXPOSURE INDICATOR
DRAWN
THE OPTIONAL “X-RAY MINI CONSOLE” AND OPTIONAL “MINI CONSOLE X-RAY EXPOSURE INDICATOR”
ARE TYPICALLY USED WITH DIGITAL IMAGING SYSTEMS THAT HAVE INTEGRATED GENERATOR
CONSOLE CONTROL FUNCTIONS.
G. SANWALD
CHECKED
KVR
DES.\MFG.\AUTH.
L. FOSKIN
DATE
16 MAY 2000
17 MAY 2000
17 MAY 2000
DIGITAL
INTERFACE
MD-0767 REV M
SHEET 5 OF 19
Use and disclosure is subject to the restrictions on the title page of this CPI document.
+24V
+5V
+15V
J1-11
U12
J1-13
+5 V
REGULATOR
J1-17
F1
+5V(A)
+24V
J2-14
J2-21
+15V
J2-8
J1-1
GENERATOR
READY
J1-3
U4
J1-4
U6
FROM
PAGE 1
J1-7
J1-8
+15V
U7
4
2
DS4
J1-5
J1-6
5
1
J1-2
EXPOSURE IN
PROCESS (EIP)
R2
ADDRESS DECODER
CIRCUITS
(U1, U2, U3A, U5A)
DATA
LATCH
J2-22
1
5
2
4
U10
DS3
DRIVER
R1
J1-10
J2-11
J2-13
+24V
J1-12
R9
J1-16
J1-18
X-RAY
R8
DS2
5
1
4
2
R6
J1-14
J2-15
J2-4
J3-1
U8
R7
U16
5
1
4
2
5
1
J2-5
J3-4
J2-6
J3-3
U14
J1-9
J1-21
J2-16
J3-10
BUFFER
J1-23
J2-18
J3-11
U15
+5V(A)
U9
SW1
5
4
1
EXPOSE
RDY
U11
+24V
BUFFER
5
4
2
1
J2-17
J2-19
J3-12
DS5
R3
J2-9
U13
4
2
2
DS1
R4
R5
J2-12
PREP
DIGITAL I/O BOARD
THIS SHEET APPLIES TO DIGITAL I/O BOARD ASSEMBLY 735406.
REFER TO THE DIGITAL IMAGING SUPPLEMENT IN THE SERVICE MANUAL
FOR DETAILS REGARDING THE CONNECTIONS TO J2, J3.
DRAWN
G. SANWALD
CHECKED
KVR
DES.\MFG.\AUTH.
L. FOSKIN
DATE
16 MAY 2000
17 MAY 2000
17 MAY 2000
DIGITAL
INTERFACE
MD-0767 REV M
SHEET 6 OF 19
Use and disclosure is subject to the restrictions on the title page of this CPI document.
+24V
F1
+5V
+15V
+24V
J2-13
J2-7
J2-8
J1-11
J2-9
J1-13
J2-12
J1-17
J2-5
J4-3
J2-6
J4-2
J2-20
+15V
J4-5
1
5
2
4
U10
J1-1
U6
J1-2
FROM
PAGE 1
J1-8
5
1
4
2
R2
ADDRESS DECODER
CIRCUITS
(U1, U2, U3A, U5A)
DATA
LATCH
J2-21
+15V
U13
DS4
J1-5
J1-7
J2-22
+15V
U7
R1
J1-4
J1-6
5
1
DS3
U4
J1-3
J2-24
+15V
1
5
4
2
DRIVER
R7
2
J2-23
+15V
U14
DS7
1
5
2
4
4
U15
DS8
R8
J1-10
DS9
J1-12
J2-1
J3-2
R9
J1-16
J1-18
9
10
8
12
13
DS3 EXPOSURE IN PROCESS (EIP)
11
DS4 GENERATOR PREPPED
U3D
U3C
J2-2
J3-1
J2-3
DS7 RAD HANGMODE
J1-19
DS8 BUCKY START
J3-4
J2-4
J3-5
DS9 X-RAY ON
J2-11
J3-6
U8
J2-15
J3-8
J1-9
J1-21
J2-16
BUFFER
J3-7
J1-23
J2-17
J3-12
U9
J2-18
SW1
J3-11
+24V
J2-19
5
BUFFER
1
J3-10
U11
+24V
5
1
4
2
4
2
DS5
R3
R4
J2-10
BUCKY IN MOTION
U12
DS6
R5
R6
J2-25
SPARE INPUT
DIGITAL I/O BOARD
THIS SHEET APPLIES TO DIGITAL I/O BOARD ASSEMBLY 736153
REFER TO THE DIGITAL IMAGING SUPPLEMENT IN THE SERVICE MANUAL
FOR DETAILS REGARDING THE CONNECTIONS TO J2, J3, J4.
DRAWN
G. SANWALD
CHECKED
KVR
DES.\MFG.\AUTH.
L. FOSKIN
DATE
16 MAY 2000
17 MAY 2000
17 MAY 2000
DIGITAL
INTERFACE
MD-0767 REV M
SHEET 7 OF 19
Use and disclosure is subject to the restrictions on the title page of this CPI document.
+5V +15V +24V
U1
+24V
U12
RATE 0
J1-11
*
DS38
J1-13
*
RATE 1
DS40
DRIVER
J1-17
J2-8
RATE 2
*
DS41
DS43
*
SPARE I/P
J2-22
J2-13
J3-2
J2-23
J2-1
J3-3
J3-8
J2-2
J3-4
J3-27
J2-3
J3-5
J3-9
J2-4
J3-6
J3-28
J2-5
J3-7
J3-10
J2-6
J3-8
J3-29
J2-7
J3-9
J3-31
J2-8
J3-10
J2-9
J3-20
U9
DS45
TABLE STEP SELECT
EXPOSURE ON
GENERATOR RDY
TOMO SELECT
EXP SAFETY ITLK
EXPOSURE REQ
PREP REQ
DRIVER
J1-1
J1-2
J3-1
+24V
SELECT DIGITAL RADIOGRAPHY
*
U11
-15V
J3-17
J2-9
RATE 3
*
J1-15
DS16
J2-17
*
SELECT TOMO
DS18
J2-4
*
SPARE INPUT 1
DS20
DRIVER
J2-16
*
J2-3
SPARE INPUT 2
DS21
MAG MODE 0
MAG MODE 1 *
J2-15
DS22
MAG MODE 2 *
J2-2
DS23
*
J2-14
J1-3
DS24
J2-1
J1-4
U3
J1-5
FLUORO
REQUEST
J1-6
J1-7
CPLD
*
*
U10
J1-8
DS29
DS27
*
*
DS35
*
DS37
DS36
*
DS39
*
*
STEP TABLE
J1-10
*
J1-12
DS25
*
J1-18
J2-5
CINE TIME SEL 0
DS26
DS28
J2-6
CINE TIME SEL 2
*
J1-22
DS30
SELECT CINE *
SELECT HCF
J2-10
J3-21
J3-23
J2-11
J3-22
J3-4
J2-12
J3-23
J2-14
J3-24
J2-15
J3-25
J3-22
J3-3
J3-21
J3-2
J3-20
J3-1
J2-7
TABLE STEP
REQUEST
J2-20
DS34
+24V
+24V
SPARE O/P 4
SPARE O/P 3
SPARE O/P 2
SPARE O/P 1
TABLE TUBE SELECT
GENERATOR READY
X-RAY ON
J2-19
DS32
*
FROM
PAGE 1
DRIVER
J2-18
CINE TIME SEL 1
*
DRIVER
J1-19
DS33
DS31
J3-16
F1
J2-21
DS6
DS4
*
DS11
DS8
*
*
*
DS13
*
DS17
DS14
*
*
DS19
*
U2
AEC CENTER FIELD SELECT
U17
R77
*
DS1
*
R78
Q1
DS46
DRIVER
DS3
*
DRIVER
R72
J3-24
SELECT STEP DIRECTION
DS5
TOMO TIME SELECT 1 *
J3-26
J2-17
J3-27
J2-18
J3-28
J2-19
J3-29
J2-20
J3-30
J2-21
J3-31
J2-22
J3-32
J2-23
J3-33
J2-24
J3-6
TOMO TIME SELECT 0
J2-25
J3-25
DS7
J3-7
TOMO TIME SELECT 2 *
D3
J3-5
SELECT TABLE STEPPING
J2-16
DS10
*
J3-26
DS12
J3-34
J3-35
J3-36
J2
J3-37
2
5
1
TABLE FLUORO
REQUEST
4
2
5
1
U15
READY ACQUIRE
FLUORO
3
-3
2
J3
-1
J2
J2
J3
-2
0
-3
2
-3
J3
J2
-1
0
1
4
U6
1
1
5
TABLE X-RAY
REQUEST
DS44
5
U
2
1
1
4
U4
DS9
5
U
1
1
5
U
1
1
DS2
R63
D2
U
U
D1
J1-20
4
1
-1
+15V
DS42
5
1
4
2
5
1
U13
READY ACQUIRE
RAD/CINE/HCF
DS15
5
1
4
2
U8
TABLE PREP
REQUEST
R30
+24V
K1
-15V
J1-14
J1-9
U5
J1-21
U7
4
J1-23
2
R17
U16
4
2
R25
J5-1
24V FROM
ROOM INTERFACE
U14
4
2
R69
4
2
J5-3
R68
J3-18
J3-19
DIGITAL I/O BOARD
THIS SHEET APPLIES TO DIGITAL I/O BOARD ASSEMBLY 736894
* DUE TO SPACE RESTRICTIONS, SERIES RESISTORS ARE NOT SHOWN FOR THE INDICATED LED’S
REFER TO THE DIGITAL IMAGING SUPPLEMENT IN THE SERVICE MANUAL
FOR DETAILS REGARDING THE CONNECTIONS TO J2, J3.
DRAWN
G. SANWALD
CHECKED
KVR
DES.\MFG.\AUTH.
L. FOSKIN
DATE
16 MAY 2000
17 MAY 2000
17 MAY 2000
DIGITAL
INTERFACE
MD-0767 REV M
SHEET 8 OF 19
Use and disclosure is subject to the restrictions on the title page of this CPI document.
+5V
+15V
+24V
J1-11
+5V
J1-13
DS1
+15V
JW103
J1-17
R10
J1-19
12 U3D 11
13
U7
MONOSTABLE
TIMER
4
5
9
10
U3B
6
J7-3
U10
U3C
4
8
J7-2
X-RAY ON TO PAGE 10
XRAY ON
6
J2-20 (-)
7
J2-19 (+)
DRIVER
+15V
J6-1
J7-1
J6-2
J7-4
J6-5
J7-5
J6-14
J7-7
U17
U18
J6-3
J1-1
J6-4
J1-2
J6-6
J1-3
J6-7
J1-4
DATA
LATCH
J1-5
J1-6
J1-7
J1-8
DRIVER
J6-8
ADDRESS DECODER
CIRCUITS
(U1, U2, U3A, U5)
J4-10
JW101
X-RAY RQST TO PAGE 10
J6-9
J1-10
J4-11
J1-12
J1-16
U13
U4
4
DRIVER
J1-18
DATA
LATCH
4
XRAY
DS4
DRIVER
6
J2-13 (+)
7
J2-14 (-)
DS2 PREP
4
U14
4
DRIVER
J6-12
R7
J1-21
GENRDY
DS3
DRIVER
6
J2-15 (+)
7
J2-16 (-)
6
J2-21 (+)
7
J2-22 (-)
J6-13
J4-3
J4-9
R9
J1-9
U8
J4-8
J4-12
U12
DATA
LATCH
J1-23
J2-18 (-)
7
R6
R8
U6
J4-7
J6-11
U11
FROM
PAGE 1
J6-10
J2-17 (+)
6
DS5 *
J2-1 (+)
U15
1
J4-1
6
DRIVER
7
J5-3
R4
BUFFER
J4-2
J2-2 (-)
U9
SW1
J5-7
J4-4
+5V
J5-2
R5
DS7
J4-5
DS6 *
XRAYEN
J5-8
+5V
R12
BUFFER
R11
J2-25 (+)
Q1
5
1
4
2
J5-5
U16
J2-26 (-)
JW102
X-RAY EN FROM PAGE 10
* THE INPUTS / OUTPUTS MARKED “*” ARE SPARE, AND HAVE NOT BEEN ASSIGNED
THIS SHEET APPLIES TO DIGITAL I/O BOARD ASSEMBLY 737950.
THIS SHOWS THE CONNECTIONS TO J2, J4, J5, J6 AND J7. THE
REMAINING CIRCUITS ARE SHOWN ON THE NEXT PAGE.
REFER TO THE DIGITAL IMAGING SUPPLEMENT IN THE SERVICE MANUAL
FOR DETAILS REGARDING THE CONNECTIONS TO J2, J4, J5, J6, AND J7.
DIGITAL I/O BOARD
DRAWN
G. SANWALD
CHECKED
KVR
DES.\MFG.\AUTH.
L. FOSKIN
DATE
16 MAY 2000
17 MAY 2000
17 MAY 2000
DIGITAL
INTERFACE
MD-0767 REV M
SHEET 9 OF 19
Use and disclosure is subject to the restrictions on the title page of this CPI document.
+24V_EXT +24V_EXT +24V_EXT
R101
R102
1
5
2
4
DS101
DS102
R112
+5V
R111
R110
+24V_EXT
DS103
U103
+24V_EXT
U101
FROM
PAGE 9
U104
4
3
X-RAY ON
DATA
LATCH
R107
R105
X-RAY RQST
+5V
2
1
2 MONOSTABLE 3
TIMER
5
+24V_EXT
J101-5
EXP_ACQ
J101-2
EXP_END
J101-6
EXP_REQ
R106
Q101
TO DIGITAL
SYSTEM
J101-8
J101-1
U102
+5V
X-RAY EN
R113
6
R115
R114
U105
TO
PAGE 9
+5V
4
+24V_EXT
DRIVER
5
1
J102-1
U106
4
J102-3
2
FROM
DIGITAL
SYSTEM
DIGITAL I/O BOARD
THIS SHEET APPLIES TO DIGITAL I/O BOARD ASSEMBLY 737950. THIS SHOWS
THE CONNECTIONS TO J101 AND J102. THE REMAINING CIRCUITS ARE SHOWN ON THE
PREVIOUS PAGE.
REFER TO THE DIGITAL IMAGING SUPPLEMENT IN THE SERVICE MANUAL
FOR DETAILS REGARDING THE CONNECTIONS J101 AND J102.
DRAWN
G. SANWALD
CHECKED
KVR
DES.\MFG.\AUTH.
L. FOSKIN
DATE
16 MAY 2000
17 MAY 2000
17 MAY 2000
DIGITAL
INTERFACE
MD-0767 REV M
SHEET 10 OF 19
+5V +15V +24V
+24V
U9
J6-16
J8-11
J6-17
F1
U7
J8-13
J6-1
J6-2
J8-17
J6-3
J8-15
J6-4
DRIVER
J6-20
J6-21
-15V
J6-22
J6-23
J8-1
J8-2
J8-3
U8
R14
J8-4
J6-5
J8-5
CPLD
J8-6
R16
J6-6
R15
J6-24
R19
J6-26
R18
J6-7
DRIVER
J8-7
R17
J8-8
J6-25
J8-10
J8-12
J8-16
U10
R20
J8-18
J6-8
R22
J6-9
R24
DRIVER
J8-9
R21
J6-27
R25
J6-29
R23
J8-21
FROM
PAGE 1
J6-10
J6-28
R26
J6-31
J8-23
J6-32
J6-12
J6-30
U20
J6-33
+3.3V
+
R53
+3.3V
1
3
J6-15
U23A
+3.3V
R27
5
2
4
DS2
1
1
4
2
+24V
5
U11
R36
DS1
5
2
4
2
R28
J9-3
24V FROM
ROOM INTERFACE
Q3
4
U13
DRIVER
J8-22
1
+24V
J9-1
U12
U15
R31
5
U19
R43
1
U14
1
2
J6-19
R42
J8-14
4
J6-18
DS3
R30
5
J6-14
R46
R35
R54
A/D
CONVERTER
2
U11
U11
DRIVER
DRIVER
+24V
R44
U11
DRIVER
K1
R45
J6-34
J6-35
J6-36
FROM J7-3, J7-5 (SHT 12)
J6-37
DIGITAL I/O BOARD
THIS SHEET APPLIES TO DIGITAL I/O BOARD ASSEMBLY 738947. THIS SHOWS THE CONNECTIONS
TO J6 AND J9; THE REMAINING CIRCUITS ARE SHOWN ON THE NEXT PAGE.
REFER TO THE DIGITAL IMAGING SUPPLEMENT IN THE SERVICE MANUAL
FOR DETAILS REGARDING THE CONNECTIONS TO J6, J9.
DRAWN
G. SANWALD
CHECKED
KVR
DES.\MFG.\AUTH.
L. FOSKIN
DATE
16 MAY 2000
17 MAY 2000
17 MAY 2000
DIGITAL
INTERFACE
MD-0767 REV M
SHEET 11 OF 19
Use and disclosure is subject to the restrictions on the title page of this CPI document.
J8-11
+2.5V
+3.3V
U16
+24V
3.3V
REGULATOR
J2-1
+24V
+24V
R6
J2-2
U22
J4A-1
R8
VOLTAGE
REGULATOR
+10V
J4A-2
J4E-2
J4A-3
J4E-3
J4A-4
U6
U9
J4A-5
R48
U21
VOLTAGE
REGULATOR
J4A-7
J4E-7
J4E-8
J2-5
R4
+24V
DRIVER
J3-1
R9
J3-2
J3-3
+24V
J3-4
J4B-1
J4F-1
J4F-2
J8-1
J4B-3
J4F-3
J8-2
J4B-4
J4F-4
J8-3
J4B-5
J4F-5
J4B-6
J4F-6
J4B-7
J4F-7
J4B-8
J4F-8
J8-4
CPLD
J8-7
J3-5
R7
J3-6
J11-2
J11-1
+24V
J1-1
R3
J8-8
+24V
J8-10
FROM
PAGE 1
J2-6
DRIVER
J4B-2
J8-6
U2
J4E-6
+24V
J8-5
J2-4
J4E-5
J4A-8
DRIVER
R47
R49
R5
J4E-4
U4
J4A-6
J8-13
J2-3
J4E-1
J1-2
J1-3
+24V
R2
J8-12
J8-16
J8-18
J4C-1
J4G-1
J4C-2
J4G-2
J1-4
U1
J1-5
R1
J4C-3
J4C-4
U5
J4C-5
J1-6
J4G-3
J4G-4
U3
J4G-5
J4C-6
J4G-6
J4C-7
J4G-7
+24V
DRIVER
J10-1
J4C-8
DRIVER
+24V
+24V
+24V
R50
J4G-8
J10-3
DRIVER
+24V
+24V
J10-2
R51
+24V
J10-4
J4H-3
J4H-4
J4D-5
J4H-5
J4D-6
J4H-6
J4D-7
J4H-7
J4D-8
J4H-8
+24V
+24V
J8-19
6
MONOSTABLE
TIMER
+24V
Q5
J7-6
J7-4
U11
U17
U18B
J7-3
J7-5
DRIVER
R41
J7-2
D1
D3
D4
J8-20
DIGITAL I/O BOARD
THIS SHEET APPLIES TO DIGITAL I/O BOARD ASSEMBLY 738947. THIS SHOWS THE CONNECTIONS TO J1 TO J4, J7, J10, J11, AND
THE VOLTAGE REGULATOR CIRCUITS; THE REMAINING CIRCUITS ARE SHOWN ON THE PREVIOUS PAGE.
REFER TO THE DIGITAL IMAGING SUPPLEMENT IN THE SERVICE MANUAL
FOR DETAILS REGARDING THE CONNECTIONS TO J1-J4, J7, AND J10.
J10-6
J7-1
D2
4
5
+24V
Q4
R38
DRIVER
J4D-3
J4D-4
R52
R39
U11
J4H-1
J4H-2
R40
Q1
R11
R13
Q2
J4D-1
J4D-2
R37
R10
R12
J10-5
TO J8-22
(SHT 11)
DRAWN
G. SANWALD
CHECKED
KVR
DES.\MFG.\AUTH.
L. FOSKIN
DATE
16 MAY 2000
17 MAY 2000
17 MAY 2000
DIGITAL
INTERFACE
MD-0767 REV M
SHEET 12 OF 19
Use and disclosure is subject to the restrictions on the title page of this CPI document.
+5V
+24V
+24V
U10
+24V(A)
+15V
J3-11
R17
J8-11
J8-13
J3-12
F1
J8-17
DS
15
U14
J8-15
J3-9
J3-10
J6-20
J3-13
J6-17
J6-21
-15V
J6-18
+24V
DRIVER
J8-1
+24V
1
4
1
J8-4
U18
+5V
3
2
J8-7
J8-8
+5V
3
R18
RN7C
CPLD
J8-6
+5V
2
U26
J8-5
4
RN7D
J8-3
1
DS21
RN6D
4
1
DS16
2
4
1
3
2
3
3
+24V
J8-19
J6-16
J4-10
J6-14
J4-11
J6-7
J4-12
J6-2
J4-1
J6-23
J4-2
J4-4
TP1
J4-3
U31
U29
J8-18
J4-8
J4-5
U16
J8-16
2
PREP SW
X-RAY SW
PWR ON
PWR OFF
PWR COMM
RXD
CTS
TXD
RTS
J4-9
J1-3
+5V
4
J8-9
J1-7
1
U21
RN6B
TP3
3
2
4
3
J8-23
4
1
3
2
J1-2
U32
1
U30
J8-21
FROM
PAGE 1
R33
4
J8-10
J8-12
DS29
J4-7
J6-22
R11
R26
J8-2
J6-19
J1-8
J1-5
2
+24V
4
1
4
2
3
1
U20
3
1
3
2
J7-16
DS28
2
J7-24
R24
J8-14
4
R32
U23
DS19
J7-23
R34
TP4
U22
J7-14
J7-21
R23
DS18
U24
R21
J7-2
J7-7
J8-22
J7-20
MUX
U27
R29
DRIVER
DS27
DS26
D3
D2
D4
THIS GROUND
CONNECTS TO
THE SHELLS
OF J1 TO J4
SW1
+24V(A)
R30
R31
R28
D1
J9-1
J9-3
J8-20
24V FROM
ROOM INTERFACE
DIGITAL I/O BOARD
THIS SHEET APPLIES TO DIGITAL I/O BOARD ASSEMBLY 738114. THE CIRCUITS FOR THIS BOARD ARE SPLIT BETWEEN SHEETS 13, 14, AND 15.
DRAWN
REFER TO THE DIGITAL IMAGING SUPPLEMENT IN THE SERVICE MANUAL
FOR DETAILS REGARDING THE CONNECTIONS TO J1, J2, J3, J4, J6, AND J7.
G. SANWALD
CHECKED
KVR
DES.\MFG.\AUTH.
L. FOSKIN
DATE
16 MAY 2000
17 MAY 2000
17 MAY 2000
DIGITAL
INTERFACE
MD-0767 REV M
SHEET 13 OF 19
Use and disclosure is subject to the restrictions on the title page of this CPI document.
U10
+15V
U2
J8-1
DRIVER
J8-2
J8-3
+15V
J3-1
J2-2
J3-2
J2-3
J3-3
J2-1
J3-4
J2-5
J3-6
J2-7
J3-7
J2-4
J3-8
J8-4
J3-5
J8-5
J8-6
J3-14
+5V
J8-7
J8-8
J8-10
+5V
RN3B
FROM
PAGE 1
CPLD
+5V
J6-1
+24V
J8-12
J6-3
J8-16
J6-4
4
J6-5
U3
R2
DS2
+24V
4
4
1
U11
3
U5
RN2B
J6-24
+24V
1
+5V
3
J6-6
2
R4
2
R10
J7-1
DS10
J7-4
DS4
4
1
3
2
RN2A
+5V
1
2
R6
DS6
+24V
4
4
3
R8
DS8
RN3A
2
2
R25
2
DS20
4
R5
DS5
3
2
R1
U12
2
R9
DS9
J7-6
+24V
1
4
2
R7
1
U17
DS7
U1
3
1
+5V
3
U8
1
+24V
4
+24V
+24V
4
+5V
U6
3
U25
DS3
1
+5V
1
+5V
1
U9
3
4
+24V
RN2C
RN2D
3
R3
+24V
U7
+5V
J7-5
U4
+5V
+24V
4
J7-3
+24V
RN5D
2
RN6A
RN3D
3
RN3C
+5V
RN5C
J8-19
1
RN6C
J8-18
3
2
R22
DS17
J7-22
DS1
DIGITAL I/O BOARD
THIS SHEET APPLIES TO DIGITAL I/O BOARD ASSEMBLY 738114. THE CIRCUITS FOR THIS BOARD ARE SPLIT BETWEEN SHEETS 13, 14, AND 15.
DRAWN
REFER TO THE DIGITAL IMAGING SUPPLEMENT IN THE SERVICE MANUAL
FOR DETAILS REGARDING THE CONNECTIONS TO J1, J2, J3, J4, J6, AND J7.
G. SANWALD
CHECKED
KVR
DES.\MFG.\AUTH.
L. FOSKIN
DATE
16 MAY 2000
17 MAY 2000
17 MAY 2000
DIGITAL
INTERFACE
MD-0767 REV M
SHEET 14 OF 19
Use and disclosure is subject to the restrictions on the title page of this CPI document.
U10
J8-1
J8-2
J8-3
U19
J8-4
J6-12
J8-5
FROM
PAGE 1
J8-6
J7-12
CPLD
J6-11
J8-7
J8-8
J7-11
J6-10
DRIVER
J8-10
J7-10
J8-12
J6-9
J8-16
J7-9
J8-18
DS24
DS25
R27
DS23
R20
DS22
R19
DS14
R16
DS13
R15
DS12
R13
R12
DS11
R14
J8-19
DIGITAL I/O BOARD
THIS SHEET APPLIES TO DIGITAL I/O BOARD ASSEMBLY 738114. THE CIRCUITS FOR THIS BOARD ARE SPLIT BETWEEN SHEETS 13, 14, AND 15.
DRAWN
REFER TO THE DIGITAL IMAGING SUPPLEMENT IN THE SERVICE MANUAL
FOR DETAILS REGARDING THE CONNECTIONS TO J1, J2, J3, J4, J6, AND J7.
G. SANWALD
CHECKED
KVR
DES.\MFG.\AUTH.
L. FOSKIN
DATE
16 MAY 2000
17 MAY 2000
17 MAY 2000
DIGITAL
INTERFACE
MD-0767 REV M
SHEET 15 OF 19
Use and disclosure is subject to the restrictions on the title page of this CPI document.
+5V
+24V
+24V
U10
+24V(A)
+15V
J3-11
R17
J8-11
J8-13
J3-12
F1
J8-17
DS
15
U14
J8-15
J3-9
J3-10
J10-17
J3-13
J12-10
J10-2
-15V
J12-2
+24V
DRIVER
J8-1
+24V
1
4
1
J8-4
U18
+5V
3
2
J8-7
J8-8
+5V
3
R18
RN7C
CPLD
J8-6
+5V
2
U26
J8-5
4
RN7D
J8-3
1
DS21
RN6D
4
1
DS16
2
4
1
3
2
3
3
+24V
J8-19
J12-5
J4-10
J11-9
J4-11
J10-11
J4-12
J10-10
J4-1
J11-8
J4-2
J4-4
TP1
J4-3
U31
U29
J8-18
J4-8
J4-5
U16
J8-16
2
PREP SW
X-RAY SW
PWR ON
PWR OFF
PWR COMM
RXD
CTS
TXD
RTS
J4-9
J1-3
+5V
4
J8-9
J1-7
1
4
U21
RN6B
TP3
3
2
4
J1-2
U32
3
3
J8-23
1
1
U30
J8-21
FROM
PAGE 1
R33
4
J8-10
J8-12
DS29
J4-7
R11
R26
J8-2
J11-6
J10-16
J1-8
2
J1-5
2
+24V
4
1
4
2
3
1
U20
3
1
3
2
J12-8
DS28
2
J12-11
R24
J8-14
4
R32
U23
DS19
J12-12
R34
TP4
U22
J11-10
J12-7
R23
DS18
U24
R21
J12-3
J8-22
MUX
U27
R29
DRIVER
DS27
DS26
D3
D2
D4
SW1
+24V(A)
R30
R31
R28
D1
J9-1
J9-3
J8-20
24V FROM
ROOM INTERFACE
DIGITAL I/O BOARD
THIS SHEET APPLIES TO DIGITAL I/O BOARD ASSEMBLY 902724. THE CIRCUITS FOR THIS BOARD ARE SPLIT BETWEEN SHEETS 16, 17, AND 18.
DRAWN
REFER TO THE DIGITAL IMAGING SUPPLEMENT IN THE SERVICE MANUAL
FOR DETAILS REGARDING THE CONNECTIONS TO J1, J2, J3, J4, J10, J11, J12, J13 AND J14.
G. SANWALD
CHECKED
KVR
DES.\MFG.\AUTH.
L. FOSKIN
DATE
16 MAY 2000
17 MAY 2000
17 MAY 2000
DIGITAL
INTERFACE
MD-0767 REV M
SHEET 16 OF 19
Use and disclosure is subject to the restrictions on the title page of this CPI document.
U10
+15V
U2
J8-1
DRIVER
J8-2
J8-3
+15V
J3-1
J2-2
J3-2
J2-3
J3-3
J2-1
J3-4
J2-5
J3-6
J2-7
J3-7
J2-4
J3-8
J8-4
J3-5
J8-5
CPLD
J3-14
+5V
J8-7
J8-8
J8-10
+5V
RN3B
FROM
PAGE 1
J8-6
+5V
J10-9
+24V
J8-12
J10-18
J8-16
J10-19
4
J10-7
U3
R2
DS2
+24V
4
4
1
U11
3
U5
RN2B
J12-13
+24V
1
+5V
3
J11-4
2
R4
2
R10
J10-20
DS10
J10-22
DS4
4
U4
RN2A
3
+5V
1
2
R6
DS6
+24V
4
3
RN3A
R8
DS8
2
R25
2
R5
DS5
+24V
DS20
4
3
2
R1
4
1
3
2
U12
+5V
R9
DS9
J10-8
1
+24V
2
2
R7
1
3
2
JW2
3
U17
DS7
U1
3
+24V
4
U8
1
+5V
1
+24V
4
DS3
U6
3
U25
R3
1
+5V
1
+5V
1
2
+24V
4
U9
3
4
RN2C
RN2D
3
2
+24V
U7
+5V
J10-23
1
+5V
+24V
4
J10-21
+24V
RN5D
2
RN6A
RN3D
3
RN3C
+5V
RN5C
J8-19
1
RN6C
J8-18
R22
DS17
J12-14
DS1
DIGITAL I/O BOARD
THIS SHEET APPLIES TO DIGITAL I/O BOARD ASSEMBLY 902724. THE CIRCUITS FOR THIS BOARD ARE SPLIT BETWEEN SHEETS 16, 17, AND 18.
DRAWN
REFER TO THE DIGITAL IMAGING SUPPLEMENT IN THE SERVICE MANUAL
FOR DETAILS REGARDING THE CONNECTIONS TO J1, J2, J3, J4, J10, J11, J12, J13 AND J14.
G. SANWALD
CHECKED
KVR
DES.\MFG.\AUTH.
L. FOSKIN
DATE
16 MAY 2000
17 MAY 2000
17 MAY 2000
DIGITAL
INTERFACE
MD-0767 REV M
SHEET 17 OF 19
Use and disclosure is subject to the restrictions on the title page of this CPI document.
J13-1
U10
J13-2
J10-12
J10-13
J10-24
J10-25
J8-1
J8-2
J8-3
U19
J8-4
J11-5
J8-5
FROM
PAGE 1
J8-6
J11-1
CPLD
J11-3
J8-7
J8-8
J11-2
J11-7
DRIVER
J8-10
J12-6
J8-12
J12-4
J8-16
J10-1
J8-18
DS24
DS25
R27
DS23
R20
DS22
R19
DS14
R16
DS13
R15
DS12
R13
R12
DS11
R14
J8-19
J10-3
J10-4
J10-5
J10-6
J10-14
J10-15
J14-1
J14-2
J14-3
J14-4
J14-5
J14-6
DIGITAL I/O BOARD
THIS SHEET APPLIES TO DIGITAL I/O BOARD ASSEMBLY 902724. THE CIRCUITS FOR THIS BOARD ARE SPLIT BETWEEN SHEETS 16, 17, AND 18.
DRAWN
REFER TO THE DIGITAL IMAGING SUPPLEMENT IN THE SERVICE MANUAL
FOR DETAILS REGARDING THE CONNECTIONS TO J1, J2, J3, J4, J10, J11, J12, J13 AND J14.
G. SANWALD
CHECKED
KVR
DES.\MFG.\AUTH.
L. FOSKIN
DATE
16 MAY 2000
17 MAY 2000
17 MAY 2000
DIGITAL
INTERFACE
MD-0767 REV M
SHEET 18 OF 19
Use and disclosure is subject to the restrictions on the title page of this CPI document.
TP1
R2
+5V
+5V
J1-11
DS1
DS2
+5V
DS3
R19
+5V
DS4
R20
+5V
R18
+5V
R4
R1
R22
Q1
U4
+5V
R3
+5V
R21
+5V
J2-16 DOSE
FEEDBACK
DS5
DS6
U6
J2-12
+24V
J2-7
+15V
J2-8
J2-9
J1-13
DATA
LATCH
J1-17
J2-10
DRIVER
J2-11
J1-20
J1-19
J2-14
J1-1
+5V
TRIGGER 2
TRIGGER 3
TRIGGER CLOCK
REMOTE ON
+24V
Q2
R5
J1-7
R35
R15
J1-6
DS8
READY
BUFFER
R26
R31
-15V
+24V
R29
+24V
J1-21
J2-4
Q4
U8
J1-9
Q5
SW1
DS9
U9
J2-1
R32
R30
BUFFER
Q3
R27
J1-15
R24
R28
J1-8
J1-22
J1-23
+24V
TRIGGER 1
R25
+5V
J1-5
+15V
R34
R23
J1-4
R16
FROM
PAGE 1
+15V
R36
DS7
J1-2
J1-3
X-ON
TRIGGER 0
TRIGGER
ACKNOWLEDGE
J2-2
Q6
R33
J2-13
J2-15
DIGITAL I/O BOARD
THIS SHEET APPLIES TO DIGITAL I/O BOARD ASSEMBLY 903121.
DRAWN
REFER TO THE DIGITAL IMAGING SUPPLEMENT IN THE SERVICE MANUAL
FOR DETAILS REGARDING CONNECTIONS TO THIS BOARD.
G. SANWALD
CHECKED
KVR
DES.\MFG.\AUTH.
L. FOSKIN
DATE
16 MAY 2000
17 MAY 2000
17 MAY 2000
DIGITAL
INTERFACE
MD-0767 REV M
SHEET 19 OF 19
Use and disclosure is subject to the restrictions on the title page of this CPI document.
+15V
Q6
+15V
Q5
+5V
J2-1
R2
Q4
+5V
+5V
J2-6
R31
Q3
DS1
J2-7
J2-2
+5V
U1
U2
RN12C
RS-232
TRANSMITTER /
RECEIVER
UART
RN12A
RN12B
J2-2
J1-2
J2-3
J1-3
J2-7
J1-7
J2-5
J1-5
R8
U5
J2-5
J2-8
J2-9
RS-422
DRIVER
RS-232
TRANSMITTER /
RECEIVER
MICROCONTROLLER
+5V
TEST +15V
TEST +15V
+ DOSE
DAP
CHAMBER
#1
- DOSE
OPTO
RELAY
GROUND
GROUND
R9
U38
U31
J2-4
DAP
CHANNEL 1
DS3
R7
DS29
R69
R71
DS32
J2-3
+5V
R5
+5V
SWITCHED +15V
+5V
R10
Q1
6
5
R11
JW1
DATA BUS
D0..D7
3
2
1
1
U8
D2
D6
4
3
+15V
Q8
+15V
Q7
GENERATOR CPU BOARD
J3-1
Q10
J3-6
R44
Q9
TP2
+5V
TP3
TB8
3
4
5
J4-1
J3-8
J3-9
RS-422
DRIVER
+5 AND +15 VOLT
REGULATORS
(U7, U4, L1, D4
D5, ETC)
+5V
1
2
U6
J3-5
TEST +15V
TEST +15V
+ DOSE
DAP
CHAMBER
#2
- DOSE
OPTO
RELAY
GROUND
GROUND
R15
TB7
R45
+5V
J3-4
DAP
CHANNEL 2
DS2
J4-2
J3-3
R5
2
+5V
R26
R25
1
J3-2
+5V
R14
+15V
R13
24 VDC
J3-7
SWITCHED +15V
+5V
R16
TP1
Q2
5
R17
3
JW2
4
3
2
1
6
1
U9
D7
5
D3
ROOM INTERFACE BOARD
4
3
DAP INTERCONNECT BOARD
DRAWN
G. SANWALD
CHECKED
M. LODER
DES.\MFG.\AUTH.
L. FOSKIN
DATE
16 JULY 2001
DAP
21 AUG 2001
28 AUG 2001
MD-0828 REV D
SHEET 1 OF 1
Use and disclosure is subject to the restrictions on the title page of this CPI document.
+5V
*
FOR RS-232: U1, U2, AND R16 ARE NOT FITTED.
FOR RS-422: U12, RN3C, RN3D, RN3A, AND RN3B
ARE NOT FITTED.
+5V
DS3
DS1
TXD
J5-1
J7-7
RXD (RS-232)
*
14 RN3C 3
2
15
J4-2
J11-18
J7-18
CTS (RS-232)
*
13 RN3D 4
4
13
* RN3A
1
3
14
* RN3B
2
5
12
J4-4
J11-6
J7-6
TXD (RS-232)
J5-5
J4-5
J11-17
J7-17
RTS (RS-232)
+5V
* U2
J11-11
J7-11
TXD- (RS-422)
7
J11-10
J7-10
TXD+ (RS-422)
6
C40
J11-13
J7-13
RXD- (RS-422)
7
J11-12
J7-12
RXD+ (RS-422)
6
J11-9
J7-9
R2
14
J16-1
12
13
R8
9
8
R10
FROM
RAD-ONLY
CONSOLE
(PAGE 2)
RS-422
I/P
1
* R16
+5V
J16-2
J16-3
J1
RS-232
3
7
J6-1
2
J6-2
8
ALTERNATE
CONSOLE
CONNECTIONS
+5V
3
14
6 RN12F 11
5
12
7 RN12G 10
2
15
8 RN12H 9
4
13
DS43
J2
RS-232
(LAPTOP)
R17
R8
RXD
U5
14
R5
10
7
R4
12
13
R3
8
R9
11
DATA BUS
D0..D7
THIS SHEET SHOWS THE CONSOLE BOARD FOR
INDICO 100 GENERATORS WITH THE 31 X 42 CM
CONSOLE. REFER TO PAGE 2 FOR INDICO 100
GENERATORS WITH THE 23 X 56 CM CONSOLE
AND THE RAD-ONLY CONSOLE.
9
3
J2
RS-232
7
3
TXD
2
7
RTS
8
2
RXD
8
CTS
5
RXD
TXD
U38
1 RN12A 16
3
14
2 RN12B 15
5
12
3 RN12C 14
2
15
4 RN12D 13
4
13
U31
+5V
DS32
DS29
RXD
TXD
R71
-12V
J6-4
TXD
DS43
+5V
RS-232
J6-3
DS44
DS44
U42
5 RN12E 12
5
+5V
R98
11
FPGA
C35
* U1
DUART
R69
RXD
DUART
Y2
U1
+5V
RS-422 4
O/P
R93
TXD
R19
1 Hz
SERIAL PORT FOR REMOTE
FLUORO CONTROL. REFER
TO MD-0766
DS42
R20
DS45
J4-3
RS-232
R72
R47
+5V
DS41
U18
J5-4
J5-3
U20
J11-7
15
+5V
U12
J4-1
16
R15
RXD
R18
CONSOLE
CABLE
RS-232
5
DATA BUS
D0..D7
OPTIONAL COMMUNICATIONS PORTS ARE SHOWN ON PAGE 2
GENERATOR INTERFACE
BOARD
GENERATOR CPU BOARD
CONSOLE BOARD (INDICO 100)
DRAWN
G. SANWALD
CHECKED
J. BARNES
DES.\MFG.\AUTH.
L. FOSKIN
DATE
13 DEC 2001
9 JAN 2002
9 JAN 2002
SERIAL
COMMUNICATIONS
MD-0829 REV G
SHEET 1 OF 2
Use and disclosure is subject to the restrictions on the title page of this CPI document.
COMMUNICATIONS PORTS SHOWN BELOW ARE OPTIONAL
+5V
*
FOR RS-232: U5, U9, JP2, AND R6 ARE NOT FITTED.
FOR RS-422: U6, RN4A, RN4C, RN4D AND R7 ARE
NOT FITTED.
DS16
+5V
TXD
J5-4
1 RS-422
I/P
7
J5-5
D3
U23
8
J5-3
5
2
RN2B
R5
1 Hz
2
3
*
RXD
Q4
*JP2
R6
RN2A
+5V
7
1
Q3
3
* U6
7
11
14
2
3
14
5 RN18C 6
5
12
7 RN18D 8
2
15
1 RN18A 2
4
13
8 RN17D 7
7
10
5 RN17C 6
6
11
J15
JP2 CLOSED FOR RS-422,
OPEN CIRCUIT FOR RS-232
*RN4A
3 RN18B 4
TP5
1
TXD
RXD
TXD
R65
RXD
RN16B
DS48
U28
CPU
RS-232
R94
D4
6
U50
3
TO GENERATOR
INTERFACE
BOARD (PG 1)
DS46
RN16A
J16
DS45
RN16D
J5-2
* U5
+5V
TP1
+5V
DS47
RN16C
J5-1
6
4 RS-422
O/P
7
D6
+5V
1 Hz
* U9
+5V
+5V
-12V
2
DATA BUS
D0..D7
8
9
CPU
13
*
6 RN4C 5
8
*RN4D
8
7
GENERATOR CPU BOARD
R7
RS-232
5
*
+3.3V
+5V
U21
+5V
DS1
RS-232
(LAPTOP)
Q1
Q2
U20
11
14
6 RN1C 5
10
7
4 RN1B 3
12
13
2 RN1A 1
9
8
8 RN1D 7
DATA BUS
D0..D7
RS-232
FPGA
3
TXD
7
RTS
2
RXD
8
CTS
DATA
BUFFER
5V-3.3V
+5V
DS5
RXD
R26
U11
R27
DATA
BUFFER
3.3V-5V
THIS AREA SHOWS THE CONSOLE CPU BOARD
FOR INDICO 100 GENERATORS WITH THE 23 X 56 CM
CONSOLE.
R28
DATA BUS
D0..D7
J8-1
J16-1
R24
J8-2
J16-2
J8-3
J16-3
TO GENERATOR
INTERFACE
BOARD (PG 1)
3
TXD
7
RTS
2
RXD
8
CTS
RS-232
(LAPTOP)
5
U14
CONSOLE BOARD (INDICO 100)
R23
J4
R25
U4
5
TP11
RS-232
+5V
DS4
TXD
TP10
U8
R21
RN2C
RXD
RXD
U14
J2
R22
RN2D
D1
TXD
DATA
BUFFER
3.3V-5V
D2
TXD
DS3
U4
1 Hz
+5V
DS2
R19
R11
-12V
+5V
R20
12
DATA
BUFFER
5V-3.3V
RS-232
THIS AREA SHOWS THE CONSOLE CPU BOARD FOR
INDICO 100 GENERATORS WITH RAD-ONLY CONSOLE.
CONSOLE BOARD (INDICO 100)
DRAWN
G. SANWALD
CHECKED
J. BARNES
DES.\MFG.\AUTH.
L. FOSKIN
DATE
13 DEC 2001
9 JAN 2002
9 JAN 2002
SERIAL
COMMUNICATIONS
MD-0829 REV G
SHEET 2 OF 2
Use and disclosure is subject to the restrictions on the title page of this CPI document.