Download LCD TV SERVICE MANUAL

Internal Use Only
website:http://biz.LGservice.com
LCD TV
SERVICE MANUAL
CHASSIS : LP81A
MODEL : 26LG30R
26LG30R-MA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range
3. Test method
This specification is applied to LP81A chassis.
(1) Performance : LGE TV test method followed
(2) Demanded other specification
Safety
: CE, IEC Specification
EMC
: CE, IEC
2. Requirement for Test
Each part is tested as below without special appointment.
(1) Temperature : 25 ± 5°C(77 ± 9°F), CST : 40 ± 5°C
(2) Humidity : 65% ± 10%
(3) Power : Standard input voltage (100-240V~, 50/60Hz)
* Standard Voltage of each products is marked by models.
(4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
(5) The receiver must be operated for about 20 minutes prior
to the adjustment.
4. General Specification(LCD Module)
Item
Specification
Measurement
Result
Remark
Display Screen Device
26” wide Color Display Module
Resolution:1366X768(HD)
32” wide Color Display Module
Resolution:1366X768(HD)
Aspect Ratio
16:9
LCD Module
Operating Environment
26” TFT WXGA LCD
26” HD MAKER :CMO
32” TFT WXGA LCD
32” HD MAKER :LPL CPT, CMO, AUO, SHARP
1) Temp. : 0 ~ 40 deg
LGE SPEC
2) Humidity : 0 ~ 85%
Storage Environment
1) Temp. : -20 ~ 60 deg
Input Voltage
100-240V~, 50/60Hz
Power Consumption
Power on (Blue) : LG30/LG50
2) Humidity : 0 ~ 85 %
Volume: 1/8 volume of sound distortion point
Power on (White) : LG60
≤ TBD
26” HD
≤ TBD
32” HD
St-By (Red) ≤ 1.0 W (All)
LCD Module
Maker
(Maker : AUO, CMO,
CMO(HD)
CPT, LPL, SHARP)
LPL(HD)
LG60:St-by Light condition
Inch
(H) x (V) x (D)
unit
Remark
[with inverter]
Outline Dimension
26”
626 x 373 x 43.7
mm
Pixel Pitch
26”
0.1405 x 0.4215
mm
Back Light
26”
12 CCFL
mm
Outline Dimension
32”
760 x 450 x 47.4
mm
Pixel Pitch
32”
0.17025 x 0.51075
mm
Back Light
32”
16 CCFL
mm
Outline Dimension
32”
760 x 450 x 48
mm
Pixel Pitch
32”
0.17025 x 0.51075
mm
Back Light
32”
12 EEFL
mm
Display Colors
Coating
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
[with inverter]
[with inverter]
3H, AG/ 2H, AG
-6-
LPL, CMO, AUO / Sharp
LGE Internal Use Only
5. Model Specification
Item
Specification
Remark
Market
Central and South America
Broadcasting system
PAL SECAM B/G/D/K, PAL I/II, NTSC-M
Available Channel
BAND
NTSC
VHF
2~13
UHF
14~69
CATV
1~125
Receiving system
Upper Heterodyne
Video Input (2EA)
NTSC, PAL-M/N
Rear 1EA, Side 1EA
AV Output (1EA)
NTSC, PAL-M/N
Rear
S-Video Input (1EA)
NTSC, PAL-M/N
Side (S-Video Priority)
Component Input (2EA)
Y/Cb/Cr, Y/ Pb/Pr
Rear
RGB Input (1EA)
RGB-PC, S/W Upgrade
Rear
HDMI-DTV, Only PCM MODE
LG30 Tool, 32LG60
HDMI Input
2EA
3EA
LG50, LG70 Tool
Audio Input (5EA)
PC Audio, Component (2EA), AV (2EA)
L/R Input
RS-232C
Remote control, Commercial
Side(1EA)-LG30 Tool only (LG50, LG60, LG70 not Support)
USB Input
Divx, MP3, JPEG
Side(1EA) - LG60, LG70 Tool Only (LG30, LG50 Not Support)
6. Component Video Input (Y, PB, PR)
Resolution
H-freq(kHz)
V-freq.(kHz)
Pixel clock(MHz)
720*480
15.73
59.94
13.500
SDTV, DVD 480I(525I)
Proposed
720*480
15.75
60.00
13.514
SDTV, DVD 480I(525I)
720*576
15.625
50.00
13.500
SDTV, DVD 576I(625I) 50Hz
720*480
31.47
59.94
27.000
SDTV 480P
720*480
31.50
60.00
27.027
SDTV 480P
720*576
31.25
50.00
27.000
SDTV 576P 50Hz
1280*720
44.96
59.94
74.176
HDTV 720P
1280*720
45.00
60.00
74.250
HDTV 720P
1280*720
37.50
50.00
74.25
HDTV 720P 50Hz
1920*1080
28.125
50.00
74.250
HDTV 1080I 50Hz,
1920*1080
33.72
59.94
74.176
HDTV 1080I
1920*1080
33.75
60.00
74.25
HDTV 1080I
1920*1080
56.25
50
148.5
HDTV 1080P
1920*1080
67.432
59.94
148.350
HDTV 1080P
1920*1080
67.5
60.00
148.5
HDTV 1080P
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
-7-
LGE Internal Use Only
7. RGB Input (Analog PC)
Resolution
H-freq(kHz)
V-freq.(kHz)
Pixel clock(MHz)
640*350
31.468
70.80
25.17
EGA
Proposed
720*400
31.469
70.08
28.32
DOS
640*480
31.469
59.94
25.17
VESA(VGA)
800*600
37.879
60.31
40
VESA(SVGA)
1024*768
48.363
60
65
VESA(XGA)
1280*768
47.776
59.87
79.5
VESA(WXGA)
1360*768
47.72
59.799
84.75
VESA(WXGA)
Remark
1366*768
47.7
60
84.62
VESA(WXGA)
1280*1024
63.668
59.895
109.00
SXGA
1400*1050
65.317
59.978
121.75
SXGA
Only FHD
1600*1200
74.537
59.869
161.00
UXGA
Only FHD
1920*1080
66.587
59.934
138.50
WUXGA(Reduced Blanking)
Only FHD
Only FHD
8. HDMI input (PC)
- Spec. out but display correctly at only HDMI/DVI IN 1 via DVI to HDMI Cable
Resolution
H-freq(kHz)
V-freq.(kHz)
Pixel clock(MHz)
Proposed
720_400
31.468
70.08
28.32
640_480
31.469
59.94
25.17
VESA(VGA)
800_600
37.879
60.31
40.00
VESA(SVGA)
1024_768
48.363
60.00
65.00
VESA(XGA)
1280_768
47.776
59.87
79.5
VESA(WXGA)
1360_768
47.72
59.799
84.62
VESA(WXGA)
VESA(WXGA)
Remark
1366_768
47.7
60
84.62
1280_1024
63.595
60.0
108.875
SXGA
1400_1050
65.160
60.0
122.50
SXGA
Only FHD
1600_1200
74.077
60.0
130.375
UXGA
Only FHD
1920_1080
66.647
59.988
138.625
WUXGA
Only FHD
Only FHD
9. HDMI input (DTV)
Resolution
H-freq(kHz)
V-freq.(kHz)
Pixel clock(MHz)
720*480
31.47
59.94
27
SDTV 480P
Proposed
Remark
Support(not spec)
720*480
31.5
60
27.027
SDTV 480P
support(not spec)
720*576
31.25
50
27
SDTV 576P
support(not spec)
1280*720
44.96
59.94
74.176
HDTV 720P
1280*720
45
60
74.25
HDTV 720P
1280*720
37.5
50
74.25
HDTV 720P
1920*1080
28.125
50
74.25
HDTV 1080I
1920*1080
33.72
59.94
74.176
HDTV 1080I
1920*1080
33.75
60
74.25
HDTV 1080I
1920*1080
56.25
50
148.5
HDTV 1080P
1920*1080
67.432
59.94
148.350
HDTV 1080P
1920*1080
67.5
60.00
148.5
HDTV 1080P
1920*1080
27
24
74.25
HDTV 1080P
1920*1080
33.75
30
74.25
HDTV 1080P
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
-8-
LGE Internal Use Only
ADJUSTMENT INSTRUCTION
(2) Click the connect button and confirm “Dialog Box”.
1. Application Range
This spec. sheet is applied all of the 32/37/42/47/52” LCD TV,
LP81A chassis (HURRICANE 5) by manufacturing LG TV
Plant all over the world.
2. Specification
1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
2) Adjustment must be done in the correct order.
3) The adjustment must be performed in the circumstance of
25±5°C of temperature and 65±10% of relative humidity if
there is no specific designation.
4) The input voltage of the receiver must keep 100-220V,
50/60Hz.
5) Before adjustment, execute Heat-Run for 15 minutes at RF
no signal.
(3) Click the Config button and Change speed
E2PROM Device setting : over the 350Khz
3. S/W program download
3-1. Preliminary steps
(1) Download method 1 (PCB Assy)
- HD
(4) Read and write bin file
Click “(1)Read” tab, and then load download file(XXXX.bin)
by clicking “Read”.
(1)
- FHD
f i l ex x x .bi n
(5).Click “Auto(2)” tab and set as below
(6).click “Run(3)”.
(7).After downloading, check “OK(4)” message.
(2) Connect the download jig to D-sub jack
3-2. Download steps
(1) Execute ‘ISP Tool’ program in PC, then a main window will
be opened
(2)
f i l ex x x .bi n
(4) .......... OK
(3)
Double click
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
-9-
LGE Internal Use Only
(1) Confirmation
- We confirm whether “0xF1 (offset), 0xF2 (gain)” address
of EEPROM “0xBC” is “0xAA” or not.
- If “0xF1”, “0xF2” address of EEPROM “0xBC” isn’t “0xAA”,
we adjust once more
- We can confirm the ADC values from “0x00~0x05”
addresses in a page “0xBC”
* Manual ADC process using Service Remocon. After enter
Service Mode by pushing “ADJ” key, execute “Auto-RGB”
by pushing “_” key at “Auto-RGB”.
## USB DOWNLOAD
1) Put the USB Stick to the USB socket
4-2. Component input ADC
(1) Component Gain/Offset Adjustment7
- Convert to Component in Input-source
- Input the Component ( Which has 720p@60Hz YPbPr
signal : 100% Color Bar (MSPG-925F Model: 217/
Pattern: 65 ) into Component.
2) Automatically detecting update file in USB Stick
- Adjust by commanding AUTO_COLOR_ADJUST (0xF1)
0x00 0x02 instruction
3) Select “Start” Button and press “ok” button
Updating is staring.
(2) Confirmation
- We confirm whether “0xF3 (offset), 0xF4 (gain)”
address of EEPROM “0xBC” is “0xAA” or not.
- If “0xF3”, “0xF4” address of EEPROM “0xBC” isn’t
“0xAA”, we adjust once more.
- We can confirm the ADC values from “0x06~0x0B”
addresses in a page “0xBC”.
* Manual ADC process using Service Remocon. After
enter Service Mode by pushing “ADJ” key, execute
“Auto-RGB” by pushing “_” key at “Auto-RGB”.
4) Finishing the version updating, you have to put out USB
stick and “AC Power” off.
5) After putting “AC Power” on and check updated version
on your TV.
** TOOL Option, Area Option change and AC off
Before PCBA check, you have to change the Tool option, Area
option and have to AC off/on (Plug out and in)
(If missing this process, set can operate abnormally)
5. TOOL Option, Area Option change
4. ADC Process
(1) Profile : Must be changed the option value because being
different with some setting value depend on module maker,
inch and market.
(2) Equipment : adjustment remote control.
(3) Adjustment method
The input methods are same as other chassis.(Use INSTART Key on the Adjust Remocon.)
(If not changed the option, the input menu can differ the
model spec.)
* Refer to Job Expression of each main chassis ass’y
(EBTxxxxxxxx) for Option value
* Required Equipments
- Remote controller for adjustment
- MSPG-925F Pattern Generator
4-1. Method of Auto RGB Color Balance
- Convert to RGB PC in Input-source
- Input the PC 1024x768 @ 60Hz 1/2 Black & White
Pattern(MSPG-925F model:60, pattern:54) into RGB.
- Adjust by commanding AUTO_COLOR_ADJUST(0xF1) 0x00
0x02 instruction.
* Never push the IN-STOP KEY after completing the function
inspection.
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 10 -
LGE Internal Use Only
- Detail EDID Options are below (A, B, C, D, E, F)
A. Product ID
B. Serial No: Controlled on production line
C. Month, Year: Controlled on production line:
ex) Monthly: ‘09 ‘09
Year: ‘2007 Ë ‘11’
D. Model Name(Hex):
6. EDID (The Extended Display Identification Data )
/DDC (Display Data Channel) download
* Caution
Use the proper signal cable for EDID Download
6-1. EDID DOWNLOAD
* Caution:
- Never connect HDMI & D-SUB Cable at the same time.
- Use the proper cables below for EDID Writing
For RGB EDID
Model name
Model Name(HEX)
LG TV
00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
E Checksum: Changeable by total EDID data
For HDMI EDID
6-2. HDCP SETTING
(High-Bandwidth Digital Contents Protection)
- Connect D-sub Signal Cable to D-Sub Jack
- Input HDCP key with HDCP-key- in-program
- HDCP Key value is stored on EEPROM(AT24C64) which is
From “0x80” addresses of 0xA0 page
- AC off/ on and on HDCP button of MSPG925 and confirm
whether picture is displayed or not of using MSPG925
- HDCP Key value is different among the sets.,
* EDID Data
Item
Condition
Data
Manufacturer ID
GSM
1E6D
Version
Digital : 1
01
Revision
Digital :3
03
7. Adjustment of White Balance
7-1. Purpose and Principle for adjustment
of the color temperature
- Purpose : Adjust the color temperature to reduce the
deviation of the module color temperature.
- Principle : To adjust the white balance without the saturation,
Fix the one of R/G/B gain to C0 and decrease the others.
* LP81A HD Model EDID
<Analog : 128bytes>
B
A
C
7-2. Adjustment mode : Two modes of Cool
and Warm
D
D
(Medium data is automatically calibrated by the Cool data)
E
* Required Equipment
- Remote controller for adjustment
- Color Analyzer : CA100+ or CA-210 or same product (ch:9)
- Auto W/B adjustment instrument(only for Auto adjustment)
7-3. Connecting diagram of equipment for
measuring (For Automatic Adjustment)
<HDMI 1 : 256bytes> / <HDMI 2 : 256bytes>
The data is same without Physical address
A
B
C
D
D
E
F
-> Physical address(F) : HDMI 1 -> 10, HDMI 2 -> 20
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 11 -
LGE Internal Use Only
(1) Enter the adjustment mode of DDC
- Set command delay time : 50ms
- Enter the DDC adjustment mode at the same time heatrun mode when pushing the power on by power only key
- Maintain the DDC adjustment mode with same condition
of Heat-run (Maintain after AC off/on in status of Heat-run
pattern display)
(3) x > target , y < target
1) First decrease B, so make y a little more than the
target.
2) Adjust x value by decreasing the R
(4) x < target , y > target
1) First decrease B, so make x a little more than the
target.
2) Adjust x value by decreasing the G
(2) Release the DDC adjustment mode
- Release the adjust mode after AC off/on or std-by off/on
in status of finishing the Hear-run mode
- Release the Adjust mode when receiving the aging off
command(F3 00 00) from adjustment equipment
- Need to transmit the aging off command to TV set after
finishing the adjustment.
- Check DDC adjust mode release by exit key and release
DDC adjust mode
(3) Enter the adjust mode of white balance
- Enter the white balance adjustment mode with aging
command(F3, 00, FF)
- Standard color coordinate and temperature when using the
CA100+ or CA210 equipment
Mode
Color coordinate
Temp
∆uv
X
Y
Cool
0.276±0.002
0.283±0.002
11,000K 0.000
Warm
0.313±0.002
0.329±0.002
6,500K
0.003
** DDC Command set **
* Luminance min value is 200cd/m2≥ in the cool mode (For LCD)
Adjustment
CMD(HEX) ADR
Aging On/Off
F3
00
Input select
F4
00
VALUE
FF/00
detail
FF : ON / OO : OFF
0x10 : TV
0x20 : AV1
7-4. Adjustment of White Balance
0x21 : AV2
(for Manual adjustment)
(1) Adjustment mode : Two modes (Cool and Warm)
(Medium data is automatically calibrated by the Cool data)
(2) Color analyzer(CA100+, CA210) should be used in the
calibrated ch by CS-1000(LCD : CH9, PDP : CH10)
(3) Operate the zero-calibration of the CA100+ or CA-210,
then stick sensor to the module when adjusting.
(4) For manual adjustment, it is also possible by the following
sequence.
1) Select white pattern of heat-run by pressing “POWER
ON” key on remote control for adjustment then operate
heat run longer than 15 minutes. (If not executed this
step, the condition for W/B may be different.)
2) Push “Exit” key.
3) Change to the AV mode by remote control.(Push frontAV or Input key)
4) Input external pattern(85% white pattern)
5) Push the ADJ key two times (entering White Balance
mode)
6) Stick the sensor to the center of the screen and select
each items (Red/Green/Blue Gain and Offset) using
D/E(CH +/-) key on R/C.
7) Adjust R/ G/ B Gain using F/G(VOL +/-) key on R/C.
8) Adjust two modes (Cool and Warm)
(Fix the one of R/G/B and change the others)
9) When adjustment is completed, Exit adjustment mode
using EXIT key on R/C.
0x40 : Component1
0x41 : Component2
0x60 : RGB
0x90 : HDMI1
0x91 : HDMI2
R GAIN
16
G GAIN
00
00 - C0
GAIN adjustment
18
00 - C0
CSM COOL
B GAIN
1A
00 - C0
R GAIN
16
00 - C0
GAIN adjustment
G GAIN
18
00 - C0
CSM NORMAL
B GAIN
1A
00 - C0
R GAIN
16
00 - C0
GAIN adjustment
G GAIN
18
00 - C0
CSM WARM
B GAIN
1A
00 - C0
CSM mode
F2
AUTO ADC
F1
01
02
00
00
00
COOL
01
NORMAL
02
WARM
0, 1, 2
0: Offset adjustment
1: Gain adjustment
2: Offset and Gain adjustment
EEPROM Read
E7
00
00
EEPROM read
EEPROMWrite
E8
00
data
EEPROM write
* CASE
First adjust the coordinate far away from the target value(x, y).
(1) x, y > target
1) Decrease the R, G.
(2) x, y < target
1) First decrease the B gain,
2) Decrease the one of the others.
- In case of decreasing the x, decreasing the R : fix G
- In case of decreasing the y, decreasing the G : fix R
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 12 -
LGE Internal Use Only
8. DDC command protocol
8-1. Signal TABLE
VAL
8-2. E2PROM Data Write
(1) Signal TABLE
Delay 20m
LEN : 84h+Bytes
CMD : E8h
ADH : E2PROM Slave Address (A0,A2,A4,A6), Not 00h
(Reserved by BufferToEEPROM)
ADL : E2PROM Sub Address(00~FF)
Data : Write data
Delay : 20ms
(2) Command Set
Adjustment contents
CMD(hex)
EEPROM WRITE
E8h
LEN
Details
94
16-Byte Write
(84+n)h
n-byte Write
* Purpose
1) EDID write : 16-byte by 16-byte, 8 order (128-byte)
write(TO “00 – 7F” of “EEPROM Page A4”).
2) FOS Default write : 14-mode data write
(SyncFlags, HPeriodH, HPeriodL, VtotalH, VtotalL,
SrcHTotalH, SrcHTotalL, SrcHStartH, SrcHStartL,
SrcVStartH, SrcVStartL, HsyncPhase).
3) Random Data write : write the appointment Address of
E2PROM.
(3) E2PROM Data Read
1) Signal TABLE
Delay 150ms
128 Bytes
2) COMMAND SET
Adjustment contents CMD(hex) ADH(hex) ADL(hex)
EEPROM READ
E7
A0
A2
A4
A6
0
Details
0-Page 0~7F Read
80
0-Page 80~FF Read
0
1-Page 0~7F Read
80
1-Page 80~FF Read
0
2-Page 0~7F Read
80
2-Page 80~FF Read
0
3-Page 0~7F Read
80
3-Page 80~FF Read
* Purpose : To read(84h) the appointment Address of E2PROM
by 128(80h)-byte
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 13 -
LGE Internal Use Only
TROUBLESHOOTING
1. No power
(1) Symptom
1) It is not discharged minutely from module.
2) Light does not come into the front LED.
(2) Check process
Is the power cord
plugged in?
No
Plug in the power cord.
Yes
Are the line filter and
PSU connected?
No
Connect the cable.(SC100)
Yes
Is the fuse of PSU
normal? (F101)
No
Replace the fuse.
Yes
Is it connected
that PSU and P1100
in Main B/D?
No
Connect a cable P1100.
Yes
After all cables connect is removed to PSU, the
AC voltage marking is authorized on manual.
When ST-BY 5V is not operated. replace PSU.
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 14 -
LGE Internal Use Only
2. No Raster
(1) Symptom
1) No OSD and image occur at screen.
2) It maintains the condition where the front LED is green.
(2) Check process
Does
minute discharge
at Module?
No
Is output the normality
Low/High voltage except
Stand-by 5V?
No
Is the inverter
/ VaVs on?
Replace the
Power board.
Yes
Yes
Is the link cable
normal?
Check the LCD Module
No
Reconnect Panel line cable.
(HD : P403, FHD : P402)
Yes
Is the IC801’s
output normal?
No
Replace the VSC.
3. Unusual display from RF mode
Is
video output of the
Tuner normal? (Check
TU500_Pin13)
No
Is the
input voltage
normal?(Check
Pin3)
No
Yes
Yes
Is the I2C communication normal?
(Check Pin9, Pin10)
No
Check the power.
Check the Tuner.
Block A
Is the LVDS
Cable connected?
well
No
Cable inserts well.
Yes
Change the IC(IC801)
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 15 -
LGE Internal Use Only
4. Unusual display from rear AV mode.
Is video input of
the A/V Jack normal?
(Check R8044)
No
Check the input source.
Yes
Same as Block A.
5. Unusual display from Side AV model.
Is video input of
the Side A/V Jack normal?
(Check R8043)
No
Check the input source.
Yes
Same as Block A.
6. Unusual display from Side S-Video mode.
Is video input of
the S-Video Jack normal?
(Check R8041/42)
No
Check the input source.
Yes
Same as Block A.
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 16 -
LGE Internal Use Only
7. Unusual display from component 1 mode
Is video
input of the Com1
Jack normal? (Check
R8011/12/13)
No
Check the input source.
Yes
Change IC801.
8. Unusual display from component 2 model
Is video
input of the Com2
Jack normal? (Check
R8030/32/33)
No
Check the input source.
Yes
Change IC801.
9. Unusual display from RGB model
Is video
input of the Com2
Jack normal? (Check
R8035/37/39)
No
Check the input source.
Yes
Change IC801.
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 17 -
LGE Internal Use Only
10. No Sound
(1) Symptom
1) LED is green
2) Screen display but sound is not output.
(2) Check process
No
All input(mode)
is no sound.
Is the speaker
on it menu?
Yes
All input(mode)
is no sound.
Set on speaker
in menu.
Yes
No
Download the
EDID data.
Is the speaker
cable normal?
Yes
Only AV/COM2/PC
input is no sound.
No
No
Check the Speaker
cable.
Yes
No
No
Is the output of
IC600 normal?
Replace IC600
Yes
Check the signal after
IC600 refer to circuit
diagram.
Yes
No
Replace IC801
Yes
No
Only RF is no sound.
Is IC801 operated
normality?
Check the Tuner In/Out.
Is IC601 operated
normality?
No
Replace IC601
Yes
Replace Main B/D.
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 18 -
LGE Internal Use Only
LINE IN
MAIN NVM
SIF IN
CVBS IN
AV1 in
LINE IN
x0.55
PART_I2C
CVBS OUT
AV out
Y/Pb/Pr IN
Comp1 in
Y/Pb/Pr IN
LINE IN
x0.55
LINE IN
x0.55
Comp2 in
LINE OUT
R/G/B/HS/VS IN
DISPLAY MODULE
S_VIDEO_DET
MC74HC4066
Audio SW
x0.55
LINE IN
LINE_MUTE
Mstar
Romeo
LGE6891CD
AUDIO_SW
LINE IN
ROM_I2C
- 19 -
DSUB_DDC
x0.55
Rx/Tx
LINE IN
MX3232
UART_Rx/Tx
PART_I2C
TMDS(HDMI in)
HDMI1
DDC
HDMI2
EDID NVM
TMDS(HDMI in)
DDC/HPD/CEC
HDMI3
LVDS
EDID NVM
PC Audio
in
RS-232C
LM324
X4 AMP
SERIAL
FLASH
CVBS IN
Y/C IN
SideAV in
(AV2 in)
RGB in
(D/L)
x4
LINE OUT
LINE_MUTE
DDR MEM
DDC/HDP/CEC TMDS351PAG
HDMI MUX
DDC
DDC/HPD/CEC
BD2041
Protect IC
TMDS(HDMI in)
DDC/HPD/CEC
[CEC not through HDMI MUX, direct JACK to MAIN IC]
I2S OUT
DDC
NTP3000A
Digital
Audio AMP
PART_I2C
SW_RESET
656 IN
x4
EDID NVM
USB(AV I/O, Data I/O)
+5V
SW_RESET
EDID NVM
TMDS(HDMI in)
USB
HDMI_SEL
Zoran
VADDIS-966XD
MPEG Decoder
MPEG RX/TX
MPEG RESET
I2S IN
656 IN
LGE Internal Use Only
DDR MEM SERIAL
FLASH
CVBS OUT
TW9910
Sub Decoder
BLOCK DIAGRAM
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
TUNER_I2C
CVBS IN
RF
(Tuner)
800
400
200
804
830
901
902
900
903
LGE Internal Use Only
905
EXPLODED VIEW
- 20 -
904
122
401
910
120
550
805
801
821
802
521
530
803
540
510
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
300
500
INPUT1 : COMP1/2,RS232C,PC
COMPONENT2
JK101
R146
0
3E
[RD]CONTACT
R138
10K
R148
0
3E [RD]O_SPRING
COMP2_R
C113
1000pF
READY
R119
220K
D115
5.6V
RS-232C
*ONLY LG30
COMPONENT1
JK100
PPJ209-02
PPJ209-02
[RD]O_SPRING
INPUT2 : CVBS,SIDE AV
D103
R139
12K
COMP1_R
C115
1000pF
READY
R106
220K
5.6V
4E[RD]CONTACT
R134
10K
CVBS
+5V_ST
R135
12K
JK200
10
PPJ148-10
5
4E
2E [RD]1P_CAN2
[RD]1P_CAN2
RS232C
C110
0.1uF
IC101
MAX3232CDR
2E
R140
10K
R147
0
[WH]C_LUG_L
5D
[WH]1P_CAN
D116
R120
5.6V
220K
5D [WH]C_LUG_L
COMP2_L
C114
1000pF
READY
2D [WH]1P_CAN
12K
D104
R108
5.6V
220K
C109
0.1uF
R136
10K
R149
0
R141
C116
1000pF
READY
C1+
COMP1_L
R137
V+
C107
0.1uF
12K
C1-
2D
[RD]C_LUG_L
5C [RD]C_LUG_L
COMP2_Pr
5C
COMP1_Pr
R121
D117
30V
SD05
[RD]1P_CAN1
C2+
2C [RD]1P_CAN1
C106
0.1uF
R109
75
D105
75
SD05
C2-
1
2
15
3
14
4
13
5
12
6
11
7
10
8
9
IR_OUT
VCC
16
2C
PPJ218-01
8
DOUT1
R130
100
RIN1
R131
100
ROUT1
R128
DIN1
R129
[YL]O_SPRING
4A
READY
7
D121
CDS3C30GTH
30V
C112
OPT
SIDE_V
3
D120
CDS3C30GTH
30V
C111
OPT
5B
[YL]CONTACT
4B
[YL]O_SPRING
2B
[YL]1P_CAN
JK204
4
GND
100
V-
SIDE AV
9
2
5A
[YL]CONTACT
2A
[YL]U_CAN
3B
[WH]C_LUG
2B
[WH]U_CAN
4C
[RD]O_SPRING
5C
[RD]CONTACT
2C
[RD]U_CAN
D214
SD05
C213
0.1uF
16V
R241
75
3
[WH]C_LUG_L
2
[WH]1P_CAN
R210
0
D201
SD05
R222
0
R218
D202
5.6V
R209
220K
C211
100pF
50V
OPT
R212
220K
C212
100pF
50V
OPT
100
[BL]C_LUG_L
5B [BL]C_LUG_L
COMP2_Pb
5B
2B [BL]1P_CAN
RIN2
R110
75
D106
75
DOUT2
COMP1_Pb
R122
D118
30V
SD05
[BL]1P_CAN
C108
0.1uF
SD05
6
DIN2
+3.3V_MST
ROUT2
R251
0
10K
R247
1
+5V_ST
D215
5.6V
C214
100pF
50V
READY
R242
220K
SIDE_LIN
5A
[RD]CONTACT
4A
[RD]O_SPRING
2A
[RD]1P_CAN
CVBS_VIN
C207
OPT
R208
75
10K
CVBS_LIN
R219
12K
R248
12K
R223
0
10K
R220
CVBS_RIN
2B
[GN]O_SPRING
3A [GN]O_SPRING
COMP2_Y
3A
[GN]CONTACT
D119
30V
SD05
4A
SDC 15 applying check
4A[GN]CONTACT
75
R150
4.7K
READY
COMP1_Y
R123
D107
R111
SD05
75
KCN-DS-1-0088
TXD
MAIN : EAN41348201(TI)
SUB : 0IMCRSG010A(STM)
R252
0
R249
10K
SIDE_RIN
JK103
RXD
*RS232C TX
2A [GN]1P_CAN
[GN]1P_CAN
R151
4.7K
READY
D216
5.6V
C215
100pF
50V
READY
R244
220K
D204
5.6V
R221
12K
R250
12K
2A
JK201
R213
0
PPJ200-01
JK205
PSJ015-02
3
**MULTI ITEM
6
C
AC
A
C102
0.1uF
R116
75
DSUB_SDA
D114
68
D112
30V
B_TERMINAL1
V_SYNC
C104
68pF
R114
GND_1
RT1C3904-T112
R211
0
OPT
R237
1K
2
OPT
D209
1
5.6V
OPT
C217
100pF
50V
AUDIO_R
C209
MNT_ROUT
10uF
OPT
R230
16V
C
470K
B
C210
OPT
READY
MUTE_LINE
OPT
Q202
POP NOISE
D122
R132
5.6V
CDS3C05GTA
220K
R143
10K
R214
0
PC_AUD_R
1000-ohm
SPK_R+_HOTEL
R142
12K
4
R_SPRING
5
T_SPRING
L101
D123
R133
5.6V
7B
B_TERMINAL2
6B
T_TERMINAL2
R144
10K
1000-ohm
PC_AUD_L
R145
220K
12K
CDS3C05GTA
R118
75
68
R112
4.7K
D110
30V
CDS3C30GTH
SYNC_GND
PC_VS
+5V_ST
C103
68pF
IC100
DDC_CLOCK
15
L100
PC_HS
PC_B
R113
4.7K
CDS3C30GTH
14
B
OPT
Q203
PC_G
R115
NC
5
T_TERMINAL1
7A
R117
75
H_SYNC
10
470K
30V
BLUE
4
16V
E
S_VIDEO_DET
MNT_LOUT
10uF
C
3
C_LUG_L_1
O_SPRING
OPT
C208
OPT
R229
E
6A
CDS3C30GTH
BLUE_GND
9
5.6V
OPT
C216
100pF
50V
RT1C3904-T112
GREEN
13
4
SIDE_C
SHIELD
7
E_SPRING
3
PC_R
DDC_DATA
12
OPT
D208
R246
75
D218
SD05
D219
SD05
RED
8
3
C_LUG_S_1
R245
75
PEJ024-01
GREEN_GND
2
C_LUG_L_2
4B
5
GND_2
11
7
C_LUG_S_2
4C
JK102
RED_GND
1
4D
4A
D111
ENKMC2837-T112
C
A
AC
AC
6630TGA004K
C101
0.1uF
D109
ENKMC2837-T112
C
KCN-DS-1-0089
A
JK104
D108
ENKMC2837-T112
C100
0.1uF
PC SOUND
1.24C02-SUB:0IMMRAL014D
2.ENKMC2837-SUB:0DS226009AA
(KDS226)
+5V_MULTI
PC
SPK_R-_HOTEL
OPT
R236
1K
5
SIDE_Y
D217
SD05
GROUND
SHIELD_PLATE
8
AT24C02BN-10SU-1.8
DSUB_SCL
DDC_GND
D113
A0
30V
1
8
2
7
3
6
4
5
R126 R127
4.7K 4.7K
VCC
C105
0.1uF
CDS3C30GTH
A1
WP
16 SHILED
A2
GND
SCL
R124
100
SDA
R125
100
DSUB_SCL
DSUB_SDA
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
HDMI
A2
KDS184
A1
GND
4
5
C
SDA
R348 100
10 CLK+
DATA0-
8 DATA0_SHIELD
7 DATA0+
DATA1-
5 DATA1_SHIELD
4 DATA1+
DATA2-
2 DATA2_SHIELD
DATA2+
20 JACK_GND
21
TMDS2_RXC+
TMDS2_RXCDDC_SCL2
DDC_SDA2
HPD_S/W_2
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright C 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
A
0
A2
A1
VDD
49
22
HPD2
51
50
39
A11
A33
11
38
B11
VCC_2
12
37
SCL1
B34
13
36
SDA1
C316 0.01uF
R423
TMDS1_RX1+
TMDS1_RX1-
8
9
10
5
R408
0
FHD 8BIT:NC
TXCE0+
TXCE0-
6
7
8
9
10
11
12
TXCE0+
R428
13
14
TXCE1+
TXCE2-
15
16
TXCE2+
TXCE2-
15
16
TXCE2+
17
18
TXCLKE+
19
20
TXCE3+
21
22
TXCE4+
23
24
25
26
27
28
29
30
TXCO2-
31
32
TXCO2+
TXCLKO-
33
34
TXCLKO+
TXCO3-
35
36
TXCO3+
TXCO4-
37
38
TXCO4+
39
40
FHD 8BIT:NC
TXCO1-
TXCLKE-
NC
R431
READY
FHD 8BIT:NC
17
TXCE3-
0
20
22
23
24
25
26
CPT
LPL
32 sharp
R428
O
X
X
TXCLKE+
18
19
21
CPT
0
TXCE3+
NC
R432 0
READY
TXCO0+
+3.3V
TXCO1+
10BIT except for 52 sharp R401
4.7K
R402
8BIT or 52 sharp
0
R401
4.7K
10BIT
X
8BIT(HD)
X
8BIT(FHD)
X
52 sharp
32 sharp
X
R402
X
0
0
0
X
HD
FHD
SCL_LED
0
+3.3V_MST
SDA_LED
USE LG50_60_70
BG1608B501F
L410
BEAD_USE LG50_60_70
TMDS1_RX0+
TMDS1_RX0C315
R379 22
A34
14
35
HPD1
R368
0
GND_3
34
EQ
READY
15
VSADJ
16
33
S2
22
4.7K
KEY1
L406
EAM38769502
C412
USE LG50_60_70
TMDS1_RXC+
TMDS1_RXCDDC_SCL1
DDC_SDA1
HPD_S/W_1
+3.3V_HDMI_SW
R374
2
3
4
L407
120OHM
C404
470pF
470pF
C411
C408
0.1uF
0.1uF
R404
R347 R350
0
0
R355 R356
0
0
32
R366
4.7K
READY
Q406
LG60
PNP
L404
120OHM
R413
3.3K
R425
0
7
IR
*TI Recommand
8
IR-OUT
R440
10K
R371
47K
LG60
+5V_ST_SW
-> Pull up
9
HDMI_SEL2
IR-OUT
R441
10K
IR-OUT
L402
10
C
R439
47K
B
EAM38769502
C407
11
X
X
3.3K
X
R445 Q406 L410 L411 L407
X
X
X
X
X
BEAD BEAD BEAD
X
X
O
BEAD BEAD BEAD
3.3K
BEAD BEAD BEAD
X
X
C414
X
22uF
22uF
22uF
R414
X
X
10K
X
C
IR-OUT
R442
IR-OUT
22
**MULTI ITEM
2SC3052(P/N:0TRIY80001A) RA:2SC3875(P/N:0TR387500AA)
C
B
IR_OUT
Q404
2SC3052
C402
Q405
2SC3052
OPT
READY
E IR-OUT
E
OPT
LG60
47pF
L400
C400
10K
SPK-N* L G 6
Sound module output
R403
10K READY
BG1608B121F
14
R444
C403
13
R360
4.7K
READY
R404
O
O
X
O
+5V_ST
R443
10K
IR-OUT
R414
+3.3V
R445
3.3K
B
LG30
LG50
LG60
LG70
LG60
R444
3.3K
LED_R_PWM_Big
EYEQ_RESET
READY
+3.3V_MULTI_MST
+3.3V
E
6
12
R357 R358
0
0
0
UBW2012-121F
C406
22uF
16V
+5V_ST
R345 R346
0
0
R405
0
NOT LG60
UBW2012-121F
USE LG50_60_70
C414
22uF
16V
5
4.7K
R375
4.7K
READY
+5V_ST
KEY2
+3.3V_MST
1
0.01uF
R380
R421
R420
L403
EAM38769502 4.7K
BG1608B121F
12505WS-15A00
5.6B
ZD402
USE LG50_60_70
10
.
JK301
QJ41193-FEE2-7F
READY
R381
SDA2
R369
0
22
R382
B21
53
52
SCL2
C
TMDS2_RX1+
TMDS2_RX1-
TMDS2_RX0+
TMDS2_RX00.01uF
C314
VCC_7
B22
A24
HPD3
A21
54
55
62
64
VCC_5
R361
1
40
EAM38769502
LED_G
0.1uF
15
HDMI_SEL1
R365
READY 0
L401
16
C401
EAM38769502
NOT LG60
NOT LG60
Q402
470pF
NOT LG60
+5V_ST
R434
10K
NOT LG60
Q403
KRC102S
NOT LG60
E
R410
E
100
2SA1530A-T112-1R
NOT LG60
B
AC_DET
R409
C
3.3K
R417
READY
C
HDMI_SCL
HDMI_SDA
3
HDMI1_5V_DET
9
HDMI_C+
HDMI_C-
6
R325
10K
0.01uF
R372
4.7K
1%
R324
10K
41
GND_2
HDMI_0+
HDMI_0-
9
8
B12
31
11 CLK_SHIELD
+5V_HDMI_1
R438
HD 0
6
7
TXCLKO+,TXCLKO-,TXCO0+,TXCO0-,TXCO1+,TXCO1-,TXCO2+,TXCO2-,TXCO3+,TXCO3-,TXCO4+,TXCO4BEAD_USE LG50_60_70
L411
USE LG50_60_70
BG1608B501F
R422
0
P400
A32
30
CLK-
C308
TMDS1_RX2+
TMDS1_RX2-
S1
JP1120
CEC
TMDS1_RXCTMDS1_RXC+
TMDS1_RX0TMDS1_RX0+
TMDS1_RX1TMDS1_RX1+
TMDS1_RX2TMDS1_RX2+
A12
HDMI_1+
HDMI_1-
12
DDC_SDA1
DDC_SCL1
SCL
14 NC
GND_6
42
IC302
TMDS351PAG
HPD_SINK
JP1119
16 SDA
15
13 CEC
43
7
B33
TMDS3_RX1TMDS3_RX1+
TMDS3_RX2TMDS3_RX2+
6
B32
SDA_SINK
R320 100
VCC_1
4.7K
SDA
18 +5V_POWER
17 DDC/CEC_GND
B13
4.7K
5
R321 100
A13
44
R362
6
4
SCL
VCC_6
45
5
29
3
WP
0.01uF
46
4
28
GND
19 HPD
TMDS3_RX0TMDS3_RX0+
C300
50V
R326 R327 0.01uF
47K 47K
C309
3
B31
A31
GND_5
22
7
GND_1
SCL_SINK
.
2
VCC
B14
27
A2
8
24
26
TXCE1-
L410-*1 0
A14
47
26
A1
1
22
23
25
TXCE1+
R_USE LG50_60_70
L411-*1 0
48
25
A0
21
4
R415
0
READY
2
Z1
2SC3875S
20
2
3
14
TXCO0-
R424
0
HD
18
19
1
13
+3.3V_HDMI_SW
R373
0
1
HDMI_2+
HDMI_2-
E
16
4
TXCE1-
TXCE3-
KDS184
SCL3
Y1
RT1C3904-T112
14
15
2
12
R407
4.7K
FHD
D305
KDS184S
SDA3
19
IC300
AT24C02BN-10SU-1.8
B
13
3
11
TXCE0-
TXCLKE-
+5V_ST
22
18
A1
C
Q301C
R300
10K
D301
KDS184S
C307
0.01uF
50V
READY
+5V_MULTI
22
TMDS3_RXCTMDS3_RXC+
A2
KDS184
HPD_MST_1
R378
17
+5V_HDMI_1
DDC_SDA3
DDC_SCL3
Z4
HPD_S/W_1
+5V_HDMI_1
R310
1K
12
R_USE LG50_60_70
R377
Y4
2.SMD HDMI Jack-SUB:6612B00015B
+5V_ST
63
SIDE_HDMI
VCC_3
**MULTI ITEM
1.24C02-SUB:0IMMRAL014D
JK302
QJ41193-FEE2-7F
B24
.
21
56
DC1R019NBH
JK303
SIDE_HDMI
VCC_4
1 DATA2+
20 JACK_GND
C312 0.01uF
1 DATA2+
A22
2 DATA2_SHIELD
GND_7
2 DATA2_SHIELD
B23
3 DATA2-
57
3 DATA2-
G
R407 R424
X
O
4.7K
X
FHD 8BIT:NC
TXCE4-
24
4 DATA1+
TMDS2_RX1+
TMDS2_RX2TMDS2_RX2+
4 DATA1+
6 DATA15 DATA1_SHIELD
HD
FHD
+3.3V
Z2
5 DATA1_SHIELD
HDMI2_5V_DET
R328
10K
D
B
S
READY
CDS3C30GTH
HDMI3_5V_DET
R351
10K
A23
6 DATA1-
D302
30V
30K
Q306
BSS83
R383
0
R352
10K
58
7 DATA0+
7 DATA0+
+5V_HDMI_3
59
8 DATA0_SHIELD
TMDS3_RXC+
TMDS3_RX0TMDS3_RX0+
TMDS3_RX1TMDS3_RX1+
TMDS3_RX2TMDS3_RX2+
8 DATA0_SHIELD
60
9 DATA0-
11 CLK_SHIELD
9 DATA0-
R329
10K
23
10 CLK+
+5V_HDMI_2
R370
0
11 CLK_SHIELD
12 CLK-
10 CLK+
CEC
TMDS2_RXCTMDS2_RXC+
TMDS2_RX0TMDS2_RX0+
TMDS2_RX1-
CLK-
12
22
JP1118
13 CEC
21
DDC_SDA2
DDC_SCL2
SCL
15
14 NC
CEC
TMDS3_RXC-
13 CEC
CEC
Z3
JP1117
16 SDA
JP1116
Y2
14 NC
17 DDC/CEC_GND
R332
200
READY
15 SCL
18 +5V_POWER
R376
0
READY
30V
DDC_SDA3
DDC_SCL3
JP1115
R334
CEC_C
17DDC/CEC_GND
16 SDA
10
11
1
5
+3.3V_MULTI_MST
READY
R333
51K
18 +5V_POWER
8
9
17
USE LG50_60_70
ZD401
5.6B
20
6
7
VCC_LCD
R349 100
ZD400
5.6B
R322
100
SCL
LG60
R323
100
SDA
WP
+3.3V_MULTI_MST
19 HPD
SCL
6
R359
READY
WP
7
3
GND_4
5
2
4
5
VCC_LCD
HPD_S/W_3
TMDS2_RX2+
TMDS2_RX2-
6
4
A2
JACK_GND
50V
2
1
3
P403
SMW200-26C
C313
50V
R353 R354 0.01uF
47K 47K
0.01uF
7
3
C301
0.01uF
VCC
READY
2
R330 R331
47K 47K
8
C311
GND
19 HPD
A1
VCC
1
VCC_8
A2
22
8
A0
61
A1
.
1
E
SIDE_HDMI
P402
SMAW200-40C
MST_HPD : USE MST HPD
20
A0
IC303
AT24C02BN-10SU-1.8
B
Y3
E
Q307C
2SC3875S
R335
10K
SW_HPD : USE SW HPD (Default)
C310 0.01uF
B
HPD_MST_3
P403-*1
SMAW200-26C
TXCE0+,TXCE0-,TXCE1+,TXCE1-,TXCE2+,TXCE2-,TXCE3+,TXCE3-,TXCLKE+,TXCLKE-
FHD
HD_NORMAL
D303
KDS184S
C
MMBD301LT1G
D304
IC301
AT24C02BN-10SU-1.8
C
R301
10K
D300
KDS184S
C
R319
1K
RT1C3904-T112
A2
KDS184
Q300
A1
+5V_HDMI_2
TXCE0+,TXCE0-,TXCE1+,TXCE1-,TXCE2+,TXCE2-,TXCE3+,TXCE3-,TXCE4+,TXCE4-,TXCLKE+,TXCLKE-
OPTION
R344
1K
SIDE_HDMI
HD_ATN
PANEL WAFER
+5V_HDMI_3
+5V_HDMI_3
SIDE_HDMI
+5V_HDMI_2
2SC3875S
HPD_MST_2
+5V_ST
HPD_S/W_3
+5V_ST
HPD_S/W_2
10K
READY
LED_R/PWM
B
3.3K
R435
NOT LG60
CONTROL KEY
NOT LG60
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
LGE Internal Use Only
Digital Audio AMP
TUNER
+16V_NTP
+16V_NTP
+16V_NTP
C615
0.1uF
P601
C613
0.01uF
+1.8V
C622
1000pF
C666
C620
330uF 35V 1000pF
R604
C612
3 . 3 35V 330uF
C617
0.1uF
R609
3.9
R607
3.9
L603
2S DA-8580 2F
1S
C636
0.1uF
+1.8V_AVDD
SPK_L+
C639
0.01uF
R624
4.7K
R623
4.7K
SPK_L-
C638
0.01uF
SPK_L-
10
READY
11
+5V_TUNER
12
13
14
15
16
+5V_TUNER
20
120OHM
SCL_TUNER
43
44
45
46
47
48
49
50
51
52
53
54
PGND2A_1
CLOCK
+1.8V_AVDD
37
OUT2A_2
36
OUT2A_1
35
PVDD2A_2
CLK_I
6
CLK_O
7
8
DGNDPLL
9
34
PVDD2A_1
AGNDPLL
10
33
PVDD2B_2
11
32
PVDD2B_1
12
31
OUT2B_2
13
30
OUT2B_1
14
29
PGND2B_2
READY
NC_4
C603
1000pF
V-OUT
AFT
C605
0.1uF
C601
100pF R600
3.3K
A-OUT
LFM
SIF-OUT
AVDDPLL
NC_5
+1.8V_AVDD
NC_6
DVDDPLL
IC600
NTP3000A
NC_7
NC_1
NC_8
C600
10uF 16V
C624
C625
C631
22000pF 1000pF
R617
3.9
C634
1000pF
+3.3V
R635
3.3
C647
0.01uF
C643 R627
0.1uF 4.7K
SPK_R-
HOTEL_OPT
R632
200
AM_AUDIO
AMP_MUTE_HOTEL
E
SDA_Part
SCL_Part
+5V_MULTI
PGND2B_1
D603
30V BST2B
READY
VDR2B
FAULT
C651
1000pF
50V
+3.3V_MST
R606
0
E
Q608
2SA1530A-T112-1R
B
C662
AC_DET
100
R651
AMP :GAIN X 4
C
+5V_MULTI
+5V_MULTI
XA
1
R633
4.7K
YA
2
Q606
RT1C3904-T112
MNT_LOUT
VCC
14
2.2uF R612
680K
YB
13
XB
4
+5V_MULTI
XD
11
E
C664 2.2uF
SIDE_RIN
GND
R619
6.8K
+5V_MULTI
C
7
R639
680K
XC
8
C665 2.2uF
MNT_ROUT
COMP1_R
C808
0.1uF
0
HPD_MST_2
0
FLASH_WP
READY
S_VIDEO_DET
AD[1]
154
AD[0]
4.7K
0.047uF
0.047uF
47
MADR[9]
150
MADR[8]
149
VDDC_149
45
148
GND_148
GIN2P
46
147
VDDM_147
RIN2P
47
146
MADR[7]
C1
48
145
MADR[6]
49
144
MADR[5]
C0
50
143
MADR[4]
Y0
51
142
MADR[3]
CVBS3
52
141
MADR[2]
CVBS2
53
140
MADR[1]
54
139
MADR[0]
55
138
WEZ
137
CASZ
57
136
AVDD_MEMPLL
58
135
VDDM_135
Y1
C825
0.047uF
C826
0.047uF
C827
0.047uF
C828
0.047uF
CVBS1
C829
0.047uF
VCOM1
0.047uF
CVBS0
56
0.047uF
VCOM0
AVDD_33_58
47
R8044
47
R8045
47
R8046
47
C830
R8047
47
C831
47
CVBSOUT1
59
134
GND_134
47
CVBSOUT0
60
133
RASZ
61
C870
0.1uF
USE LG50_60_70 R8086
R870
402
GAIN X 4
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
128
MCLKE
126
127
125
LDQM
UDQM
MVREF
123
124
DQS[0]
MDATA[0]
121
122
MDATA[1]
118
119
120
MDATA[3]
MDATA[2]
MDATA[4]
VDDM_119
117
MDATA[5]
116
113
114
112
110
111
115
MDATA[7]
MDATA[6]
VDDM_114
GND_113
MDATA[8]
MDATA[9]
MDATA[10]
109
MDATA[11]
107
108
VDDM_108
MDATA[12]
105
104
106
MDATA[13]
GND_105
MDATA[14]
103
101
99
100
97
98
102
DQS[1]
GPIOF[9]
GND_100
VDDP_99
VDDC_101
MDATA[15]
96
GPIOF[7]
GPIOF[8]
95
94
GPIOF[5]
GPIOF[6]
92
93
GPIOF[4]
91
89
88
86
87
90
GPIOF[2]
GPIOF[3]
GPIOF[1]
GPIOF[0]
AUOUTL0
AUOUTR0
AUOUTR1
84
83
85
AUOUTL1
AUOUTL2
R8169
100
R8062
10BIT
4.7K
100
READY
100
READY
1K
R8142
R8140
DON T USE(156,157)
100
MADR[10]
MADR[8]
C872
0.1uF
8BIT
LED_G
3.3K
Insert all except LG60:R8188
C883
2.2uF
25V
MADR[9]
0.1uF
R8063
4.7K
NOT LG60
R8188
RL_ON
MADR[11]
AR802
C871
MUTE_LINE
SW_RESET
R8139
R8182
0
+5V_ST_SW
LG60
MADR[7]
MADR[6]
AR801
100
AR800
100
MADR[5]
MADR[4]
MADR[3]
MADR[2]
MADR[1]
MADR[0]
+3.3V_MULTI_MST
C873
MADR[0-11]
0.1uF
R8146
100
R8147
100
R8148
33
R8149
33
R8150
100
R8151
100
R8152
100
R8153
100
R8154
100
R8003
100
WEZ
CASZ
RASZ
SBA0
SBA1
MCLK
MCLKZ
CKE
UDQM
LDQM
DQS0
DQS1
MDATA[0]
MDATA[1]
MDATA[3]
MDATA[2]
MDATA[4]
MDATA[5]
MDATA[6]
MDATA[7]
MDATA[8]
MDATA[9]
MDATA[10]
MDATA[11]
MDATA[12]
MDATA[13]
MDATA[14]
MDATA[15]
DEC_656[7]
DEC_656[6]
DEC_656[4]
DEC_656[5]
DEC_656[2]
DEC_656[3]
DEC_656[1]
100
R8078
DEC_656[0]
100
R8075
READY
READY
100
R8073
C849 2 . 2 u F
R8072
100
2.2uF
2.2uF
2.2uF
2.2uF
0.1uF
100
SCL_LED
100
MDATA[0-15]
AUDIO_SW
DEC_656_CLK
DEC_656[0-7]
C861
0.1uF
C863
0.1uF
+2.5V_VDDM_MST
C864
0.1uF
+1.2V_VDDC_MST
C875
10uF
16V
22K
1000pF
22K
1000pF
C853
R8088
C854
10K
1000pF
C860
0.1uF
R8084
R8051
68
1608
+3.3V_MST
R8070
4.7K
CEC_C
R8145
MNT_R_AMP
R8007
68
1608
SDA_Part
H/W OPTION #2
R8185
2.2K
DISP_EN
100
MCLKZ
R8060
100
PIP_VOUT
Q805
RT1C3904-T112
FHD
USE LG50_60_70
0
R8168
129
B
E
R8020
402
HD
R867
4.7K
SDA_LED
R8137
64
MNT_L_AMP
R8014
75
R865
4.7K
+3.3V_MST
R8184
2.2K
USE LG50_60_70
100
R8076
PIP_V
Q804
3.3K
SPI_DI
100
C851
C
2SA1530A-T112-1R
C
SCL_Part
R8175
0
SDA
+3.3V_MST
SPI_CLK
R8144
2.2K
R8050
470
E
SCL
SPI_CZ
R8143
2.2K
R8081
0
TW9910 block
5
KEY2
100
MCLK
C834 C835
4.7uF 0.1uF
C824
0.1uF
50V
100
SPI_DO
R8178
BADR[1]
C847
R8018
R8016 100
33K
6
4
WP
H/W OPTION #1
MPEG_RESET
KEY1
BADR[0]
C833
10uF
16V
3
+3.3V_MST
VCC
I_DIMMING
100
R8134
R8135
+3.3V_MST
KDS181
10K
100
R8132
1K
LPL_CMO
130
R8019
100
R8002
0
7
SCL_Part
SDA_Part
E_DIMMING
131
AUOUTR2
100
8
2
DSUB_SCL
DSUB_SDA
R8131
132
SIFM
C881
C803
0.1uF
SIF1P
1
MPEG UART
IR
62
AC_RST
SPI_DI
EYEQ_RESET
63
81
SIP0P
AVDD_SIF
82
0.1uF
80
GND_61
C832
+3.3V_MULTI_MST
AUMONO
OPT R8048
TW9910 blockR8049
MADR[10]
151
43
44
AUOUTL3
47
R8043
MADR[11]
152
42
BIN2P
SOGIN2
VSYNC2
AUOUTR3
R8041
R8042
153
41
VSYNC0
78
SIDE_C
SIDE_Y
40
HSYNC0
GND_40
0.1uF
R8158
TXCE1-
TXCE0-
0.1uF
0.1uF
C865
VDDC_193
193
NC_195
NC_196
VDDP_194
194
195
196
C866
TXCE2-
TXCE0+
TXCE3-
TXCE2+
TXCE4TXCE3+
TXCE4+
TXCLKE-
TXCLKE+
TXCO0-
TXCO1-
0.1uF
TXCE1+
LVA3M
LVA3P
197
198
LVACKP
199
200
LVACKM
LVA2M
LVA1P
LVA2P
201
202
203
LVA1M
204
LVA0M
LVA0P
205
206
207
208
GND_208
NC_210
LVB3P
NC_209
209
210
211
LVB3M
212
LVBCKM
LVBCKP
213
214
LVB2P
215
216
VDDP_207
C862
TXCO2-
TXCO0+
TXCO3-
TXCO1+
TXCO2+
TXCO4TXCO3+
TXCO4+
TXCLKO-
0.1uF
C859
LVB2M
LVB1M
LVB0P
LVB0M
VDDP_221
GND_222
GPIOE[3]
LVB1P
217
218
219
220
155
B
OPT
Q802
RT1C3904-T112
221
38
39
C819
READY
R8071
E
R8004
402
1%
222
RIN0P
0 . 0 4 7 u F AVDD_33_39
47
R8183
OPT
223
AD[2]
C823
MSTAR Recommand
: over 8V
MNT_VOUT_T
224
AD[3]
156
VCOM2
C822
B
C
GPIOE[2]
GPIOE[1]
225
AD[4]
157
37
TW9910 block
OPT
R8006
470
C
TXCLKO+
SCL_TUNER
0
0
I2S_MCLK
R8079
R8080
TXD
100 RS232C
RXD
RS232C
100
PANEL_ON
R8058
R8057
HPD_MST_3
R8095
R8094
ICLK
GPIOE[0]
226
227
I2S_SDO
I2S_SCK
I2S_WS
100 RS232C
100
100
100
0.1uF
100
R8092
IDE
228
R8085
R8087
R8082
C852
R8089
IHSYNC
IVSYNC
DI[1]
DI[2]
DI[3]
VDDP_235
DI[0]
231
232
233
235
234
100
100
R8074
R8077
DI[5]
DI[6]
DI[4]
236
237
238
100
R8015
0.1uF
100
R8066
C850
VDDC_240
GND_241
DI[7]
239
240
241
229
I2S_WS_IN
I2S_CLK_IN
I2S_DIN
HDMI_SEL1
HDMI_SEL2
HDMI2_5V_DET
HDMI3_5V_DET
100
R8065
DI[9]
DI[11]
DI[12]
DI[8]
DI[10]
244
245
246
242
243
158
36
SOGIN0
D802
E
R868
402
OPT
230
HWRESET
20pF
HDMI1_5V_DET
35
GIN0P
0.047uF
16V
0.1uF
C880
GAIN X 4
20pF
0.1uF
AD[5]
0.047uF
RAMDAT[0-15]
OPT
C841
AD[6]
159
0.047uF
47
D801
KDS181
B
X800
14.31818MHz
AD[7]
160
SPK-N
6
RAMDQM
RAMBA[1]
RAMBA[0]
RAMCS
RAMRAS
RAMCAS
RAMWE
161
33
34
0.047uF
C800
4.7uF
10V
OPT
RAMDAT[0]
RAMDAT[2]
RAMDAT[1]
RAMDAT[3]
RAMDAT[4]
RAMDAT[6]
RAMDAT[5]
RAMDAT[7]
RAMADD[1]
RAMADD[0]
RAMADD[2]
RAMADD[3]
RAMADD[10]
32
HWRESET
R8000
0
Copyright C 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
RIN1P
C817
47
READY
C804
0.1uF
D800
1N4148W
100V
WRZ
CVBS_RIN
AM_AUDIO
DQ3
7
DQ2
5
DQ1
4
VDDQ1
3
DQ0
2
VDD1
1
VSSQ1
DQ4
11
12
10
8
9
DQ5
DQ6
VSSQ2
VDDQ2
14
13
DQ7
VDD2
15
LDQM
19
18
17
16
WE
CS
BA0
CAS
RAS
20
21
BA1
A10/AP
25
24
22
23
26
A3
A2
A0
A1
R8010
RDZ
162
C818
5
3
ALE
163
C816
R8013
SW800
TMUE312GAB
+5V_ST 2
4
1
164
C815
MAIN_SIF
RAMDAT[0]
RAMDAT[15]
RAMDAT[1]
RAMDAT[14]
RAMDAT[2]
RAMDAT[13]
RAMDAT[3]
RAMDAT[12]
RAMDAT[4]
RAMDAT[11]
RAMDAT[5]
RAMDAT[10]
RAMDAT[6]
RAMDAT[9]
RAMDAT[7]
RAMDAT[8]
FHD
30
31
47
R8011
PIP_VOUT
29
GIN1P
47
COMP2_Y
MNT_VOUT_T
BIN1P
SOGIN1
47
COMP2_Pr
DCDC_7.22V_PIP
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
VDDP_165
47
1000pF
TV_MAIN
OPT
Q801
2SA1530A-T112-1R
RAMDAT[0-7]
GND_166
165
BIN0P
0.047uF
DCDC_7.22V_PIP
RAMADD[0-3]
166
27
R8038
R8181
0.1uF
RAMBA[1]
RAMBA[0]
RAMCS
RAMRAS
RAMCAS
RAMWE
RAMDQM
IPCLK
SCK
R8037
R8039
SIDE_V
CVBS_VIN
READY
DQ15
VSS3
54
53
VSSQ4
52
VDDQ4
DQ12
DQ13
VSSQ3
DQ11
DQ14
51
49
50
48
VDDQ3
DQ9
DQ10
45
46
44
43
47
VSS2
DQ8
42
41
NC2
40
NC1
A11
CLK
UDQM
A8
A9
CKE
37
36
39
38
35
34
A4
A7
A6
A5
30
29
33
32
31
VSS1
28
27
VDD3
RAMADD[0]
RAMADD[8]
RAMADD[10]
RAMADD[9]
RAMADD[11]
SDI
167
R8036
CVBS_V
50V
CSZ
168
R8035
+3.3V_MULTI_MST
+3.3V_SDRAM
SDO
169
VCOM3
C821
+3.3VDDP
IC704
HY57V641620FTP
0.047uF
C820
USB
RAMDAT[15]
RAMDAT[13]
RAMDAT[14]
RAMDAT[12]
RAMDAT[11]
RAMDAT[9]
RAMDAT[10]
R707
56
C709
5pF
0.047uF
C814
47
47
MLF2012A2R7JT000 C755
READY
220pF
50V
READY
SAR0
170
25
26
C848
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
40
39
0.047uF
C813
R8012
R8017
I2S_DIN
TX_MPEG
RX_MPEG
I2S_WS_IN
I2S_CLK_IN
171
VSYNC1
C844
C845
C846
DUPRD0
SAR1
SW_R
150
41
172
IC801
LGE6991DD
PC_AUD_L
R728
42
128
C812
47
PC_VS
22pF
173
SAR2
PC_AUD_R
C746
SAR3
CVBS_LIN
0
PWM0
174
VCLAMP
PC_HS
L719
R739
43
127
47
47
R8034
COMP2_Pb
NON_EU OPTION
45
44
X703
27MHz
MPEG_RESET
175
19
2.2uF
0
1/10W
5%
46
126
1
R738
+3.3VDDP
R743
4.7K
READY
176
18
RXA2P
2.2uF
65
66
68
67
69
71
70
72
73
74
75
76
77
79
78
80
81
82
84
83
85
86
87
89
88
48
47
ZORAN I2C strobe ready
17
RXA2N
2.2uF
125
49
R8032
R8033
C855
READY
R742
4.7K
R727
1K
52
51
50
0
C842
124
53
0
0
R8123
C843
123
54
1000pF
0
R8121
R8122
DDCR_DA
28
SPI_CLK
R8179
100
SI
LED_R/PWM
LED_R_PWM_Big
LG60
TX_MPEG
R8120
DDCA_DA
DDCR_CK
REFP
SCLK
R8176
0
PANEL_STATUS
DDCA_CK
180
177
REFM
5
HOLD#
PWM1
178
24
4
+3.3V_MST
VCC
PWM0
179
PWM1
GND
RX_MPEG
100
16
22
6
AC_DET
R8118
14
23
0.047uF
0.1uF
15
DDCDA_CK
C811
C869
13
DDCDA_DA
C810
0.1uF
RXA1P
GND_17
C840
122
181
INT
COMP2_L
121
IRIN
COMP2_R
120
VDDP_183
182
65
119
183
1uF
118
184
22
+3.3V_MULTI_MST
56
55
VDDC_185
22
47
PC_R
22pF
185
0.1uF
117
12MHz
C745
57
8
C868
NOT LG60
100
RXA1N
C809
0.1uF
47
100
100
20
A1
100
100
R8117
21
7
IC802
AT24C64AN-10SU-2.7
100
R8116
GPIOB[4]
R8055
R8031
R866
GPIOB[5]
186
R8056
R8030
R8126
R8127
R8115
GPIOB[6]
187
11
REXT
8
3
DDR SDRAM
0.1uF
NC_189
188
9
390
IC803
2
MADR[0-11]
0.1uF
C807
NC_190
189
2.2uF
116
PC_G
* R732 Video Output Level Referenc
PWM2
190
C839
115
75
PC_B
R732
114
R737
COMP1_Pr
220K
113
75
75
58
18
RAMADD[2]
RAMADD[6]
RAMADD[1]
RAMADD[7]
6.19K
X702
90
92
91
94
93
95
97
112
18pF
18pF
75
R735
R736
RAMDAT[8-15]
RAMDAT[8]
5%
1/10W
96
111
R715
C719
C720
+3.3VDDP
RAMADD[6]
RAMADD[7]
RAMADD[8]
RAMADD[9]
98
110
RAMADD[11]
RAMADD[4]
RAMADD[5]
109
59
17
75
61
R734
COMP1_Y
60
16
R714
RAMADD[4]
RAMADD[3]
RAMADD[5]
IPCLK
99
107
RAMADD[0-11]
R706
4.7K
62
IC707
USB_DP
USB_DN
* R715 Recommendation is 6.19k 1%
to meet USB2.0 HS cert
RAMADD[4-9]
63
105
108
SFCLK
C709 :EMI Solution
64
104
106
COMP1_Pb
R733
390
103
15
75
75
14
75
R712
R713
ZR36966PQCG-XD
R711
SFDO
SFDI
13
SFCS
100
102
OCP_EN
12
R709
1K
ENABLE
11
3
10
2
9
READY
5
4
VIN
GND
8
FAULT/
1
7
R708
180
R703
5.1K
READY
6
6
R702
5.1K
ILIMIT
101
VOUT
USB_DP
5
R701
27
4
USB_DN
PWM3
HSYNC1
* Analog Video Option
* R732 Video Output Level Reference
Originally 392 ohm 1%
C725
0.1uF
3
R700
27
IC705
MIC2009YM6-TR
It s possibel to 27~47ohm
2
3
2
1
C806
R8054
HDMI_SCL
1A Design
5 4
KJA-UB-4-0004
0.1uF
HDMI_SDA
P701
USB DOWN STREAM
C805
PWM2
PWM3
191
79
HPD_MST_2
GND
1
E
A2
6
76
50V
R8061
0
READY
C
RT1C3904-T112
B
A0
192
HPLUGA
10K
+3.3V_MST
10
HDMI_2-
R8067
FLASH_WP
7
12
SO
WP#
TXCE0+,TXCE0-,TXCE1+,TXCE1-,TXCE2+,TXCE2-,TXCE3+,TXCE3-,TXCE4+,TXCE4-,TXCLKE+,TXCLKE-
4
RXA0P
CS#
TXCLKO+,TXCLKO-,TXCO0+,TXCO0-,TXCO1+,TXCO1-,TXCO2+,TXCO2-,TXCO3+,TXCO3-,TXCO4+,TXCO4-
5
RXA0N
R8172
100
100
Q803
3
C837
1%
R8112
READY
R8110
3.3K
AVDD_33_14
HDMI_2+
0
R8108
3.3K
RXACKP
HDMI_1-
R8021
READY
R8106
READY
R8099
10K
GND_184
HDMI_1+
+3.3VDDA
R8005
+3.3V_MST
1
C836
+1.8VDDC
C734
0.1uF
PWM0
R8111
R8109
R8107
3.3K
READY
READY
PWM1
PWM2
PWM3
2
+3.3V_MULTI_MST
DEC_656[0]
DEC_656[1]
DEC_656[3]
DEC_656[2]
DEC_656[4]
DEC_656[5]
DEC_656[6]
0
0
0
0
0
22
0
R726
15K
R8105
1K
RXB1P
GND_11
R8171
100
READY
RXACKN
HDMI_0-
+3.3VDDP
R8174
4.7K
SPI_CZ
SPI_DO
R8187
10K
R8001
0
FLASH_WP_ZORAN
GND_3
DDCDB_CK
HDMI_0+
+3.3V_MULTI_MST
+1.8VDDA
USB
**
22
R8090
4.7K
READY
MX25L1605AM2C-15G
+3.3V_MST
+3.3V_MST
RXB1N
RXB2N
READY
HDMI_C-
OCP_EN
DEC_656_CLK
R744
R725
16V
R8052
DEC_656[0-7]
0
HDMI_C+
R720
R721
R722
R723
R724
UBW2012-121F
READY
10uF
R717
0.1uF
MBW3216-501TF
DEC_656[7]
+5V_USB
L718
120OHM
0
0
UBW2012-121F
L716
OPT
C724
R718
R719
READY
120OHM
0
Connect to Main IC(CCIR656 Interface)
C650
6800pF
<Mode Selection>
C802
DEC_656[0] : DUPTD0
+5V_MULTI
0
0READY
READY
R8025
R8026
0READY
RXB2P
READY
HPLUGB
READY
R8053
22
DDCDB_DA
HPD_MST_1
L717
OUT3 8
R646
1K
E
R649
4.7K
0.1uF
128
123
124
126
127
125
LDQM
UDQM
DQS[0]
MVREF
R8029
R8024
MCLKE
MDATA[0]
119
120
121
122
118
MDATA[4]
MDATA[3]
MDATA[2]
MDATA[1]
VDDM_119
116
117
112
113
114
115
107
108
109
110
111
103
104
105
106
96
97
98
99
100
101
102
DQS[1]
GPIOF[7]
GPIOF[8]
GPIOF[9]
GND_113
GND_105
GND_100
VDDP_99
MDATA[7]
MDATA[6]
MDATA[5]
MDATA[8]
MDATA[9]
VDDC_101
VDDM_114
VDDM_108
MDATA[12]
MDATA[11]
MDATA[10]
MDATA[15]
MDATA[14]
MDATA[13]
92
93
94
95
85
91
GPIOF[2]
GPIOF[3]
GPIOF[4]
GPIOF[5]
GPIOF[6]
GPIOF[0]
GPIOF[1]
AUOUTL0
AUOUTR1
SIFM
86
MCLKZ
87
MCLK
129
88
130
89
131
90
62
63
64
Capacitors on VBUSA should be
placed as close to Connector as possible.
77
BADR[0]
75
RASZ
132
AUL3
GND_134
133
AUL2
VDDM_135
134
C838
0.1uF
AVDD_MEMPLL
135
BADR[1]
C882
C801
CASZ
136
AUR3
WEZ
137
AUR2
MADR[0]
138
0READY
0READY
READY
AUCOM
MADR[1]
139
0READY
R8028
DI[13]
MADR[2]
140
57
58
59
60
65
SIF1P
141
0
R8027
R8023
61
AUOUTR0
AVDD_SIF
52
53
54
55
56
80
SIP0P
81
GND_61
82
CVBS0
VCOM0
CVBSOUT1
CVBSOUT0
83
CVBS3
CVBS2
CVBS1
VCOM1
AVDD_33_58
R8022
HWRESET
MADR[3]
XOUT
MADR[4]
142
247
MADR[5]
143
248
MADR[6]
144
249
MADR[7]
145
73
VDDM_147
146
72
GND_148
147
AUL1
VDDC_149
148
AUR0
MADR[8]
149
XIN
MADR[9]
150
AVDD_MPLL
MADR[10]
151
RXBCKN
MADR[11]
152
RXBCKP
AD[0]
153
AVDD_33_254
AD[1]
154
RXB0N
AD[2]
155
RXB0P
AD[3]
156
250
AD[4]
157
251
AD[5]
158
252
AD[6]
159
253
AD[7]
160
46
47
48
49
50
51
254
WRZ
161
41
42
43
44
255
162
36
37
38
39
40
256
163
31
32
33
34
35
45
R8173
4.7K
READY
R8091
4.7K
R8064
1M
70
30
RDZ
71
ALE
68
VDDP_165
164
69
GND_166
165
67
SCK
166
66
SDI
167
AUL0
168
GND_66
25
26
27
28
29
AUVREF
CSZ
AVDD_AU
SDO
169
AUVRADP
SAR0
170
AUVRADN
VDDP_194
NC_195
NC_196
LVA3P
LVA3M
LVACKP
LVACKM
LVA2P
LVA2M
LVA1P
LVA1M
LVA0P
LVA0M
VDDP_207
GND_208
NC_209
NC_210
LVB3P
LVB3M
LVBCKP
LVBCKM
LVB2P
LVB2M
LVB1P
LVB1M
LVB0P
LVB0M
VDDP_221
GND_222
GPIOE[3]
GPIOE[2]
GPIOE[1]
VDDC_193
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
DI[9]
DI[10]
DI[11]
DI[12]
ICLK
IDE
IHSYNC
IVSYNC
GPIOE[0]
226
227
228
229
230
DI[13]
HWRESET
XOUT
XIN
AVDD_MPLL
DI[1]
DI[2]
DI[3]
VDDP_235
DI[0]
231
232
233
234
235
236
RXBCKN
RXBCKP
AVDD_33_254
RXB0N
RXB0P
DI[4]
DI[6]
DI[7]
VDDC_240
GND_241
DI[8]
DI[5]
237
238
239
240
241
242
243
244
SAR1
171
84
C753
0.1uF
50V
SAR2
172
75
C752
0.1uF
50V
173
76
C751
0.1uF
50V
IC801-*1
LGE6891DD
HD
20
21
22
23
24
77
C750
0.1uF
SAR3
C0
C1
50V
PWM0
174
Y0
Y1
C749
0.1uF
PWM1
175
BIN2P
RIN2P
50V
DDCR_DA
176
SOGIN2
GIN2P
C748
0.1uF
DDCR_CK
177
78
RIN0P
DDCA_DA
178
79
RIN1P
BIN0P
GIN0P
GND_40
HSYNC0
VSYNC0
VSYNC2
DDCA_CK
179
69
GIN1P
VCOM3
VCOM2
SOGIN0
AVDD_33_39
180
14
15
16
17
18
19
70
REFP
REFM
50V
245
INT
BIN1P
C747
0.1uF
246
IRIN
181
SOGIN1
50V
247
VDDP_183
182
VSYNC1
5
248
GND_184
183
VCLAMP
+1.8VDDC
249
VDDC_185
184
REXT
+1.8VDDA
250
GPIOB[4]
185
HSYNC1
For Initial Download
251
GPIOB[5]
186
HPLUGA
DUPRD0
252
GPIOB[6]
187
DDCDA_CK
DEC_656[0] DUPTD0
253
NC_189
188
RXA2P
DDCDA_DA
JP703
254
NC_190
189
9
10
11
12
13
RXA1P
RXA2N
SFCLK
255
PWM2
190
6
7
8
RXA1N
GND_17
1/10W
5%
READY
191
4
5
1
RXA0P
AVDD_33_14
71
C744
0.1uF
50V
72
C743
0.1uF
50V
73
C742
0.1uF
50V
74
C741
0.1uF
50V
66
C740
0.1uF
50V
67
JP700
C739
0.1uF
50V
68
R705
1K
PWM3
2
3
RXB2P
C738
0.1uF
50V
AUL2
R741
0
192
RXB1P
RXA0N
GND_11
C737
0.1uF
50V
+3.3V_MULTI_MST
GND_3
RXB2N
DDCDB_CK
RXACKP
C736
0.1uF
50V
256
RXB1N
HPLUGB
DDCDB_DA
RXACKN
C735
0.1uF
50V
AUL3
+3.3VDDP
AUL0
C716
0.1uF
16V
C712
0.1uF
16V
AUL1
C710
22uF
External F/W Download
AUR2
UBW2012-121F
C732
0.1uF
50V
+3.3V_MULTI_MST
UBW2012-121F
SFDO
1/10W
5%
ZORAN SRAM Board F/W Download
C731
0.1uF
50V
AUR3
+3.3VDDA
C730
0.1uF
50V
AUR0
L712
C729
0.1uF
50V
AUR1
SFCLK
C728
0.1uF
50V
74
C727
0.1uF
50V
GND_66
SI
C726
0.1uF
50V
+1.8VDDA
AUCOM
SCLK
C717
0.1uF
16V
C715
AUR1
47uF
L714
120OHM
AUVREF
5
4
UBW2012-121F
AUMONO
GND
SFDI
READY
C713
0.1uF
AUOUTL3
READY
C754
10nF
50V
READY
R716
4.7K
AUOUTL2
6
3
HOLD#
AUOUTL1
UBW2012-121F C711
R729
22uF
200
16V
VCC
AUOUTR3
7
120OHM
R704
1K
R740
0
WP#
8
2
AUOUTR2
TOP SIDE!
1
AVDD_AU
SO
AUVRADP
CS#
SFDI
120HZ: H
Normal: L
+3.3VDDA
+1.8VDDC
C714
22uF
10K
R710
SFCS
FLASH_WP_ZORAN
+3.3V_MST
+3.3V_MST
SW_L
120OHM
+3.3VDDP
+3.3VDDP
+3.3VDDP
120OHM
AUVRADN
+3.3VDDP
SDA_TUNER
H/W OPTION #3
MSTAR
L713
7 OUT2
B
Audio S/W : COMP1 or SIDE L/R
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
+1.8V
6 INPUT2- INPUT3- 9
R613 15K
9
6
R640
680K
L711
5 INPUT2+ INPUT3+ 10
C627 33pF
SW_R
YC
GND 11
C633
0.1uF
R614 5.6K
MNT_R_AMP
Q607
RT1C3904-T112
for COMP1
+3.3V_USB
4 VCC
120OHM
+12V
CONTROL_C
AUDIO_SW
IC703
MX25L1605AM2C-15G
L606
+12V
UBW2012-121F
EAM38769505
YD
10
5
AUDIO_SW
for SIDE R/L
3 INPUT1+ INPUT4+ 12
R615 5.6K
MNT_L_AMP
R637
680K
R638
680K
CONTROL_B
2 INPUT1- INPUT4- 13
C628 33pF
R620
6.8K
R641 10K
Q600
RT1C3904-T112
CONTROL_D
12
3
C663 2.2uF
R634
4.7K
IC703_USB
R616 15K
C649
6800pF
C
+5V_MULTI
USB/MPEG DEC
R645
1K
E
R647
4.7K
C641
0.1uF
CONTROL_A
R630
680K
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
1 OUT1 LM324DOUT4 14
B
READY
COMP1_L
IC601
+12V
IC602
MC74HC4066ADR2G
R629
680K
50V
9
0
C623 22000pF
C668
33pF
50V
READY
R603
100
R602
100
+5V_MULTI
16V
8
SPK_R-_HOTEL
10
B
100uF
SPK_R+_HOTEL
READY
C
C667
33pF
50V
READY
SW_L
L715
HOTEL_OPT
Q609
RT1C3904-T112
R8102
C512
0.027uF
R611
680K
C722 C723
7
C
B
3.3K
1K
SIDE_LIN
JP701
5
6
L612
UBW2012-121F
EAM38769505
R8157
R515
R513
1K
SHIELD
JP702
4
HOTEL_OPT
C669
4.7uF
10V
10K
R650
E
MAIN_SIF
I2S_SDO
I2S_WS
I2S_SCK
0
R553
OPT
21
4
3
SW_RESET
C614
1uF
C610
0.1uF
HOTEL_OPT
C506
4700pF
R545
C609
16V 10uF
Q501
RT1C3904-T112
AMP_MUTE_HOTELR642
C
B
READY
3
2
28
27
26
25
24
23
22
21
+1.8V_DVDD
+5V_TUNER
PROTECT
C607
0.1uF
PWM_3A/PWM_HP1
Q502
2SA1530A-T112-1R
C
C640
0.47uF
+3.3V
0
B
C604
10uF 16V
PWM_3B/PWM_HP2
R503
4.7K
R621
3.9
HOTEL_OPT
AUDIO_R
R636
3.3
1S
1F
EAP38319001
C629
0.1uF
C626
0.1uF
SPK_R+
C648
0.01uF
C644 R628
0.1uF 4.7K
L607
2S DA-8580 2F
1
R605
C513
270pF
READY
E
L613
UBW2012-121F
EAM38769505
R622
3.9
C630
1000pF
TV_MAIN
R522
220
P600
12505WR-09A00
+16V_NTP
C602
0.1uF
+1.8V_DVDD
SHIELD
HOTEL_OPT
C635
1000pF
R618
3.9
21
R521
220
C520
0.1uF
+16V_NTP
1uF +16V_NTP
+16V_NTP
VDD_IO
C642
100pF
+3.3V
AS
30V
D600
READY
0.1uF
DATA
20
C502
27pF
19
38
5
VSS_IO
I2S_MCLK
GND_2
SCL
0
18
L501
UBW2012-121F
PGND2A_2
SDA
C501
27pF
SDA_TUNER
39
19
R519
R505 330
0
4
BCK
R518
AD
NC_3
18
R506 330
17
R508
4.7K
BST2A
WCK
R504
4.7K
VDR2A
40
17
C510
4.7uF
35V
NC_2
41
3
16
C507
0.01uF
42
2
15
READY
1
DVSS
100
READY
C606
1000pF
Chinese Hotel Option
BST1A
VDR1A
/RESET
DVDD
R507
READY
TP[33V_OPTION]
R601
100
C646
9
L502
BLM18BD102SN1D
SW_RESET
RF_AGC
10K
R631
HOTEL_OPT
8
NC_2
10K
R648
C503
0.01uF
C521
10uF
16V
16 SIF-OUT
17 NC_5
18 NC_6
19 NC_7
20 NC_8
2
4
SPK_L-
READY
7
C608 READY
1uF D602
30V
+B[5V]
100V
5
6
GND_1
D605
READY 1N4148W
Near the pin
+5V_TUNER
13 V-OUT
14 AFT
15 A-OUT
1
3
NC_1
SDATA
R514
0
+B[5V]
NC_2
RF_AGC
TP[33V_OPTION]
9 DATA
10 CLOCK
11 AS
12 NC_4
+3.3VDDP
2
+1.8V_DVDD
SPK_L+
100V
4
7 NC_3
8 GND_2
DEBUG TEST OPTION
1
SPK_R+
120OHM
UBW2012-121F
EAM38769505
L610
UBW2012-121F
EAM38769505
D604
READY 1N4148W
3
55
56
2
1 NC_1
2 GND_1
JK700
12505WS-04A00
SPK_R-
EAM38769505
L615
R626
3.3
R625
3.3
100V
100V
C621
1000pF
D606
READY 1N4148W
C619
1000pF
D607
READY 1N4148W
READY
30V
D601
C618 1uF
EAP38319001
R610
3.9
VDR1B
BST1B
PGND1B_1
PGND1B_2
OUT1B_1
OUT1B_2
PVDD1A_1
PVDD1B_1
PVDD1A_2
PVDD1B_2
R608
3.9
C637
0.1uF
C632
0.47uF
1F
UBW2012-121F
TAFT-H703F
1
3
4
5
6
OUT1A_1
NTSC TUNER
TU500-*1
OUT1A_2
NON EU TUNER
C616
22000pF
PGND1A_1
TU500
TAFT-Z703D
22000pF
PGND1A_2
C611
SMAW250-04
L614
120OHM
L611
UBW2012-121F
EAM38769505
R8167
1K
C876
0.1uF
C878
1000pF
C877
0.1uF
C879
10uF
16V
L509
MBW3216-501TF
C867
0.1uF
+2.5V_VDDM_MST
R8163
1K
+3.3V_MST
SW_L/R: COMP2_L/R or SIDE_L/R
LGE Internal Use Only
DDR
L1000
UBW2012-121F
+1.8V
+1.8V_AVD
C1010
47uF16V
C1015 120OHM
0.1uF
C1007 22pF
READY
XTO
XTI
VSSE_2
VD[0]/SIAD0
VD[1]
NC_4
VSS_2
VD[2]
VD[3]
VD[4]
VD[5]
VD[6]
48
47
46
45
44
43
42
41
40
39
38
37
MDATA[0-15]
+3.3V
NC_3
LDM
UDQM
WE
WEZ
CAS
CASZ
RAS
RASZ
CS
NC_4
BA0
SBA0
BA1
SBA1
MADR[10]
MADR[11]
MADR[9]
MADR[10]
MADR[8]
MADR[9]
MADR[0]
MADR[1]
MADR[1]
MADR[2]
MADR[2]
MADR[7]
MADR[8]
MADR[6]
MADR[7]
MADR[5]
MADR[6]
MADR[4]
MADR[5]
MADR[3]
MADR[4]
MADR[2]
MADR[3]
MADR[1]
MADR[2]
MADR[0]
MADR[1]
MADR[3]
A10/AP
MADR[10]
MADR[0]
MADR[11]
MADR[10]
A0
A1
A2
A3
MADR[3]
16
51
17
50
18
49
19
48
20
47
21
46
22
45
23
44
24
43
25
42
26
41
27
40
28
39
29
38
30
37
31
36
32
VDD_3
NC_8
VSSQ_3
+2.5V_VDDM_MST
R1000
75
DQS0
R909
1K
NC_7
VREF
C909
0.1uF
C907
1000pF
VSS_2
R906
1K
UDM
LDQM
CK
R903
150
READY
CK
VD[11]
AR1001 51
AVD_1
8
29
VD[12]
C1003
0.1uF
YMUX3
9
28
VD[13]
DEC_656[5]
C1004
0.1uF
YMUX2
10
27
VD[14]
DEC_656[6]
YGND
11
26
VD[15]
DEC_656[7]
YMUX1
12
25
VDDE_2
C1002
PIP_V
UDQS
0.1uF
DEC_656[4]
+3.3V
C1011
0.1uF
MCLK
R905
150
MCLKZ
CKE
CKE
NC_6
A12/NC_5
MADR[11]
A11
MADR[11]
MADR[9]
A9
MADR[9]
A8
MADR[8]
A7
MADR[7]
A6
MADR[6]
A5
MADR[5]
A4
MADR[4]
R1009
51
DEC_656_CLK
C1013
10pF
READY
+1.8V_AVD
MADR[8]
MADR[7]
MADR[6]
MADR[5]
35
33
C906
0.1uF
30
24
52
DQ8
7
23
15
+1.8V_AVD
VDDQ_4
AR900
56
1/16W
NC_1
22
53
MDATA[0]
DEC_656[3]
NC_3
21
54
14
MDATA[1]
DQ9
DEC_656[2]
VDD
IC1000
HS
13
MDATA[2]
DQ10
VD[10]
32
6 TW9910DANA2-GR 31
20
55
MDATA[3]
VSSQ_4
33
5
CLKX2
VDD_2
12
DQ11
4
TMODE
DEC_656[0-7]
DEC_656[0]
VSSE_1
A13/NC_2
C905
0.1uF
C900
0.1uF
56
PDN
RSTB
R1001
4.7K
MPOUT
DQS1
57
11
100
R1006
4.7K
C908
0.1uF
DQ12
R1004
19
LDQS
58
10
READY
SW_RESET
18
VDDQ_3
59
9
MDATA[4]
VDDQ_5
VS
DQ7
NC_1
8
MDATA[5]
DQ13
DEC_656[1]
NC_2
C904
0.1uF
60
MDATA[6]
DQ14
VD[9]
VSS_1
VSSQ_2
AR903
56
1/16W
7
VSSQ_5
VD[8]
34
17
DQ6
61
35
3
16
DQ5
MDATA[15]
62
VD[7]
2
SDAT
15
VDDQ_2
MDATA[14]
63
6
36
SCLK
100
CIN0
DQ4
MDATA[13]
64
5
1
100
R1002
AVS_2
MDATA[12]
65
3
4
AR1000
51
VDDE_1
R1003
AVD_2
DQ3
2
+1.8V_AVD
0.1uF
DQ2
VSSQ_1
C903
0.1uF
SCL_Part
SDA_Part
C1008 0.1uF
DQ1
MDATA[11]
MDATA[7]
C1009
VDDQ_1
MDATA[10]
+3.3V
DQ15
14
MDATA[9]
AR901
56
1/16W
VSS_3
66
13
1
DQ0
YMUX0
VDD_1
0.1uF
C902
0.1uF
C1006
AR902
56
1/16W
MDATA[8]
C1000
0.1uF
MDATA[0-15]
IC900
HYB25DC256163CE-4
AVS_1
+2.5V_VDDM_MST
C1001 0.01uF
MDATA[0-15]
C1012 0.01uF
R1007
0
27MHz
R1005 1M
DEC_656[0-7]
X1000
20pF
C1014
C1005 22pF
MAX 1A
MADR[4]
TW9910
VSS_1
34
C901
0.1uF
MADR[0]
MADR[0-11]
**MULTI ITEM
MADR[0-11]
MAIN - QIMONDA : EAN41788501
SUB - HYNIX : EAN31729202
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
PPWER
LED Block
16V
GND
12V
GND
5V
5V
GND
GND
Error out
Power ON
A.Dim
Select
P_16V
*PANEL OPTION
R1197 R1122 C1114 R1127 R1183 R1155 R1103 R1185 R1186 R1187 R1104
Sharp 52"
O
O
O
X
X
O
X
X
X
X
X
O
AUO
O
O
O
X
X
X
X
X
X
X
CMO 32/42/47
X
X
X
O
X
4.7K 0.47uF O
O
O
X
X
X
X
O
O
CMO 57"
X
O
O
4.7K 0.47uF X
Sharp 32"
X
O
X
X
X
X
X
X
X
X
X
the Rest(w/CMO26")
O
X
O
X
X
X
X
X
4.7K 0.47uF O
PANEL_STATUS
P_12V
P_5V
NOT SHARP 32&52",AUO
NOT CMO 57"
R1127 0
R1122
4.7K
R1197
0
SHARP 52",AUO
C1114
0.47uF
NOT SHARP 52",AUO
R1192
1K
RL_ON
NOT (CMO 32,42,47,57, SHARP 32")
R1183 0
C1116
2.2uF
25V
R1191
0
CMO 32,42,47,57
READY
R1155 0
I_DIMMING
1
3
5
7
9
11
13
15
17
19
21
23
16V
P_16V
GND
12V
P_12V
GND
5V
P_5V
5V
GND
R1125 0
R1126
2.7K
AGND
ACD
Inverter ON
R1187
PWM Dim R1132 0 R1104 0 CMO 57" 0
NOT CMO 32,42,47,57
SYNC
2
4
6
8
10
12
14
16
18
20
22
24
+5V_ST
+5V_MULTI
R1189
10K
R1190
1.2K
D1106
SAM2333
AC_DET
+5V_ST
R1138
4.7K
B
Q1106
RT1C3904-T112
L1106
UBW2012-121F
EAM38769505
P_16V
AC_RST
C
R1133
10K
C1121
0.47uF
E
P_12V
+5V_ST
3
Q1102
2
2SC3875S 1
DISP_EN
DC_DIM
R1139
1K
DC_DIM
C1125
2.2uF
25VPWM_DIM
SMAW200-24C
CMO 32,42,47,57
R1103 0
L1107
P_5V
C1138
220uF
16V
C1140
0.1uF
C1146
0.01uF
UBW2012-121F
R1163
0
E_DIMMING
1/10W
5%
P1100
C1139
0.1uF
R1184
10K
R1135 10K
R1188
0
READY
C1137
47uF25V
+5V_ST
R1129
10K READY
R1196 10K
0
C1150
0.01uF
*12V AUDIO and PANEL
L1112
+12V
MBW3216-501TF
+12V
EAM30764101 C1144
0.01uF
READY
R1105
+16V_NTP
C1148
0.1uF
C1122
0.1uF
+5V_ST
C1123
0.1uF
+5VST_MST
*SHARP 32" : DC DIMMING
P_5V
R1139-*1 100
1/10W
5%
R1185 0 CMO 32,42,47
R1186 0 CMO 57"
VIN
C1117
4.7uF
C1102
0.1uF
NC_2
2
7
3
6
4
5
R1
0
+3.3V_MST
R1106
18K
VO
R1140
33K
+3.3V_MULTI_MST
C1109
100uF16V
C1152
10uF
IC1103
AZ1117H-ADJTRE1(EH11A)
D1103
MBRS190T3G
INPUT
3
90V
1
S1
C
B
P_5V
R1166
3.3K
1%
OUTPUT
8
2
7
S2 3
6
G2
C1124
1uF
R1130
22K
+1.2V_VDDC_MST
C1118
100uF
16V
1
G1
Q1100
RT1C3904-T112
E
5%
2
C1128
100uF16V
R1134
10K
PANEL_ON
R1165
51
ADJ/GND
Q1101
SI4925DY
0TF492509AA
C1126
1uF 25V
R1141
33K
*Applied to SIF,HDMI,ADC,MPLL,AUD
NC_3
+12V
120OHM
L1111
R1115
R2
ADJ
120OHM
L1110
GND
32 Sharp
UBW2012-121F
D1102
S2A
50V
+5VST_MST
+5VST_MST
P_5V
V0 = 0.8(R1+R2) / R2
8
1
EN
R1107
5.6K
NC_1
NOT 32 Sharp
UBW2012-121F
SWITCH VCC_LCD:12V or 5V
5V:5V_PULLUP,5V_MULTI
IC1100
SC4215ISTRT
OUT:1.25V
4
5
EAM38769505
C1136
0.1uF
D1_1
R1128
10K
RL_ON
R1152
2.2K
R1153
2.2K
R1154
2.2K
C1149
100uF
16V
C1134
0.01uF
D2_2
L1105
UBW2012-121F
D2_1
C1135 EAM38769505
0.1uF
R1131
1.6K
ST 5V->3.3V->1.2V
VCC_LCD
L1104
UBW2012-121F
D1_2
+5V_MULTI
C1141
100uF
16V
C1142
0.1uF
C1129
C1130
C
B
Q1107
RT1C3904-T112
E
IC1105
(8)
AZ1117H-3.3
IC1104
C1103
0.01uF
L1101
22uH
VIN
LX
1
8
2
7
3
4
6
5
1
+5V_MULTI
RUN
+5V_MULTI
+5V_MULTI
INPUT
3
MAX 1A 1
FB
C1108
0.01uF
ADJ/GND
2
C1119
100uF
16V
C1113
2700pF
50V
AZ1117H-ADJTRE1(EH11A)
C1104
C1107
22uF
10uF
D1100
16V
16V
MBR230LSFT1G
30V
+5V_TUNER
R2
R1144 402
R1110
12K
R1120
7.5K
USB
INPUT
3
1
C1120
0.1uF
12V->5V_TUNER
R1
R1137
365
1%
20mA
C1151
100uF
16V
USB
C1110
100uF
16V
3
MAX 1A 1
ADJ/GND
IC1106
AZ1117H-1.8TRE1(EH13A)
C1132
0.01uF
R1170 0
2
3
1
ADJ/GND
2
R1169
OPT
+3.3V
*3.3V_NTP,TW9910,ETC.
C1133
10uF16V
C1156
0.1uF
R1151 0
5%
OUTPUT
5%
R1
C1155
47uF
16V
SWITCH 5V->DDR 2.5V
+3.3V_HDMI_SW
INPUT
C1131
0.1uF
R2
C1111
0.1uF
+5V_USB
1
C1154
0.1uF
R1149
0
OUTPUT
R1194
330
1%
R1195
110
1%
+5V_USB
INPUT
OUT:2.6V
+2.5V_VDDM_MST
USB
ADJ/GND
USB
2
OUTPUT
1%
OUTPUT
0.1uF
22uF
16V
R1148
AZ1117H-3.3
+3.3V_SDRAM
USB
USB
+3.3V_USB
IC1108
110mA
L1103
MBW3216-501TF
R1167
OPT
C1153
100uF
16V
IC1101
AZ1117H-ADJTRE1(EH11A)
USB
5%
L1108
120OHM
MBW3216-501TF
USB
C1101
0.1uF
R2
R1168 0
ADJ/GND
READY
L1109
IC1107
C1100
220uF
16V
MAX 1A 1
R1
R1123
110
1%
C1112
0.1uF
COMP
GND
3
OUTPUT
1%
OUTPUT
C1115
0.1uF
INPUT
2
R1124
330
ADJ/GND
READY
C1106
0.01uF
BST
3
2
R1111
59K
SS
R1102
47
+12V
INPUT
IC1102
MP2355DN-LF-Z
C1105
100uF
16V
L1100
MBW3216-501TF
OUT:UNDER 7.22V
READY
DCDC_7.22V_PIP
AZ1117H-ADJTRE1(EH11A)
equal to 220uF pad size
READY
DC-DC CONVERTER
R1150
OPT
C1145
47uF
16V
+1.8V
C1147 *NTP.USB,TW9910
0.1uF
TW9910 block
SWITCH 5V->3.3V->1.8V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright C 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only