Download ColdFire 2/2M Integrated Microprocessor User's Manual
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Integrated Memories Freescale Semiconductor, Inc. ROM base address register (i.e. the ROM must be based at $0000 if ROM_VLD is asserted). 5.3.2 ROM Programming Model Freescale Semiconductor, Inc... The configuration information in the ROM base address register (ROMBAR) controls the ROM module operation. The ROMBAR is accessible in supervisor mode as control register $C00 using the MOVEC instruction. All undefined bits are reserved and should always be written as zero. A hardware reset clears only the valid bit if ROM_VLD is negated. If ROM_VLD is asserted, ROMBAR is reset to $0121. This activates the ROM with a starting address of $0000 and all address spaces, except the CPU space, are allowed. This is shown below where the reset values in parenthesis are valid if ROM_VLD is asserted during a reset. BITS 31 16 FIELD BA RESET -(0) R/W W BITS 15 9 8 7 6 5 1 0 FIELD BA WP - AS V RESET -(0) -(1) - - 0(1) R/W W W - W W NOTE: The reset values in parenthesis are valid if the ROM_VLD signal is asserted during reset. ROM Base Address Register (ROMBAR) Field Definitions: 5.3.2.1 BA: ROMBAR[31:9]—BASE ADDRESS. Defines the base address for the ROM module address range. The number of valid base address bits in this field is a function of the ROM size as shown in Table 5-9. The base address is reset to $0 if ROM_VLD is asserted during reset. Table 5-9. Valid ROM Base Address Bits ROM SIZE 5-16 VALID BA BITS 512 BA[31:9] 1K BA[31:10] 2K BA[31:11] 4K BA[31:12] 8K BA[31:13] 16K BA[31:14] 32K BA[31:15] ColdFire2/2M User’s Manual For More Information On This Product, Go to: www.freescale.com MOTOROLA