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Chapter.book : ch6.doc
7 Tue Sep 17 12:21:10 1996
Commands
you enter a part type in the dialog box that is not from the selected
family, the family selection is ignored.
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Part Type indicates the part type of the FPGA device that you are
designing. The default part types are the following:
XC2000
XC2018VQ64
XC3000/3100
XC3020APC68
XC4000
XC4003APC84
XC5200
XC5210PC84
Pre-Synthesis Logic Reduction controls whether or or not
BLIFOPTX minimizes your design. By default, this option is
turned on, so XABEL minimizes the design by running BLIFOPTX
before SynthX. Although SynthX performs its own optimization,
it is preferable to run BLIFOPTX first for the following reasons:
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Your design may contain don’t-care information that only
BLIFOPTX can utilize.
Running BLIFOPTX first results in a smaller XNF file for
ImproveX to process.
It uses slightly different algorithms that in rare cases may yield
better results.
To turn off minimization in BLIFOPTX, deselect the Pre-Synthesis
Logic Reduction option. You may want to turn this option off if
BLIFOPTX takes an inordinately long time to finish.
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Optimize Options guides how SynthX optimizes the design. It can
be one of the following.
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Standard sets a compromise between area and speed; when it
is used, SynthX attempts to achieve a reasonable solution
instead of optimizing for either speed or area. This option is
the default.
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Area minimizes the number of CLBs used in the design.
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Speed makes the design as fast as possible.
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Xilinx ABEL User Guide
None does not optimize the design.
CLB Limit sets an upper limit on the number of CLBs used by
SynthX. It is meaningful only when used with the Speed and
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