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Appendix C
C.1.8 Hardware Breakpoint Supported Instructions
1. PC break:
all instructions type can support, but RPT inner instruction
not supported.
2. RAM break: all instruction type can support, but RPT inner instruction not
supported.
3. I/O break: only support following instruction type:
a) BS IO[address].b (address from 0x0 to 0xF)
b)
c)
d)
e)
BC IO[address].b (address from 0x0 to 0xF)
BTG IO[address].b (address from 0x0 to 0xF)
Rd = IO[address] (address from 0x0 to 0x7F)
IO[address] = Rs (address from 0x0 to 0x7F)
f) PUSH IO[address] (address from 0x0 to 0x7F)
g) POP IO[address] (address from 0x0 to 0x7F)
NOTE
RPT inner instruction not supported
4. Register break: only supports the following instructions:
a)
b)
c)
d)
Rd = Rs operate Rt
Rd = operate Rs
Rd = Rs
Rd = [Rs]
e) Rd = RAM address
f) Rd = #imm16
g) Rd = #imm8
h) [Rd++] = Rs
i) [Rd--] = Rs
j) [Rd++] = P[Rs++]
k) [Rd--] = P[Rs--]
l) POP Rd
m) SWAP Rd
NOTE
RPT inner instruction not supported.
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eSL/eAM Series (+eSLZ000) IDE User’s Guide