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PMePV6000
user
manual
FOR
ePV Series
Version 1.5
Date:2005/01/24
ELAN MICROELECTRONICS CORP.
No. 12, Innovation 1st RD., Science-Based Industrial Park
Hsin Chu City, Taiwan, R.O.C.
TEL: (03) 5639977
FAX: (03) 5780617
PMePV6000
VFD Controller
ICE TOP VIEW
68mm
95mm
1. Installation must be Authorized by EMC.
2. Power on the E8 ICE before executing the control software, or an error message due to lack of
hardware will appear.
3. E8 - ICE uses the printer port to communicate with host PC. If a user wants to use the printer, it is
recommended to install another printer port.
4. Power on switch located on the left side of ICE box. By switching left or right side to turn off or turn on
the ICE power.
5. Printer port and the adapter locate on the right side. The ICE connects to personal computer by
printer port. The adapter connects to the power. Be sure turn power off of ICE before plug in the
adapter for avoiding over current which may be burn the chip off.
6. On the top sight, we have two connections and one ePVZ6300 Romless chip and some switches. The
JP1 and the JP2 connect to the second layer of ICE for the code instruction accessing. The JP3 and
JP4 are more important for ICE user. They are the ePVZ6300 control signal and I/O ports. ICE user
can connect these connections to user's application board. The connections are list in Table 1.1.
7. The U1 is ePVZ6300 Romless chip. The U2 is a 32K bytes ROM for on board testing one day by
piggyback. If user have developed application code by this ICE. User can use PIGGYBACK (user can
buy from EMC) to connect to user's application board with 32K bytes EPROM (27c256). To verify
user's program.
8. The D1 is a LED that indicate power is on or off..
9. X1 is 32.768k crystal. C1 and C2 is capacitor 27p. C3 is PLL capacitor.(0.01u ..
0.047u)
10. ICE setup: (1) JP4 open (2) JP5 connect to VDD (3) JP6 open (4)JP7 connect to
VDD or GND
11. PIGGYBACK setup: (1)JP5 connect to GND (2)JP4 short (3)JP8 exterior power connect (4)JP7
connect to VDD or GND (5) U2=> 32k bytes EPROM (27C256). (User can use file “*.MIX” which
generate by WICE for masking EPROM. The *.mix file is a binary file and addressing from zero.)
12. Run WICE software to enter ICE environment.
13. Power up the VDD pin of the simulator first, and then VEE pin.
14. VEE pin must connect to HV or short to GND .
This specification is subject to change without further notice.
01/24/2005 (V1.5)
1
PMePV6000
VFD Controller
Table 1: ICE Connection
GR11/P11/SG18
GR12/P12/SG17
GR13/P13/SG16
GR14/P14/SG15
GR15/P15/SG14
GR16/P16/SG13
GR17/P17/SG12/KS12
GR18/P18/SG11/KS11
GR19/P19/SG10/KS10
SG1/KS1
pin
21
22
23
24
25
26
27
28
29
30
SG2/KS2
SG3/KS3
SG4/KS4
P24/SG5/KS5
P23/SG6/KS6
P22/SG7/KS7
P21/SG8/KS8
P20/SG9/KS9
N.C
N.C
pin
31
32
33
34
35
JP3
36
37
38
39
40
GPIO9,0
GPIO9,1
GPIO9,2
GPIO9,3
GPIO9,4
GPIO9,5
GPIO9,6
GPIO9,7
GPIOB,0
GPIOB,1
pin
41
42
43
44
45
46
47
48
49
50
GPIOB,2
GPIOB,3
GPIOB,4
GPIOB,5
GPIOB,6
GPIOC,0
GPIOC,1
GPIOC,2
GPIOC,3
N.C
pin
51
52
53
54
55
56
57
58
59
60
GPIOC,5/CLK
VEE
GPIOC,4/STB
N.C
GPIOC,7/DIN
VDD
GPIOC,6/Dout
N.C
VSS
VSS
D1
330
LED
VDD
VSS
P91
P93
P95
P97
PB1
PB3
PB5
PC0
PC2
VDD
PC0
PC1
PC2
PC3
STB
CLK
DOUT
DIN
/RESET
X2OUT
CA-1
ERS
CRYSTAL1
VDD
C1
VDD
ENPC
EPOR
CA0
CA1
CA2
CA3
CA4
CA5
CA6
CA7
CA8
CA9
CA10
CA11
CA12
CA13
CD0
CD1
27pf
27pf
R2
470k
/RESET
VFD CONNECT
VDD
VSS
VEE
JP8
C3
0.01uf
1
2
3
2.5 mm 座
C12
100uF/100v
VSS
C13
0.1uf
PLLC
L1
VDD
AVDD
C4
L2
4.7uF/16v
JP4
1
2
JP6
ENPC
VSS
JP5
VDD
ERS
VSS
1
2
3
1
2
JP7
VDD
EPOR
VSS
C9 0.1uf
VDD
VEE
SEG1
SEG2
SEG3
SEG4
P24
P23
P22
P21
P20
P19
P18
P17
P16
P15
P14
P13
P12
P11
P10
P9
P8
P7
P6
P5
P4
P3
P2
P1
VDD
C8
0.1uf
VSS
SMD 0805
VSS
/HOLD
VDD
ePVZ6300
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
VEE
NC102
NC101
VDD3
VEE
SG1
SG2
SG3
SG4
P24
P23
P22
P21
P20
P19
P18
P17
P16
P15
P14
P13
P12
P11
P10
P9
P8
P7
P6
P5
P4
P3
P2
P1
VDD2
NC69
NC68
NC67
NC66
NC65
C5
PHIOUT
VSS
32.768KHz
C2
NC1
NC2
NC3
NC4
NC5
GND
VDD1
PC0
PC1
PC2
PC3
STB
CLK
DOUT
DIN
RESET
X2OUT
CA-1
ERS
ENTCC
ENPC
EPOR
CA0
CA1
CA2
CA3
CA4
CA5
CA6
CA7
CA8
CA9
CA10
CA11
CA12
CA13
CD0
CD1
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
CD11
CD12
IRSEL
INSEND
/HOLD
IOD0
IOD1
IOD2
IOD3
IOD4
IOD5
IOD6
IOD7
VEE
VSS
NC128
PB6
PB5
PB4
PB3
PB2
PB1
PB0
AVSS
AVDD
NC118
CRYXRC
OSCO
OSCI
PLLC
P97
P96
P95
P94
P93
P92
P91
P90
NC105
NC104
NC103
C10
0.1uf
R1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
CD2
NC40
NC41
NC42
CD3
CD4
CD5
CD6
CD7
CD8
CD9
CD10
CD11
CD12
IRSEL
INSEND
/HOLD
IOD0
IOD1
IOD2
IOD3
IOD4
IOD5
IOD6
IOD7
PHIOUT
VSS
CD2
P2
P4
P6
P8
P10
P12
P14
P16
P18
SEG1
SEG3
P24
P22
P20
OSCO
P90
P92
P94
P96
PB0
PB2
PB4
PB6
PC1
PC3
CLK
STB
DIN
DOUT
VSS
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
OSCI
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
JP3
P1
P3
P5
P7
P9
P11
P13
P15
P17
P19
SEG2
SEG4
P23
P21
P97
P96
P95
P94
P93
P92
P91
P90
pin
11
12
13
14
15
16
17
18
19
20
CRYXRC
OSCO
OSCI
PLLC
GR1/P1
GR2/P2
GR3/P3
GR4/P4
GR5/P5
GR6/P6
GR7/P7
GR8/P8
GR9/P9/SG20
GR10/P10/SG19
PB6
PB5
PB4
PB3
PB2
PB1
PB0
AVSS
AVDD
pin
1
2
3
4
5
JP3
6
7
8
9
10
0.1uf
VSS
AVSS
SMD 0805
VDD
C7
68uF/16v
C6
0.1uf
1
2
3
VSS
This specification is subject to change without further notice.
01/24/2005 (V1.5)
2