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AX5320P 6 Channel Analog Output Board User’s Manual Disclaimers The information in this manual has been carefully checked and is believed to be accurate. AXIOMTEK Co., Ltd. assumes no responsibility for any infringements of patents or other rights of third parties which may result from its use. AXIOMTEK assumes no responsibility for any inaccuracies that may be contained in this document. AXIOMTEK makes no commitment to update or to keep current the information contained in this manual. AXIOMTEK reserves the right to make improvements to this document and/or product at any time and without notice. No part of this document may be reproduced, stored in a retrieval system, or transmitted, in any form or by any means, electronic, mechanical, photocopying, recording, or otherwise, without the prior written permission of AXIOMTEK Co., Ltd. Copyright 2002 by AXIOMTEK Co., Ltd. All rights reserved. June 2002, Version A2 Printed in Taiwan ii ESD Precautions Integrated circuits on computer boards are sensitive to static electricity. To avoid damaging chips from electrostatic discharge, observe the following precautions: ! Do not remove boards or integrated circuits from their anti-static packaging until you are ready to install them. ! Before handling a board or integrated circuit, touch an unpainted portion of the system unit chassis for a few seconds. This helps to discharge any static electricity on your body. ! Wear a wrist-grounding strap, available from most electronic component stores, when handling boards and components. Trademarks Acknowledgments AXIOMTEK is a trademark of AXIOMTEK Co., Ltd. IBM is a registered trademark of International Business Machines Corporation. Intel is a trademark of Intel Corporation. Other brand names and trademarks are the properties and registered brands of their respective owners. iii Unpacking The AX5320P is packed in an anti-static bag. The PCI Bus board has components that are easily damaged by static electricity. Do not remove the anti-static wrapping until proper precautions have been taken. Safety instructions in front of this User's Manual describe anti-static precautions and procedures. After unpacking the PCI Bus board, place it on a raised surface and carefully inspect the board for any damage that might have occurred during shipment. Ground the board and exercise extreme care to prevent damage to the board from static electricity. Integrated circuits will sometimes come out of their sockets during shipment. Examine all integrated circuits, to ensure that they are firmly seated. The AX5320P PCI Bus interface analog output board package includes the following: ! AX5320P Board ! AX5003 Extension Board ! Flat cable 40p 45cm x 1 ! AS59099 DAC Driver CD ! Ax5320P user's manual ! Warranty card Make sure that all of the items listed above are present. What To Do If There Is A Problem If there are damaged or missing parts, contact your supplier and/or dealer immediately. Do not attempt to apply power to the board if there is damage to any of its components. iv Table of Contents Chapter 1 Intorduction ------------------------------ 1 1.1 1.2 General Description ................................................. 1 Specifications........................................................... 2 1.2.1 1.2.2 1.2.3 1.2.4 D/A ...........................................................................2 Digital Input and Output.........................................3 Power Consumption ................................................3 Physical/Environmental ...........................................3 Chapter 2 Board Configuration and Installation ---------------------------- 5 2.1 2.2 Locator Diagram ....................................................... 5 Jumper Settings ....................................................... 6 2.2.1 2.2.2 2.3 Code Format ............................................................. 7 2.3.1 2.3.2 2.3.3 2.3.4 2.4 Unipolar Output .......................................................7 Bipolar Output .........................................................7 Current Sink ( 4 to 20 mA ) ......................................8 Current Sink ( 0 to 20 mA ) ......................................8 Connector Pin Assignments ..................................... 9 2.4.1 2.4.2 2.4.3 2.5 JP1 ~ JP12 ................................................................6 J1 ~ J6 ......................................................................6 CON1 Pin Assignments ............................................9 CON2 Pin Assignments .......................................... 10 P1 Pin Assignments ................................................ 11 Hardware Installation ............................................. 12 2.5.1 2.5.2 Board Installation .................................................. 12 AX5320P Extension Board Cable Connection ...... 13 Chapter 3 Register Format and Description -15 3.1 3.2 I/O Address Mapping .............................................. 15 Register Description .............................................. 16 3.2.1 3.2.2 Group_0 Registers.................................................. 17 Group_1 registers................................................... 18 Table of Contents v Chapter 4 Calibration -------------------------------19 4.1 D/A Calibration ....................................................... 19 4.1.1 4.1.2 4.1.3 4.1.4 4.1.5 4.1.6 Voltage Output ( Unipolar 0 ~ 5V ) ....................... 19 Voltage Output ( Unipolar 0 ~ 10V ) ..................... 20 Voltage Output ( Bipolar - 5 ~ + 5V ).................... 20 Voltage Output ( Bipolar - 10 ~ + 10V ) ................ 21 Current Sink( 0 ~ 20mA ) ........................................ 21 Current Sink( 4 ~ 20mA ) ........................................ 22 Appendix A Block Diagram -----------------------23 vi Table of Contents AX5320P 6 Channel Analog Output Board User’s Manual Chapter 1 Introduction 1.1 General Description The AX5320P is a PCI card providing 6 channels analog output and 8 digital inputs, and/or 8 digital outputs. The board interface allows its plugging into any PCI slot of an IBM™ PC/AT or compatible computer with PCI bus. The AX5320P features 6 channels of voltage output or current sink, each channel is individually user selectable to any of the following ranges: 0 to 5V, 0 to 10V, -5V to +5V, -10V to +10V, 0 to 20 mA or 4 to 20 mA current loop. There is one 12-bit D/A converter per channel for maximum 33KHz throughput. Typical applications for AX5320P include ON/OFF control, direct control valve positioning, waveform generation and utilizing a variable voltage output. The board can also be used for analog control in process or laboratory application where material transfer rates, fluid flow, power consumption, motor speed, temperature levels, etc., are to be controlled. Optional AX851 universal terminal panel is available to help facilitate external connections. Introduction 1 AX5320P 6 Channel Analog Output Board User’s Manual 1.2 Specifications 1.2.1 D/A # Analog Outputs ! Number of channels: 6 0 to 5V, 0 to 10V, ±5V, ±10V ! Output Ranges: 0-20mA, 4-20mA current sink ! Input data coding: Straight binary (unipolar) Offset binary (bipolar) ! Current Output, Voltage range: +/-5mA max. ! Source Impedance: 0.1 Ω max. 0.02 Ω typ. ! Capacitive Driver Capability: short circuit to common ! Protection: for voltage ranges, current outputs are short circuit, and reverse polarity protected. # Accuracy ! ! ! ! ! ! ! # Resolution: 12 bits Nonlinearity: +/- 1 LSB Differential Nonlinearity: +/- 1/2 LSB Inherent quantizing Error: +/- 1/2 LSB Gain Error: Adjustable to zero Zero Error: Adjustable to zero System Accuracy: +/- 0.025%FSR (Voltage out) +/- 0x05%FSR(Current out) Dynamic Performance ! Settling Time to 1/2 LSB # ( 10V step ): # ( 5V step ): ! Slew Rate: 33µs 16µs 0.3V/µs TYP(voltage) 1.2mA/µs(current) ! DAC Throughput # Single Channel 33kHz 2 Introduction AX5320P 6 Channel Analog Output Board User’s Manual # Thermal Characteristics ! ! ! ! Zero Drift: +/- 10µV/°C Gain Drift: +/-20ppm of FSR/°C Differential Linearity Drift: +/-3ppm of FSR/°C Monotonicity: Monotonic,0 to +60°C 1.2.2 Digital Input and Output ! ! ! ! Input Lines: 8 Output Lines: 8 Input/Output level: TTL/DTL compatible Electrical Characteristics # Logic High Input Voltage: # Logic Low Input Voltage: # Logic High Input Current: # Logic Low Input Current: # Logic # Logic # Logic # Logic 2V (MIN.) 0.8V (MAX.) 20µA (MAX.) at VIH=2.7V -0.2mA (MAX.) at VIL=0.4V High Output Voltage: 2.4V (MIN.) at IOH=3mA Low Output Voltage: 0.4V (MAX.) at IOL=12mA High Output Current: -0.4 mA source (MAX.) Low Output Current: 8 mA Sink (MAX.) 1.2.3 Power Consumption # +5V: 200mA # +12V: 300mA 1.2.4 Physical/Environmental # I/O Connector: # Dimensions: # Weight: 37-pin D-type male connector 40-pin male mating connector 175mm*106mm 270g # Operating temp Range: 0 o C to 70 o C # Relative Humidity: 0 to 90%; non-condensing Introduction 3 AX5320P 6 Channel Analog Output Board User’s Manual This page does not contain any information. 4 AX5320P 6 Channel Analog Output Board User’s Manual Chapter 2 Board Configuration and Installation WARNING: 2.1 When power is ON, hazardous voltages may be present in the AX5320P, do not touch the board and its wiring to prevent shock hazard Locator Diagram The following figure shows locations of jumpers and connectors. VR27 39 VR26 1 JP12 VR25 VR24 JP11 40 2 CON2 VR23 VR22 JP10 VR21 JP9 TP3 JP8 VR20 VR19 VR18 VR17 JP7 AX5320P VR16 JP6 VR15 VR14 JP5 TP2 JP4 VR13 VR12 VR11 VR10 JP3 VR9 VR8 JP2 VR7 VR6 JP1 VR5 J1 VR4 J2 J3 J4 J5 J6 VR2 VR1 TP1 Board Configuration and Installation CON1 VR3 5 AX5320P 6 Channel Analog Output Board User’s Manual 2.2 Jumper Settings 2.2.1 JP1 ~ JP12 JP1(DA1), JP3(DA2), JP5(DA3), JP7(DA4), JP9(DA5), JP11(DA6) Set DA channel to be current sink Set DA channel to be unipolar (voltage output ) Set DA channel to be bipolar ( voltage output ) JP2(DA1), JP4(DA2), JP6(DA3), JP8(DA4), JP10(DA5), JP12(DA6) Select DA reference voltage = external voltage Select DA reference voltage = -10V Select DA reference voltage = -5V or Current Sink 2.2.2 J1 ~ J6 J1(DA1), J2(DA2), J3(DA3), J4(DA4), J5(DA5), J6(DA6) Set DA as voltage output or current loop 0 ~ 20 mA Set DA as current sink 4 ~ 20 mA 6 Board Configuration and Installation AX5320P 6 Channel Analog Output Board User’s Manual 2.3 Code Format There are three kinks of reference voltage input ( -5V, -10V and external ) can be selected by the jumper JP2, JP4, JP6, JP8, JP10, JP12. W hen the voltage reference (Vref) is selected, this channel’s D/A voltage output range is from 0V to |Vref| for unipolar (UNI), -|Vref| to |Vref| for biplar (BIP). The reference signal can be DC or AC voltage. In this way, the D/A becomes a programmable atenuator. The equation for calculating output is: DAV = |Vref| *[code/4096] W here code is the data written to the D/A register, the range is between 0 to 4095. 2.3.1 Unipolar Output DAV = |Vref| *[code/4096] Binary Number in DAC MSB 1 1 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 Analog Output, DAV LSB 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 1 0 |Vref| *[4095/4096] |Vref|*[2048/4096]=1/2|Vref| |Vref|*[1/4096] 0 Volts 2.3.2 Bipolar Output DAV = |Vref| *[(code – 2048)/4096] Binary Number in DAC MSB 1 1 1 0 0 1 0 0 1 0 1 0 0 1 0 1 0 0 1 0 1 0 0 1 0 Analog Output, DAV LSB 1 0 0 1 0 1 0 0 1 0 1 0 0 1 0 1 0 0 1 0 1 0 0 1 0 1 0 0 1 0 1 1 0 1 0 Board Configuration and Installation |Vref| *[2047/2048] |Vref|*[1/2048] 0 Volts -|Vref|*[1/2048] -|Vref| 7 AX5320P 6 Channel Analog Output Board User’s Manual 2.3.3 Current Sink ( 4 to 20 mA ) Current Sink(mA) = 4mA + ( code/4096 ) * 16mA Current Sink (mA) Binary Number in DAC MSB 0 0 1 1 0 1 0 1 0 0 0 1 0 0 0 1 0 0 0 1 LSB 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 4 8 12 19.9961 2.3.4 Current Sink ( 0 to 20 mA ) Current Sink(mA) = ( code/4096 ) * 20mA Binary Number in DAC MSB 0 0 1 1 0 1 0 1 0 0 0 1 0 0 0 1 0 0 0 1 Current Sink (mA) LSB 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 5 10 19.99512 DAV x DAC AGND R(Load) 2K ohm Min. AX5320P Voltage Output connection AX5320P SINK x R(Load) + Power supply (6 - 36V) 20mA (Max.) I DAC ANGD Current Sink connection NOTE: 8 The users must also consider the power consumption (P) on R(Load), where P = I*V Board Configuration and Installation AX5320P 6 Channel Analog Output Board User’s Manual 2.4 Connector Pin Assignments The AX5320P 6 Channel Analog Output Board has two I/O connectors labeled CON1 and CON2 accessible from the expansion slot rear panel of the PC. The pin assignments for CON1 and CON2 are listed on the following subsections. 2.4.1 CON1 Pin Assignments CON1 VEXT 1 AGND NC VEXT 2 AGND NC VEXT 3 AGND NC VEXT 4 AGND NC VEXT 5 N/C DAV1~DAV6 SINK1~SINK6 28 29 30 31 32 AGND NC 37 NC VEXT 6 AGND 23 24 25 26 27 33 34 35 36 AGND Pin Name 20 21 22 1 DAV1 2 3 4 5 6 AGND SINK 1 DAV2 7 8 9 10 DAV3 11 12 13 AGND 14 15 AGND 16 17 18 19 DAV6 AGND SINK 2 AGND SINK 3 DAV4 SINK 4 DAV5 SINK 5 AGND SINK 6 NC Description (CON1) No connect Analog ground D/A voltage output channel_1 to channel_6 D/A current sink channel_1 to channel_6 Board Configuration and Installation 9 AX5320P 6 Channel Analog Output Board User’s Manual 2.4.2 CON2 Pin Assignments CON2 Pin Name N/C DI_0~DI_7 DO_0~DO_7 10 NC 40 39 NC NC 38 37 NC NC 36 35 NC NC 34 33 NC DGND 32 31 DO_7 DGND 30 29 DO_6 DGND 28 27 DO_5 DGND 26 25 DO_4 DGND 24 23 DO_3 DGND 22 21 DO_2 DGND 20 19 DO_1 DGND 18 17 DO_0 DGND 16 15 DI_7 DGND 14 13 DI_6 DGND 12 11 DI_5 DGND DGND 10 9 DI_4 8 7 DI_3 DGND 6 5 DI_2 DGND 4 3 DI_1 DGND 2 1 DI_0 Description (CON2) No connect Digital input channel_0 ~ channel_7 Digital output channel_0 ~ channel_7 Board Configuration and Installation AX5320P 6 Channel Analog Output Board User’s Manual 2.4.3 P1 Pin Assignments A cable connector to convert the CON2 (40-pin connector) to 37-pin male D-type connector is given along with the AX5320P board. Description for the cable connector is provided below. AX5320P extension board AX5003 pin assignment P1 DI_0 DI_1 DI_2 19 18 17 DI_3 DI_4 DI_5 DI_6 DI_7 16 15 14 13 12 DO_0 DO_1 DO_2 DO_3 DO_4 11 10 9 8 7 DO_5 DO_6 DO_7 NC NC 6 5 4 3 2 NC 1 37 36 DGND DGND 35 34 33 32 31 DGND DGND DGND DGND DGND 30 29 28 27 26 DGND DGND DGND DGND DGND 25 24 23 22 21 DGND DGND DGND DGND NC 20 NC Pin Name Description (CON2) DI_0~DI_7 Digital input channel_0 ~ channel_7 Digital output channel_0 ~ channel_7 DO_0~DO_7 Board Configuration and Installation 11 AX5320P 6 Channel Analog Output Board User’s Manual 2.5 Hardware Installation The AX5320P board is shipped with protective electrostatic cover. W hen unpacking, touch the board's electrostatically shielded packing with the metal frame of your computer to discharge the accumulated static electricity prior to touching the board. The following section summarizes the procedures when installing the AX5320P: WARNING: Turn OFF the PC and all accessories connected to the PC whenever installing or removing any peripheral board including the AX5425(0) series board. 2.5.1 Board Installation The following lists the instructions to follow when installing the AX5320P card. 1. Turn OFF the PC and all accessories power. 2. Unplug all power cords and entire cables from the rear of the PC. 3. Remove the PC's cover (see your PC Operation Guide if you are not skillful about it). 4. Find an unused expansion slot. Remove the blank expansion slot cover and save the screw for affixing retaining bracket. 5. Grab the upper edge of the AX5320P board. Align the AX5320P board's retaining bracket with the expansion slot rear panel, and straighten the board's gold finger with the expansion slot. Gently push the board into slot. 6. Restore the screw to the expansion slot-retaining bracket. 7. Replace the PC's cover and connect the cables you detached in step2. 8. Turn ON the power of the PC and other peripheral device. 12 Board Configuration and Installation AX5320P 6 Channel Analog Output Board User’s Manual 2.5.2 AX5320P Extension Board Cable Connection Refer to the following illustration for the proper cable connection from the AX5320P card to the AX5003 extension board. CON2 CON1 J1 P1 Board Configuration and Installation 13 AX5320P 6 Channel Analog Output Board User’s Manual This page does not contain any information. 14 AX5320P 6 Channel Analog Output Board User’s Manual Chapter 3 Register Format and Description 3.1 I/O Address Mapping The AX5320P use some non-consecutive addresses in I/O space. All registers are 8 bits wide. The base address (or starting address) is determined during the installation by CPU auto setting. This chapter describes each register's format and functions. Each register can be accessed easily by using direct I/O instructions of whatever application languages available (Assembly, Basic, Pascal, C, etc.). Don't operate any other I/O( NOT LISTED) , or else it happens errors. Location Base Address + 0 Base Address + 2 Base Address + 3 Base Address + 7 Function Enable external reset Group select control Group select control Group select control register status Type W W W R GROUP 0 Location Base Address + 0xc0 Base Address + 0xc4 Base Address + 0xc8 Base Address + 0xcc Base Address + 0xd0 Base Address + 0xd4 Base Address + 0xd8 Base Address + 0xdc Base Address + 0xe0 Base Address + 0xe4 Base Address + 0xe8 Base Address + 0xec Function D/A D/A D/A D/A D/A D/A D/A D/A D/A D/A D/A D/A 1 1 2 2 3 3 4 4 5 5 6 6 Low byte High byte Low byte High byte Low byte High byte Low byte High byte Low byte High byte Low byte High byte Register Format and Description Type W W W W W W W W W W W W 15 AX5320P 6 Channel Analog Output Board User’s Manual GROUP 1 Location Function Base Address + 0xc0 W 8 channels digital input 8 channels digital output Base Address + 0xc0 3.2 Type R Register Description Base address + 0 (write) X X X X X X X RST RST = 0 disable RESET function on AX5320P RST = 1 enable RESET function on AX5320P, when system (PC) reset, the AX5320P will be reset. Base address + 2 (write) X X X IRQ X X SG1 SG0 When the start or initiation of the program, users must output a value 0x03(or 0x0f) to Base Address + 0x02 to set the IRQ signal is input to and the SG0, SG1 are output from the PCI bridge. Base address + 3 (write) X X X X X X SG1 SG0 SG1 SG0 SG1, SG0 are action low SG1 SG0 1 0 Select/Enable Group 0 Description 0 1 Select/Enable Group 1 Base address + 7 (read) X X X IRQ X X Group selects control register status. 16 Register Format and Description AX5320P 6 Channel Analog Output Board User’s Manual 3.2.1 Group_0 Registers NOTE: When users program the registers in Group_0, they must check if the I/O port Base address + 2 has an output value 0x03(or 0x0f), and the I/O port Base address + 3 has an output value 0x02 to enable the functions in Group_0. Base address + 0xc0 B4 B3 Base address + 0xc4 B12 B11 Base address + 0xc8 B4 B3 Base address + 0xcc B12 B11 D/A 1 Low byte B2 B3 B10 B11 B2 B3 B11 Base address + 0xe0 B4 B3 B9 B1 B10 X B8 B7 B6 B5 X X X X B9 B8 B7 B6 B5 X X X B7 B6 B5 X X X B7 B6 B5 X X X D/A 3 Low byte B2 B1 X D/A 3 High byte B10 B9 B8 D/A 4 Low byte B2 Base address + 0xdc B12 X D/A 2 high byte Base address + 0xd8 B4 X D/A 2 Low byte Base address + 0xd4 B12 X D/A 1 high byte Base address + 0xd0 B4 B1 B1 X D/A 4 High byte B10 B9 B8 D/A 5 Low byte B2 Register Format and Description B1 X 17 AX5320P 6 Channel Analog Output Board User’s Manual Base address + 0xe4 B12 B11 B10 Base address + 0xe8 B4 B3 B9 B8 B7 B6 B5 X X X B7 B6 B5 D/A 6 Low byte B2 Base address + 0xec B12 D/A 5 High byte B1 X D/A 6 High byte B11 B10 B9 B8 3.2.2 Group_1 registers NOTE: When users program the registers in Group_1, they must check if the I/O port Base address + 2 has an output value 0x03(or 0x0f), and the I/O port Base address + 3 has an output value 0x01 to enable the functions in Group_1. Base address + 0xc0 DI_7 DI_6 DI_5 Base address + 0xc0 DO_7 18 DO_6 8 channels D/I DI_4 DI_3 DI_2 DI_1 DI_0 8 channels D/O DO_5 DO_4 DO_3 DO_2 DO_1 DO_0 Register Format and Description AX5320P 6 Channel Analog Output Board User’s Manual Chapter 4 Calibration 4.1 D/A Calibration D/A adjustment is executed for AX5320P D/A calibration.The D/A output voltage can be measured by a DVM or directly to other AXIOMTEK’s A/D cards. Step 1: Connect TP1(+) and AGND(-) to multimeter(recmmend HP34401A). Trim VR1 to measure the voltage equal +2.5000V. Step 2: Connect TP2(+) and AGND(-), trim VR3 to measure the voltage equal –10.0000V. Step 3: Connect TP3(+) and AGND(-), trim VR2 to measure the voltage equal –5.0000V. Step 4: Run the calibration program cal5320p.exe and conform it. 4.1.1 Voltage Output ( Unipolar 0 ~ 5V ) DAV1 DAV2 DAV3 DAV4 DAV5 DAV6 Set JP1 JP3 JP5 JP7 JP9 JP11 Unipolar Set JP2 JP4 JP6 JP8 JP10 JP12 Vref=-5V Base + Output 0xc0 0xf0 0xc8 0xf0 0xd0 0xf0 0xd8 0xf0 0xe0 0xf0 0xe8 0xf0 D/A Low Byte Base + Output 0xc4 0xff 0xcc 0xff 0xd4 0xff 0xdc 0xff 0xe4 0xff 0xec 0xff D/A High Byte Trim VR16 VR18 VR20 VR22 VR24 VR26 Measure 4.99878V Calibration 19 AX5320P 6 Channel Analog Output Board User’s Manual 4.1.2 Voltage Output ( Unipolar 0 ~ 10V ) DAV1 DAV2 DAV3 DAV4 DAV5 DAV6 Set JP1 JP3 JP5 JP7 JP9 JP11 Unipolar Set JP2 JP4 JP6 JP8 JP10 JP12 Vref=-10V Base + Output 0xc0 0xf0 0xc8 0xf0 0xd0 0xf0 0xd8 0xf0 0xe0 0xf0 0xe8 0xf0 D/A Low Byte Base + Output 0xc4 0xff 0xcc 0xff 0xd4 0xff 0xdc 0xff 0xe4 0xff 0xec 0xff D/A High Byte Trim VR16 VR18 VR20 VR22 VR24 VR26 Measure 9.99756V 4.1.3 Voltage Output ( Bipolar - 5 ~ + 5V ) DAV3 DAV4 Set JP1 DAV1 JP3 JP5 JP7 JP9 JP11 Bipolar Set JP2 JP4 JP6 JP8 JP10 JP12 Vref=-5V Base + Output 0xc0 0x00 0xc8 0x00 0xd0 0x00 0xd8 0x00 0xe0 0x00 0xe8 0x00 D/A Low Byte Base + Output 0xc4 0x00 0xcc 0x00 0xd4 0x00 0xdc 0x00 0xe4 0x00 0xec 0x00 D/A High Byte trim VR17 VR19 VR21 VR23 VR25 VR27 Measure –5V Base + output 0xc0 0xf0 0xc8 0xf0 0xd0 0xf0 0xd8 0xf0 0xe0 0xf0 0xe8 0xf0 D/A Low Byte Base + Output 0xc4 0xff 0xcc 0xff 0xd4 0xff 0xdc 0xff 0xe4 0xff 0xec 0xff D/A High Byte Trim VR16 VR18 VR20 VR22 VR24 VR26 Measure +4.99756V 20 DAV2 DAV5 DAV6 Calibration AX5320P 6 Channel Analog Output Board User’s Manual 4.1.4 Voltage Output ( Bipolar - 10 ~ + 10V ) DAV1 DAV2 DAV3 DAV4 DAV5 DAV6 Set JP1 JP3 JP5 JP7 JP9 JP11 Bipolar Set JP2 JP4 JP6 JP8 JP10 JP12 Vref=-10V Base + Output 0xc0 0x00 0xc8 0x00 0xd0 0x00 0xd8 0x00 0xe0 0x00 0xe8 0x00 D/A Low Byte Base + Output 0xc4 0x00 0xcc 0x00 0xd4 0x00 0xdc 0x00 0xe4 0x00 0xec 0x00 D/A High Byte Trim VR17 VR19 VR21 VR23 VR25 VR27 Measure –10V Base + Output 0xc0 0xf0 0xc8 0xf0 0xd0 0xf0 0xd8 0xf0 0xe0 0xf0 0xe8 0xf0 D/A Low Byte Base + Output 0xc4 0xff 0xcc 0xff 0xd4 0xff 0xdc 0xff 0xe4 0xff 0xec 0xff D/A High Byte Trim VR16 VR18 VR20 VR22 VR24 VR26 Measure +9.99512V 4.1.5 Current Sink( 0 ~ 20mA ) SINK1 SINK2 SINK3 SINK4 SINK5 SINK6 Set JP1 JP3 JP5 JP7 JP9 JP11 Current Sink Set JP2 JP4 JP6 JP8 JP10 JP12 Vref=-5V Set J1 J2 J3 J4 J5 J6 Open Base + Outpu t 0xc0 0xf0 0xc8 0xf0 0xd0 0xf0 0xd8 0xf0 0xe0 0xf0 0xe8 0xf0 D/A Low Byte Base + Outpu t 0xc4 0xff 0xcc 0xff 0xd4 0xff 0xdc 0xff 0xe4 0xff 0xec 0xff D/A High Byte Trim VR4 VR5 VR6 VR7 VR8 VR9 Measure 20.0mA Calibration 21 AX5320P 6 Channel Analog Output Board User’s Manual 4.1.6 Current Sink( 4 ~ 20mA ) SINK1 SINK2 SINK3 SINK4 SINK5 SINK6 Set JP1 JP3 JP5 JP7 JP9 JP11 Current Sink Set JP2 JP4 JP6 JP8 JP10 JP12 Vref=-5V Set J1 J2 J3 J4 J5 J6 Short Base + Outpu t 0xc0 0xf0 0xc8 0xf0 0xd0 0xf0 0xd8 0xf0 0xe0 0xf0 0xe8 0xf0 D/A Low Byte Base + Outpu t 0xc4 0xff 0xcc 0xff 0xd4 0xff 0xdc 0xff 0xe4 0xff 0xec 0xff D/A High Byte Trim VR4 VR5 VR6 VR7 VR8 VR9 Measure 20.0mA Base + Outpu t 0xc0 0x00 0xc8 0x00 0xd0 0x00 0xd8 0x00 0xe0 0x00 0xe8 0x00 D/A Low Byte Base + Outpu t 0xc4 0x00 0xcc 0x00 0xd4 0x00 0xdc 0x00 0xe4 0x00 0xec 0x00 D/A High Byte Trim VR10 VR11 VR12 VR13 VR14 VR15 Measure 4.0mA 22 Calibration AX5320P 6 Channel Analog Output Board User’s Manual Appendix A Block Diagram DAV1 VEXT 1 SINK1 DOUBLE BUFFER 12 BIT DAC AGND DAV2 VEXT 2 SINK2 DOUBLE BUFFER 12 BIT DAC AGND DAV3 VEXT 3 SINK3 SG0 P C I B U S P C I B R I D G E DOUBLE BUFFER 12 BIT DAC AGND DAV4 VEXT 4 DATA BUS SINK4 DOUBLE BUFFER 12 BIT DAC AGND DAV5 VEXT 5 SINK5 SG1 DOUBLE BUFFER 12 BIT DAC AGND DAV6 VEXT 6 SINK6 DOUBLE BUFFER 12 BIT DAC IRQ ADDRESS DECODE Block Diagram AGND 8 CH. DI/DO OUTPUT BYTE INPUT BYTE 8 8 23