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set clk2cpu_max 1.455
set clk2cpu_min 1.011
set clk2fpga_max 1.505
set clk2fpga_min 1.074
# Equations for CPU to FPGA:
set iMax_cpu [expr $clk2cpu_max + $cpu_tco_max + $cpu2fpga_max - $clk2fpga_min]
set imin_cpu [expr $clk2cpu_min + $cpu_tco_min + $cpu2fpga_min - $clk2fpga_max]
# FPGA’s inputs from CPU:
set_input_delay -max -clock cpu_clk_ext $iMax_cpu [get_ports i_cpu_*]
set_input_delay -min -clock cpu_clk_ext $imin_cpu [get_ports i_cpu_*]
That makes for a nicely descriptive SDC file, with the benefit of auto-calculating new
requirements if the user changes the board delays or parameters of the external device. The only
problem is that the final value isn’t apparent without doing the math by hand. The user could
add something like the following to their .sdc to echo the calculated value to the messages:
puts “iMax_cp => $iMax_cpu \n imin_cpu => $imin_cpu”
The problem is that you still have to find it in the messages. Running report_sdc allows
the user to quickly find:
Of course, the user could also run basic timing analysis on the path:
report_timing -setup -detail full_path -from [get_ports i_cpu*] -panel_name “s: i_cpu*”
report_timing -hold -detail full_path -from [get_ports i_cpu*] -panel_name “s: i_cpu*”
This will analyze the paths based on the constraints, and as discussed in correlating
constraints to timing reports, the iExt delays would be 7.381ns in the setup report and 3.428ns in
the hold report.
The report_sdc command is also useful if looking at constraints from an SDC created
elsewhere, such as Altera’s DDR2/3 IP cores. The user won’t hand-edit machine-generated SDC
files, but can use report_sdc to see what constraints were added.
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