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Hardware Reference
3.8
Display interface
The interface module provides a display interface with outputs for a:
•
VGA or SVGA monitor connected to J30
•
Sharp LQ084V1DG2 8.4 inch TFT VGA LCD panel connected to J14
•
Generic LCD and touchscreen connector.
A suitable peripheral for driving these types of display is the PrimeCell CLCD
controller (PL110).
RED
Video
DAC
(U20)
B24
GREEN
BLUE
HSYNC
CLK
VSYNC
B25
B27
B28
Buffers
(U12/U13)
LCD1_[23:0]
Enable
LCD0_CLK
LCD0_HSYNC
LCD0_VSYNC
LCD0_R[5:0]
Buffers
(U11/U12)
Enable
LCD0_G[5:0]
LCD0_B[5:0]
LCD0_ENAB
LCD0_R/L
LCD0_U/D
Generic LCD (J27)
B26
Sharp LQ084V1DG2 (J14)
EXPA Socket
B[23:0]
VGA connector (J30)
Figure 3-17 shows the architecture of the display interface. The diagram shows the
signals used to provide pixel data and for buffer control. B27 is used to enable the
signals on J27 and B28 is used to enable the buffers for the Sharp display signals on J14.
Figure 3-17 Display interfaces
ARM DUI 0152C
Copyright © 2001. All rights reserved.
3-17