Download MCF5206e ColdFire Integrated Microprocessor User's Manual

Introduction
Freescale Semiconductor, Inc.
INSTRUCTION
OPERAND SYNTAX
OPERAND SIZE
OPERATION
MACL
32 × 32 + 32 → 32
32 → 32
8,16,32
32
16
32
8
ACC + (Ry × Rx){<< 1 | >> 1} → ACC
ACC + (Ry × Rx){<< 1 | >> 1} → ACC; (<ea>y{&MASK}) → Rw
<ea>y → <ea>x
ACC → Rx
CCR → Dx
MACSR → Rx
MACSR →CCR
MASK → Rx
SR → Dx
Ry → ACC
#<data> → ACC
Dy → CCR
#<data> → CCR
Ry → MACSR
#<data> → MACSR
Ry → MASK
#<data> → MASK
Source → SR
MULS
Ry,Rx<shift>
Ry,Rx<shift>,<ea>y,Rw
<ea>y,<ea>x
ACC,Rx
Dx
MACSR,Rx
MACSR,CCR
MASK,Rx
Dx
Ry,ACC
#<data>,ACC
Dy,CCR
#<data>,CCR
Ry,MACSR
#<data>,MACSR
Ry,MASK
#<data>,MASK
Dy,SR
#<data>,SR
<ea>y,Ax
Ry,Rc
list,<ea>x
<ea>y,list
#<data>,Dx
Ry,Rx<shift>
Ry,Rx<shift>,<ea>y,Rw
Ry,Rx<shift>
Ry,Rx<shift>,<ea>y,Rw
<ea>y,Dx
MULU
<ea>y,Dx
NEG
NEGX
NOP
NOT
OR
12
ORI
PEA
PULSE
REMS
<ea>x
<ea>x
none
<ea>
Dy,<ea>x
<ea>y,Dx
#<data>,Dx
<ea>
none
<ea>y,Dx:Dw
13
REMU
<ea>y,Dx:Dw
32
14
RTE
RTS
Scc
none
none
Dx
none
none
8
STOP
SUB
#<data>
Dy,<ea>x
<ea>y,Dx
<ea>y,Ax
#<data>,Dx
#<data>,<ea>x
16
32
32
32
32
32
2
3
MOVE
MOVE from ACC
MOVE from CCR
MOVE from MACSR
4
MOVE from MASK
MOVE from SR
MOVE to ACC
MOVE to CCR
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MOVE to MACSR
MOVE to MASK
6
MOVE to SR
7
MOVEA
MOVEC
MOVEM
8
MOVEQ
MSAC
MSACL
9
1
11
15
SUBA
SUBI
SUBQ
16
1-14
32
16
32
32
8
32
32
32
16
16,32 → 32
32
32
32
8 → 32
32 - 16 × 16 → 32
32 → 32
32 - 32 × 32 → 32
32 → 32
16 x 16 → 32
32 x 32 → 32
16 x 16 → 32
32 x 32 → 32
32
32
none
32
32
32
32
none
32
Source → Destination
Ry → Rc
Listed Registers → Destination
Source → Listed Registers
Sign-extended Immediate Data→ Destination
ACC – (Ry × Rx){<< 1 | >> 1} → ACC
ACC – (Ry × Rx){<< 1 | >> 1} → ACC, (<ea>y{&MASK}) → Rw
ACC – (Ry × Rx){<< 1 | >> 1} → ACC
ACC – (Ry × Rx){<< 1 | >> 1} → ACC; (<ea>y{&MASK}) → Rw
Source × Destination → Destination
Signed operation
Source × Destination → Destination
Unsigned operation
0 – Destination → Destination
0 – Destination – X → Destination
Synchronize Pipelines; PC + 2 → PC
~ Destination → Destination
Source | Destination → Destination
Immediate Data | Destination → Destination
SP – 4 → SP; Address of <ea> → (SP)
Set PST= $4
Dx/<ea>y → Dw {32-bit Remainder}
Signed operation
Dx/<ea>y → Dw {32-bit Remainder}
Unsigned operation
(SP+2) → SR; SP+4 → SP; (SP) → PC; SP + FormatField → SP
(SP) → PC; SP + 4 → SP
If Condition True, Then 1's → Destination;
Else 0's → Destination
Immediate Data → SR; Enter Stopped State
Destination – Source→ Destination
Destination – Source→ Destination
Destination – Immediate Data → Destination
Destination – Immediate data → Destination
MCF5206e USER’S MANUAL
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