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Chapter 3 Hardware Overview This chapter presents an overview of the hardware functions on your AT E Series board. Figure 3-1 shows the block diagram for the AT-MIO-16E-1 and AT-MIO-16E-2 Calibration DACs Voltage REF 3 Mux Mode Selection Switches Muxes Calibration Mux 12-Bit Sampling A/D Converter NI-PGIA Gain Amplifier – I/O Connector 2 AI Control EEPROM IRQ DMA Analog Trigger Circuitry Trigger Data Transceivers Dither Circuitry Configuration Memory Trigger Level DACs ADC FIFO Analog Input Timing/Control DMA/ Interrupt Request PFI / Trigger Trigger Timing Counter/ Timing I/O DAQ - STC Bus Interface Digital I/O Analog Output Timing/Control RTSI Bus Interface Digital I/O (8) 8 Analog Input Control EEPROM DMA Control Interface DAQ-STC Bus DAQ-PnP Interface Analog Output Control 8255 DIO Control Plug and Play Bus Interface 3 AT – I/O Channel (8) + Analog Data (16) (8) AO Control DAC FIFO DAC0 Data (16) DAC1 6 Calibration DACs RTSI Bus Figure 3-1. AT-MIO-16E-1 and AT-MIO-16E-2 Block Diagram National Instruments Corporation 3-1 AT-MIO/AI E Series User Manual
