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Download Intel Xeon E7-8890 v2
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Integrated I/O (IIO) Configuration Registers Type: Bus: Offset: Bit CFG 0 0x180 PortID: Device: Attr Default N/A 4Function:0-7 Description descriptor_error: 3:3 RW1CS The DMA channel sets this bit indicating that the current transfer has encountered an error (not otherwise covered under other error bits) when reading or executing a DMA descriptor. When this bit has been set and the channel returns to the Halted state, the address of the failed descriptor is in the Channel Status register. 0x0 nxt_desc_addr_err: 2:2 RW1CS Next Descriptor Address Error. The DMA channel sets this bit indicating that the current descriptor has an illegal next descriptor address including an alignment error (not on a 64byte boundary). When this bit has been set and the channel returns to the Halted state, the address of the failed descriptor is in the Channel Status register. 0x0 dma_xfrer_daddr_err: 1:1 RW1CS DMA Transfer Destination Address Error. The DMA channel sets this bit indicating that the current descriptor has an illegal destination address. When this bit has been set, the address of the failure descriptor has been stored in the Channel Status register. 0x0 dma_trans_saddr_err: 0:0 14.4.37 RW1CS DMA Transfer Source Address Error. The DMA channel sets this bit indicating that the current descriptor has an illegal source address. When this bit has been set, the address of the failure descriptor has been stored in the Channel Status register. 0x0 CHANERRMSK_INT Internal DMA Channel Error Mask Registers. Type: Bus: Offset: CFG 0 0x184 PortID: Device: Bit Attr Default 31:19 RV - N/A 4Function:0-7 Description Reserved. mask18: 18:18 RWS (Function 0-1) RO (Function 2-7) 0x0 This register is a bit for bit mask for the CHANERR_INT register 0: enable 1: disable mask17: 17:17 RWS (Function 0-1) RO (Function 2-7) 0x0 This register is a bit for bit mask for the CHANERR_INT register 0: enable 1: disable mask16: 16:16 RWS 0x0 This register is a bit for bit mask for the CHANERR_INT register 0: enable 1: disable 15:15 RO 0x0 chanerrintmskro: Intel® Xeon® Processor E7-2800/4800/8800 v2 Product Family Datasheet Volume Two: Functional Description, February 2014 331
