Download Intel Core i7 Processor I7-940
Transcript
Electrical Specifications Figure 2-4. VTT Static and Transient Tolerance Load Line Itt [A] (sum of Itta and Ittd) 0 5 10 15 20 25 0.0500 0.0375 0.0250 0.0125 0.0000 V t t V -0.0125 Vtt Maximum -0.0250 -0.0375 -0.0500 -0.0625 -0.0750 -0.0875 Vtt Typical -0.1000 -0.1125 -0.1250 Vtt Minimum -0.1375 -0.1500 -0.1625 -0.1750 -0.1875 -0.2000 -0.2125 Table 2-11. DDR3 Signal Group DC Specifications Symbol Parameter VIL Input Low Voltage VIH Input High Voltage VOL VOH Output Low Voltage Output High Voltage Min Typ Max Units Notes1 — 0.43*VDDQ V 2,4 0.57*VDDQ — — V 3 — (VDDQ / 2)* (RON / (RON+RVTT_TERM)) — V — VDDQ – ((VDDQ / 2)* (RON/(RON+RVTT_TERM)) — V RON DDR3 Clock Buffer On Resistance 21 — 31 Ω RON DDR3 Command Buffer On Resistance 16 — 24 Ω RON DDR3 Reset Buffer On Resistance 25 — 75 Ω RON DDR3 Control Buffer On Resistance 21 — 31 Ω RON DDR3 Data Buffer On Resistance 21 — 31 Ω N/A N/A ±1 mA DDR_COMP0 COMP Resistance 99 100 101 Ω 5 DDR_COMP1 COMP Resistance 24.65 24.9 25.15 Ω 5 COMP Resistance 128.7 130 131.30 Ω 5 ILI DDR_COMP2 Input Leakage Current 4 Notes: 1. Unless otherwise noted, all specifications in this table apply to all processor frequencies. 2. VIL is defined as the maximum voltage level at a receiving agent that will be interpreted as a logical low value. 3. VIH is defined as the minimum voltage level at a receiving agent that will be interpreted as a logical high value. Datasheet 27