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3.9.1 – North Bridge Chipset Configuration Sub-Menu
This menu gives options for customizing memory & Hypertransport settings.
Select a menu by highlighting it using the Arrow (Ç/È) keys and pressing Enter.
The settings are described on the following pages.
Main
Advanced
BIOS Setup Utility
PCI/PnP
Boot
Security
Chipset
Exit
NorthBridge Chipset Configuration
← → Select Screen
↑↓ Select Item
Enter Go to Sub Screen
F1 General Help
F10 Save and Exit
ESC Exit
Memory Configuration
ECC Configuration
DRAM Timing Configuration
IOMMU Option Menu
Memory CLK
CAS latency (Tcl)
RAS/CAS Delay (Trcd)
Min Active RAS (Tras)
Row Precharge Time (Trp)
RAS/RAS Delay (Trrd)
Row Cycle (Trc)
:XXX MHz
:XX
:X CLK
:X CLK
:X CLK
:X CLK
:XX CLK
Feature
Option
NorthBridge Chipset Configuration
Description
Memory CLK
Read only
It shows the clock frequency of the
installed SDRAM.
CAS Latency (Tcl)
Read only
This controls the timing delay (in clock
cycles) before SDRAM starts a read
command after receiving it.
Read only
When DRAM is refreshed, both rows
and columns are addressed
separately. This setup item allows you
to determine the timing of the transition
from RAS (row address strobe) to CAS
(column address strobe). The less the
clock cycles, the faster the DRAM
performance.
RAS/CAS Delay (Trcd)
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