Download clevo d900f

Preface
Notebook Computer
D900F
Service Manual
Preface
I
Preface
Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained
herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent vendor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are
they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication.
This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or
reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publication, except for copies kept by the user for backup purposes.
Preface
Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of
their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement
of that product or its manufacturer.
Version 1.0
June 2009
Trademarks
Intel and Intel Core are trademarks of Intel Corporation.
Windows® is a registered trademark of Microsoft Corporation.
Other brand and product names are trademarks and/or registered trademarks of their respective companies.
II
Preface
About this Manual
This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and
inspection of personal computers.
It is organized to allow you to look up basic information for servicing and/or upgrading components of the D900F series
notebook PC.
The following information is included:
Chapter 1, Introduction, provides general information about the location of system elements and their specifications.
Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade
elements of the system.
Preface
Appendix A, Part Lists
Appendix B, Schematic Diagrams
III
Preface
IMPORTANT SAFETY INSTRUCTIONS
Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to persons when using any electrical equipment:
Preface
1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet
basement or near a swimming pool.
2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of electrical shock from lightning.
3. Do not use the telephone to report a gas leak in the vicinity of the leak.
4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may
explode. Check with local codes for possible special disposal instructions.
5. This product is intended to be supplied by a Listed Power Unit (Full Range AC/DC Adapter – AC Input 100 - 240V,
50 - 60Hz, DC Output 19V, 1.57A).
This Computer’s Optical Device is a Laser Class 1 Product
IV
Preface
Instructions for Care and Operation
The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:
1.
Don’t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
Do not expose the computer
to any shock or vibration.
2.
Do not place anything heavy
on the computer.
Keep it dry, and don’t overheat it. Keep the computer and power supply away from any kind of heating element. This
is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
Do not leave it in a place
where foreign matter or moisture may affect the system.
Don’t use or store the computer in a humid environment.
Do not place the computer on
any surface which will block
the vents.
Preface
Do not expose it to excessive
heat or direct sunlight.
3.
Do not place it on an unstable
surface.
Follow the proper working procedures for the computer. Shut the computer down properly and don’t forget to save
your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not turn off the power
until you properly shut down
all programs.
Do not turn off any peripheral
devices when the computer is
on.
Do not disassemble the computer by yourself.
Perform routine maintenance
on your computer.
V
Preface
4.
5.
Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage your data.
Take care when using peripheral devices.
Use only approved brands of
peripherals.
Unplug the power cord before
attaching peripheral devices.
Preface
Power Safety
The computer has specific power requirements:
VI
•
•
Power Safety
Warning
•
Before you undertake
any upgrade procedures, make sure that
you have turned off the
power, and disconnected all peripherals
and cables (including
telephone lines). It is
advisable to also remove your battery in
order to prevent accidentally turning the
machine on.
•
•
•
Only use a power adapter approved for use with this computer.
Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are
unsure of your local power specifications, consult your service representative or local power company.
The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do
not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one.
When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire.
Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices.
Before cleaning the computer, make sure it is disconnected from any external power supplies.
Do not plug in the power
cord if you are wet.
Do not use the power cord if
it is broken.
Do not place heavy objects
on the power cord.
Preface
Battery Precautions
• Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer.
• Do not remove any batteries from the computer while it is powered on.
• Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the
computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire.
• Recharge the batteries using the notebook’s system. Incorrect recharging may make the battery explode.
• Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service
personnel.
• Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode
or leak if exposed to fire, or improperly handled or discarded.
• Keep the battery away from metal appliances.
• Affix tape to the battery contacts before disposing of the battery.
• Do not touch the battery contacts with your hands or metal objects.
Preface
Battery Disposal
The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of
its useful life, under various state and local laws, it may be illegal to dispose of this battery into the municipal
waste stream. Check with your local solid waste officials for details in your area for recycling options or proper
disposal.
Caution
Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer. Discard used battery according to the manufacturer’s instructions.
VII
Preface
Related Documents
You may also need to consult the following manual for additional information:
Preface
User’s Manual on CD
This describes the notebook PC’s features and the procedures for operating the computer and its ROM-based setup program. It also describes the installation and operation of the utility programs provided with the notebook PC.
VIII
Preface
Contents
Introduction ..............................................1-1
Overview .........................................................................................1-1
System Specifications .....................................................................1-2
External Locator - Top View with LCD Panel Open ......................1-4
External Locator - Front & Right side Views .................................1-5
External Locator - Left Side & Rear View .....................................1-6
External Locator - Bottom View .....................................................1-7
Mainboard Overview - Top (Key Parts) .........................................1-8
Mainboard Overview - Bottom (Key Parts) ....................................1-9
Mainboard Overview - Top (Connectors) .....................................1-10
Mainboard Overview - Bottom (Connectors) ...............................1-11
Overview .........................................................................................2-1
Maintenance Tools ..........................................................................2-2
Connections .....................................................................................2-2
Maintenance Precautions .................................................................2-3
Disassembly Steps ...........................................................................2-4
Removing the Battery ......................................................................2-5
Removing the Optical (CD/DVD) Device ......................................2-6
Removing the Hard Disk Drive .......................................................2-7
Removing the Keyboard ..................................................................2-9
Removing the System Memory (RAM) ........................................2-10
Removing the Processor ................................................................2-14
Removing the VGA Card ..............................................................2-15
Installing the VGA Card ...............................................................2-17
Removing the Wireless LAN Module ...........................................2-18
Removing the Bluetooth Module ..................................................2-19
Removing the Modem ...................................................................2-20
Removing the TV Tuner Card .......................................................2-21
Part Lists ..................................................A-1
Part List Illustration Location ........................................................ A-2
Top ................................................................................................. A-3
Bottom ........................................................................................... A-4
LCD ............................................................................................... A-5
Mainboard ...................................................................................... A-6
Blu-Ray Combo ............................................................................. A-7
DVD Super Multi .......................................................................... A-8
Schematic Diagrams................................. B-1
System Block Diagram ...................................................................B-2
LGA1366 Part A DDR3 1/2 ...........................................................B-3
LGA1366 Part B DDR3 2/2 ...........................................................B-4
LGA1366 Part C QPI ......................................................................B-5
LGA1366 Part C Power ..................................................................B-6
LGA1366 Part E GND, Thermal ....................................................B-7
DDR3 Channel A SO-DIMM_0 .....................................................B-8
DDR3 Channel B SO-DIMM_1 .....................................................B-9
DDR3 Channel C SO-DIMM_2 ...................................................B-10
X58 QPI Interface .........................................................................B-11
X58 PCIEX16, PCIEX4, DMI ......................................................B-12
X58 Misc ......................................................................................B-13
X58 PWR ......................................................................................B-14
X58 GND ......................................................................................B-15
ICH10 DMI/PCIE/USB/SATA ....................................................B-16
ICH10 PCI/SPI/Other ...................................................................B-17
ICH10 Power/GND ......................................................................B-18
Intel Debug Card & Fan Control ..................................................B-19
Clock Generator CV193 ...............................................................B-20
IX
Preface
Disassembly ...............................................2-1
Removing the Intel Turbo Memory Card ..................................... 2-22
Preface
Preface
MXM3.0 PCI-E ............................................................................ B-21
MXM PWR, SATA ODD ............................................................ B-22
HDMI & e-SATA ......................................................................... B-23
DVI-I ............................................................................................ B-24
LCD, INT ..................................................................................... B-25
Card Reader/1394 ......................................................................... B-26
RTL8111C .................................................................................... B-27
ALC662 / AMP TP6047A-4 ........................................................ B-28
KBC-ITE IT8512E ....................................................................... B-29
Mini WLAN/ TMP/ TPA6017A2 ................................................ B-30
Daughter CONN ........................................................................... B-31
SATA HDD/ CCD/ BT/ PC BEEP .............................................. B-32
New Card/ MDC/ TV/ Robson ..................................................... B-33
Audio Board ................................................................................. B-34
Card Reader Board ....................................................................... B-35
Click Board .................................................................................. B-36
Hotkey Board ............................................................................... B-37
Switch Board ................................................................................ B-38
USB Board ................................................................................... B-39
Power CPU_VTT ......................................................................... B-40
Power 1.5V, 0.75VS, 12V ............................................................ B-41
Power 1.8VS, 1.1VS .................................................................... B-42
Power AC_In, Charge .................................................................. B-43
Power Switch, ICH_1.1VS ........................................................... B-44
Power VCORE ............................................................................. B-45
Power VDD3, VDD5 ................................................................... B-46
Power Delivery Chart ................................................................... B-47
Power Sequence Diagram ............................................................ B-48
X
Introduction
Chapter 1: Introduction
Overview
This manual covers the information you need to service or upgrade the D900F series notebook computer. Information
about operating the computer (e.g. getting started, and the Setup utility) is in the User’s Manual. Information about drivers (e.g. VGA & audio) is also found in User’s Manual. That manual is shipped with the computer.
Operating systems (e.g. Windows XP, Windows Vista, etc.) have their own manuals as do application software (e.g. word
processing and database programs). If you have questions about those programs, you should consult those manuals.
1.Introduction
The D900F series notebook is designed to be upgradeable. See “Disassembly” on page 2 - 1 for a detailed description
of the upgrade procedures for each specific component. Please note the warning and safety information indicated by the
“” symbol.
The balance of this chapter reviews the computer’s technical specifications and features.
Overview 1 - 1
Introduction
System Specifications
Processor
i7-965 (3.20 GHz, 6.4 GT/s, 8M L3 Cache, 45nm, LGA1366 Package)
Up to three (Option) Changeable 2.5" 9.5 mm (h) SATA (Serial) Hard
Disk Drives supporting RAID level 0/1/5
One 12.7 mm Super Multi/Blu-Ray SATA Optical Device Drive (Option)
i7-940 (2.93 GHz, 4.8 GT/s, 8M L3 Cache, 45nm, LGA1366 Package)
Pointing Device
Intel® Core® i7 Processor
i7-920 (2.66 GHz, 4.8 GT/s, 8M L3 Cache, 45nm, LGA1366 Package)
Core Logic
Intel® X58 + ICH10R
1.Introduction
Storage
Built-in TouchPad (scrolling key functionality integrated)
Keyboard
Display
“WinKey” keyboard (with embedded numeric keypad)
Three Instant Keys (WWW, e-mail, Application)
17.1” WUXGA (1920 * 1200) TFT LCD
Audio
Memory
High Definition Audio Compliant Interface
Compliant with Microsoft UAA (Universal Audio Architecture)
S/PDIF Digital Output
Supports 5.1 Channel Analog Outputs
4 * Built-In Speakers
Built-In Microphone
Three 64-bit wide DDRIII (DDR3) data channels
Three 204 Pin SO-DIMM Sockets Supporting DDRIII (DDR3) 1066/
1333MHz Memory Modules
Memory Expandable up to 6GB
Note: Use either 1066MHz OR 1333MHz DDRIII (DDR3) Modules Do not mix DRAM speeds
Video Adapter
nVIDIA® GeForce GTX 280M PCIe *16 Video Card
1GB GDDR3 Video RAM on board
Supports Microsoft DirectX® 10.0
Supports HDCP
BIOS
One 16Mbit Flash ROM
Phoenix™ BIOS
1 - 2 System Specifications
Slots
One ExpressCard/34/54 Slot
Three Mini Card Slots:
• Slot 1 for PCIe WLAN Module
• Slot 2 for USB TV Tuner Module
Card Reader
Embedded 7-in-1 Card Reader (MS/ MS Pro/ SD/ Mini SD/ MMC/ RS
MMC/ MS Duo) Note: MS Duo/ Mini SD/ RS MMC Cards require a PC
adapter
Introduction
Communication
Operating System
10Mb/100Mb/1000Mb Base-T Ethernet LAN
Windows Vista Home Premium/ Business/ Enterprise/ Ultimate
56K MDC Modem, V.90 & V.92 Compliant
802.11b/g Wireless LAN Mini-Card Module (Option)
Intel® WiFi Link 5300 Series (3*3 - 802.11a/g/n) Wireless LAN MiniCard Module (Option)
Intel® WiFi Link 5100 Series (1*2 - 802.11a/g/n) Wireless LAN MiniCard Module (Option)
Note that the TV Tuner module (factory) option in Windows Vista is
supported by the Windows Media Center software which comes builtin to the Windows Vista Home Premium and Ultimate Editions only.
Power
Security
Battery
Kensington Lock
BIOS Password
12 Cell Smart Lithium-Ion Battery Pack, 6600mAh
1.Introduction
Bluetooth 2.1 + EDR (Enhanced Data Rate) Module (Factory Option)
Full Range AC/DC Adapter
AC Input: 100 - 240V, 50 - 60Hz
DC Output: 20V, 11A or 19V, 11.6A (220 Watts)
2.0M/3.0M Pixel USB PC Camera Module (Factory Option)
Environmental Spec
Interface
Four USB 2.0 Ports
One HDMI (High-Definition Multimedia Interface) Port with Audio
Output (with HDCP Support)
One DVI-Out Port (no HDCP Support)
One eSATA Port (hot swapping supported in Windows Vista only)
One S/PDIF Out Jack
One Headphone-Out Jack
One Microphone-In Jack
One Mini-IEEE1394a Port
One Line-In Jack for Audio Input
One RJ-45 LAN Jack
One RJ-11 Modem Jack
One DC-in Jack
One Cable (CATV) Antenna (Analog/Digital) Jack (Functions with
Optional USB TV Tuner Module)
One Consumer Infrared Transceiver
(Functions with Optional USB TV Tuner Module)
Temperature
Operating:
5°C - 35°C
Non-Operating: -20°C - 60°C
Relative Humidity
Operating:
20% - 80%
Non-Operating: 10% - 90%
Dimensions & Weight
397mm (w) * 298mm (d) * 51 - 60mm (h)
5.4 kg
Optional
One 12.7 mm Super Multi/Blu-Ray SATA Optical Device Drive
PCIe or USB Mini-Card Wireless LAN Module (see “Communication”
on page 1 - 3)
USB Mini-Card Hybrid TV Tuner Module
USB Bluetooth 2.1 + EDR Module (Factory Option - see
“Communication” on page 1 - 3)
USB PC Camera Module (Factory Option - see “Communication”
on page 1 - 3)
System Specifications 1 - 3
Introduction
Figure 1
External Locator - Top View with LCD Panel Open
1.Introduction
Top View
1. Optional Built-In
PC Camera
2. LCD
3. LED Power &
Communication
Indicators
4. Built-In
Microphone
5. LED Status
Indicators
6. Hot Key Buttons
7. Power Button
8. Keyboard
9. Speakers
10. Game Hot Keys
11. Touchpad &
Buttons
1
2
4
3
6
5
9
9
8
10
11
1 - 4 External Locator - Top View with LCD Panel Open
7
Introduction
External Locator - Front & Right side Views
Figure 2
Front Views
1
7
1
7
2 3 4 5 6
Figure 3
Right Side Views
8. USB Ports
9. Security Lock
Slot
8
8
9
External Locator - Front & Right side Views 1 - 5
1.Introduction
1. LCD Latches
2. Consumer
Infrared
Transceiver*
3. Line-In Jack
4. S/PDIF-Out Jack
5. Microphone-In
Jack
6. Headphone-Out
Jack
7. Speakers
Introduction
External Locator - Left Side & Rear View
Figure 4
1.Introduction
Left Side View
1. HDMI-Out Port
2. e-SATA Port
3. Cable (CATV)
Antenna Jack*
4. RJ-11 Phone Jack
5. RJ-45 LAN Jack
6. Mini-IEEE 1394
Port
7. ExpressCard Slot
(see page 2 - 7)
8. Optical Device
Drive Bay (for
DVD Device)
9. 7-in-1 Card
Reader
2
1
7
6
3
4
9
8
5
Figure 5
Rear View
10. Vent/Fan Intake
11. DC-In Jack
12. DVI-Out Port
10
1 - 6 External Locator - Left Side & Rear View
11
12
10
10
Introduction
External Locator - Bottom View
Figure 6
Bottom View
4
1
1
2
1
3
Overheating
To prevent your computer from overheating
make sure nothing
blocks the vent/fan intakes while the computer is in use.
External Locator - Bottom View 1 - 7
1.Introduction
1
1. Fan Outlet/Intake
2. Battery
(Secondary HDD
Bay - HDD3)
3. Primary HDD
Bay (HDD1 & 2)
4. Component Bay
Cover
Introduction
Figure 7
Mainboard Overview - Top (Key Parts)
1.Introduction
Mainboard Top
Key Parts
1. Mini-Card
Connector (WLAN
Module)
2. Mini-Card
Connector (TV
Module)
3. Mini-Card
Connector
(Robson Module)
3
1
2
1 - 8 Mainboard Overview - Top (Key Parts)
Introduction
Mainboard Overview - Bottom (Key Parts)
Figure 8
Mainboard Bottom
Key Parts
1.
2.
3.
4.
5.
CPU Socket
North Bridge
South Bridge
KBC ITE IT8512E
Memory Slots
DDR2 So-DIMM
6. VGA Socket
5
6
1.Introduction
1
2
4
3
Mainboard Overview - Bottom (Key Parts) 1 - 9
Introduction
Figure 9
Mainboard Overview - Top (Connectors)
1.Introduction
Mainboard Top
Connectors
1. CCD Cable
Connector
2. LCD Cable
Connector
3. LED Cable
Connector
4. Wire Cable
Connector
5. SPK 1 Connector
6. Bluetooth Module
Connector
7. MDC Module
Connector
8. AP-Key Cable
Connector
9. Touch Pad
Connector
10. SW1 Connector
11. SPK 2 Connector
12. Keyboard Cable
Connector
13. USB Cable
Connector
14. Audio Cable
Connector
15. RTC Battery
Connector
16. SPK Sub Cable
Connector
17. Card Reader Board
Connector
1
4
5
2
3
6
10
9
8
11
7
12
13
16 15 14
17
1 - 10 Mainboard Overview - Top (Connectors)
Introduction
Mainboard Overview - Bottom (Connectors)
Figure 10
Mainboard Bottom
Connectors
1. CPU Fan Cable
Connector
2. System Fan
Cable Connector
3. DDR Fan Cable
Connector
4. VGA Fan Cable
Connector
3
1
2
Mainboard Overview - Bottom (Connectors) 1 - 11
1.Introduction
4
1.Introduction
Introduction
1 - 12
Disassembly
Chapter 2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the D900F series notebook’s parts and subsystems.
When it comes to reassembly, reverse the procedures (unless otherwise indicated).
We suggest you completely review any procedure before you take the computer apart.
To make the disassembly process easier each section may have a box in the page margin. Information contained under
the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the disassembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previous disassembly procedure. The amount of screws you should be left with will be listed here also.
Information
A box with a will also provide any possible helpful information. A box with a contains warnings.
An example of these types of boxes are shown in the sidebar.
Warning
Overview 2 - 1
2.Disassembly
Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the User’s Manual but are
repeated here for your convenience.
Disassembly
NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the
battery is removed too).
Maintenance Tools
The following tools are recommended when working on the notebook PC:
2.Disassembly
•
•
•
•
•
•
M3 Philips-head screwdriver
M2.5 Philips-head screwdriver (magnetized)
M2 Philips-head screwdriver
Small flat-head screwdriver
Pair of needle-nose pliers
Anti-static wrist-strap
Connections
Connections within the computer are one of four types:
2 - 2 Overview
Locking collar sockets for ribbon connectors
To release these connectors, use a small flat-head screwdriver to
gently pry the locking collar away from its base. When replacing the connection, make sure the connector is oriented in the
same way. The pin1 side is usually not indicated.
Pressure sockets for multi-wire connectors
To release this connector type, grasp it at its head and gently
rock it from side to side as you pull it out. Do not pull on the
wires themselves. When replacing the connection, do not try to
force it. The socket only fits one way.
Pressure sockets for ribbon connectors
To release these connectors, use a small pair of needle-nose pliers to gently lift the connector away from its socket. When replacing the connection, make sure the connector is oriented in
the same way. The pin1 side is usually not indicated.
Board-to-board or multi-pin sockets
To separate the boards, gently rock them from side to side as
you pull them apart. If the connection is very tight, use a small
flat-head screwdriver - use just enough force to start.
Disassembly
Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a removal and/or replacement job, take the following precautions:
Power Safety
Warning
Before you undertake
any upgrade procedures, make sure that
you have turned off the
power, and disconnected all peripherals
and cables (including
telephone lines). It is
advisable to also remove your battery in
order to prevent accidentally turning the
machine on.
Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth.
Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.
Overview 2 - 3
2.Disassembly
1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other
components could be damaged.
2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight.
3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage components and/or data. You should also monitor
the position of magnetized tools (i.e. screwdrivers).
4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly
damaged.
5. Be careful with power. Avoid accidental shocks, discharges or explosions.
•Before removing or servicing any part from the computer, turn the computer off and detach any power supplies.
•When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire.
6. Peripherals – Turn off and detach any peripherals.
7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity.
Before handling any part in the computer, discharge any static electricity inside the computer. When handling a
printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that
you use an anti-static wrist strap instead.
8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands produce oils which can attract corrosive elements.
9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted
to charged surfaces, reducing performance.
10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as
screws, loose inside the computer.
Disassembly
Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM
THE DISASSEMBLY STEPS IN THE ORDER INDICATED.
To remove the Battery:
1. Remove the battery
To remove the Wireless LAN Module:
page 2 - 5
To remove the Optical Device:
2.Disassembly
1. Remove the battery
2. Remove the Optical device
page 2 - 5
page 2 - 6
To remove the HDD:
1. Remove the battery
2. Remove the HDD
page 2 - 5
page 2 - 7
To remove the Keyboard:
1. Remove the battery
2. Remove the Keyboard
page 2 - 5
page 2 - 9
To remove the System Memory:
1. Remove the battery
2. Remove the System Memory
2 - 4 Disassembly Steps
To remove the Bluetooth Module:
1. Remove the battery
2. Remove the Keyboard
3. Remove the Bluetooth
page 2 - 5
page 2 - 9
page 2 - 19
To remove the Modem:
1. Remove the battery
2. Remove the Keyboard
3. Remove the Modem
page 2 - 5
page 2 - 9
page 2 - 20
page 2 - 5
page 2 - 10
1. Remove the battery
2. Remove the Keyboard
3. Remove the TV tuner card
page 2 - 5
page 2 - 14
To remove the Intel Turbo Memory Card:
To remove the VGA card:
1. Remove the battery
2. Remove the VGA card
page 2 - 5
page 2 - 9
page 2 - 18
To remove the TV Tuner Card:
To remove the Processor:
1. Remove the battery
2. Remove the Processor
1. Remove the battery
2. Remove the Keyboard
3. Remove the Wireless LAN
page 2 - 5
page 2 - 15
page 2 - 5
page 2 - 9
page 2 - 21
1. Remove the battery
page 2 - 5
2. Remove the Keyboard
page 2 - 9
3. Remove the Intel Turbo Memory card page 2 - 22
Disassembly
Removing the Battery
Figure 1
If you are confident in undertaking upgrade procedures yourself, for safety reasons it is best to remove the battery.
1.
2.
3.
4.
a. Loosen screws.
b. Release the battery.
c. Lift the battery out of the
bay as indicated.
Turn the computer off, and turn it over.
Loosen screws 1 - 3 .
Release the battery.
Lift the battery 4 (Figure b) out of the bay as indicated.
a.
Battery Removal
b.
2.Disassembly
4
1
2
3
c.
4
4. Battery
• 3 Screws
Removing the Battery 2 - 5
Disassembly
Figure 2
Optical Device
Removal
1.
2.
3.
4.
5.
Turn off the computer, and turn it over and remove the battery (page 2 - 5).
Locate the hard disk bay cover and remove screws 1 - 4 , and remove the bay cover 5 .
Remove screw 6 .
Use the screwdriver to push the optical device 7 out of the computer at point 8 .
Reverse the process to install the new device.
a.
b.
2.Disassembly
a. Remove the screws.
b. Remove the cover.
c. Remove the screw and
push the optical device
out of the computer at
point 8.
Removing the Optical (CD/DVD) Device
4
1
5
2
3
c.
5
6
5. Hard Disk Bay Cover
7. Optical Device
• 5 Screws
2 - 6 Removing the Optical (CD/DVD) Device
7
8
Disassembly
Removing the Hard Disk Drive
Figure 3
The hard disk drive is mounted in a removable case and can be taken out to accommodate other 2.5" SATA hard disk
drives with a height of 9.5mm (h). Follow your operating system’s installation instructions, and install all necessary drivers and utilities (as outlined in Chapter 4 of the User’s Manual) when setting up a new hard disk.
a. Remove the screws.
b. Remove the cover
c. Release the cable and lift
the hard disk assembly
up out off the computer.
d. Remove the screws and
separate the HDD(s)
from the bracket and
connector.
Hard Disk Upgrade Process
Turn off the computer, and turn it over and remove the battery (page 2 - 5).
Locate the hard disk bay cover and remove screws 1 - 4 .
Remove the bay cover 5 .
Remove screws 6 - 8 and pull the tab to release the cable 9 from hard disk assembly.
Lift the hard disk assembly 10 out of the computer.
Remove screws 11 - 18 .
Separate the hard disk(s) 21 from the bracket 19 and connector cable 20 .
Reverse the process to install a new hard disk(s).
c.
a.
d.
2.Disassembly
1.
2.
3.
4.
5.
6.
7.
8.
HDD Assembly
Removal
13
9
1
2
3
4
14
19
12
7
11
6
15
16
18
8
17
b.
21
9
20
5. Hard Disk Bay Cover
10. Hard Disk Assembly
19. HDD Braket
21. HDD
• 15 Screws
10
5
Removing the Hard Disk Drive 2 - 7
Disassembly
Removing the Hard Disk(s) in the Secondary HDD Bay
Figure 4
Secondary HDD
Assembly Removal
Turn off the computer, and turn it over and remove the battery.
The secondary hard disk bay is located under the battery compartment.
Remove screw 1 .
Slide the hard disk assembly in the direction of the arrow 2 .
Lift the hard disk assembly 3 out of the compartment.
Remove the screws 4 - 7 to release the hard disk from the case.
a.
b.
2.Disassembly
a. Remove the screws and
slide the hard disk assembly in the direction fo
the arrow.
b. Lift the hard disk assembly out off the computer.
c. Remove the screws to release the hard disk from
the case.
1.
2.
3.
4.
5.
6.
2
1
c.
4
3
5
3. Hard Disk Assembly
• 5 Screws
7
6
2 - 8 Removing the Hard Disk Drive
Disassembly
Removing the Keyboard
1. Turn off the computer, and turn it over and remove the battery (page 2 - 5).
2. Turn the computer back over to access the keyboard.
3. Press the four keyboard latches 1 - 4 at the top of the keyboard to elevate the keyboard from its normal position
(you may need to use a small screwdriver to do this).
4. Carefully lift the keyboard 5 up, being careful not to bend the keyboard ribbon cable 6 (Figure c).
5. Disconnect the keyboard ribbon cable 6 from the locking collar socket 7 .
6. Carefully lift up the keyboard 5 (Figure d) off the computer.
a.
Figure 5
Keyboard Removal
a. Press the four latches to
release the keyboard.
b. Lift the keyboard up.
c. Disconnect the cable
from the locking collar.
d. Remove the keyboard.
c.
2
3
4
7
Re-Inserting the Keyboard
When re-inserting the
keyboard firstly align
the five keyboard tabs
at the bottom (Figure
b) at the bottom of the
keyboard with the slots
in the case.
d.
b.
5
5. Keyboard
5
Keyboard Tabs
Removing the Keyboard 2 - 9
2.Disassembly
6
1
Disassembly
Figure 6
RAM Module
Removal
2.Disassembly
a. Remove the screws.
b. Lift off the bay cover.
c. Remove the screws
and disconnect the
fan cable.
d. Remove the RAM
fan.
Removing the System Memory (RAM)
The computer has two memory sockets for 200 pin Small Outline Dual In-line Memory Modules (SO-DIMM) DDR III
(DDR3) supporting 667/800 MHz. The main memory can be expanded up to 6GB. The SO-DIMM modules supported
are 1024MB and 2048MB DDR Modules. The total memory size is automatically detected by the POST routine once
you turn on your computer.
Memory Upgrade Process
1.
2.
3.
4.
5.
Turn off the computer, and turn it over and remove the battery (page 2 - 5).
Locate the memory (RAM) bay cover and remove screws 1 - 10 .
Lift off the bay cover 11 .
Remove screws 12 - 14 from the RAM fan, and disconnect the fan cable 15 .
Remove the RAM fan unit 16 .
a.
c.
1
Caution
The heat sink, and
CPU area in general,
contains parts which
are subject to high temperatures. Allow the
area time to cool before
removing these parts.
2
3
10
9
d.
8
7
6
5
16
4
14
12
13
B.
11
11. Bay Cover
16. RAM Fan Unit
• 13 Screws
2 - 10 Removing the System Memory (RAM)
15
Disassembly
6. Fully loosen screws 17 - 23 in the order indicated here (and on the label) and disconnect te hcable 24 .
7. Carefully (make sure all the screws are sufficiently loosened and cables disconnected) remove the heat sink and
fan unit 25 .
e.
f.
e. Loosen the screws
and disconnect the
cable.
f. Remove the heat
sink and fan unit.
g. Pull the release
latch(es).
h. Remove the module(s).
20
19
25
22
17
18
24
23
8. Gently pull the two release latches 26 & 27 on the sides of the memory socket in the direction indicated by
the arrows (Figure g).
9. The RAM module 28 will pop-up (Figure h), and you can then remove it.
g.
h.
27
Contact Warning
Be careful not to touch
the metal pins on the
module’s
connecting
edge. Even the cleanest hands have oils
which can attract particles, and degrade the
module’s performance.
27
28
26
26
10. Pull the latches to release the second module if necessary.
11. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot.
12. The module’s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the socket
as it will go. DO NOT FORCE the module; it should fit without much pressure.
13. Press the module in and down towards the mainboard until the slot levers click into place to secure the module.
14. Replace the heat sink unit, RAM fan, cover and screws.
15. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.
25. heatsink and fan
unit
28. RAM Module(s)
• 7 Screws
Removing the System Memory (RAM) 2 - 11
2.Disassembly
21
Figure 7
RAM Module
Removal (cont’d.)
Disassembly
Figure 8
Third RAM
Module Removal
a. Press the four latches to release the
keyboard.
b. Lift the keyboard up.
c. Remove the screws
and keyboard plate.
Upgrading a Third System Memory (RAM) Module
If you wish to add a third memory module follow the procedure below (note the sidebar warning on RAM speeds).
1. Turn off the computer, and turn it over and remove the battery.
2. Turn the computer back over to access the keyboard.
3. Press the four keyboard latches 1 - 4 at the top of the keyboard to elevate the keyboard from its normal position
(you may need to use a small screwdriver or pair of tweezers to do this).
a.
2.Disassembly
1
3
2
4
RAM Module Speeds
Use either 1066MHz
OR 1333MHz DDRIII
(DDR3) modules of the
same brand. Do not mix
DRAM speeds/brands
in order to prevent unexpected system behavior.
4. Lift the keyboard up, but be careful not to twist the keyboard ribbon cable 5 .
5. Remove screws 6 - 7 and remove the keyboard plate 8 .
b.
c.
6
7
5
8. Keyboard Plate
• 2 Screws
2 - 12 Removing the System Memory (RAM)
8
Disassembly
6. Gently pull the two release latches ( 9 - 10 ) on the sides of the memory socket in the direction indicated by the
arrows in Figure 9
7. The RAM module 11 will pop-up, and you can remove it.
d.
Figure 9
Third RAM Module
Removal (cont’d.)
e.
9
d. Pull
the
release
latch(es).
e. Remove the module(s).
11
Contact Warning
8. Pull the latches to release the second module if necessary.
9. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory socket.
10. The module’s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the socket
as it will go. DO NOT FORCE the module; it should fit without much pressure.
11. Press the module in and down towards the mainboard until the socket levers click into place to secure the module.
12. Replace the keyboard plate, screws and keyboard.
13. Restart the computer to allow the BIOS will register the new memory configuration as it starts up.
Be careful not to touch
the metal pins on the
RAM module’s connecting edge. Even the
cleanest hands have
oils which can attract
particles, and degrade
the module’s performance.
28. RAM Module
Removing the System Memory (RAM) 2 - 13
2.Disassembly
10
Disassembly
Figure 10
Processor Removal
a. Press and hold the latch.
b. Move the latch and
bracket fully in the direction to unlock the CPU.
c. Lift the CPU out of the
socket.
Removing the Processor
1.
2.
3.
4.
5.
6.
Turn off the computer, and turn it over, remove the battery (page 2 - 5) and RAM (page 2 - 10).
Press down and hold the latch 1 (with the latch held down you will be able to release it).
Move the latch 2 and bracket 3 fully in the direction indicated to unlock the CPU.
Carefully (it may be hot) lift the CPU 4 up out of the socket (Figure c).
Reverse the process to install a new CPU.
When re-inserting the CPU, pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!).
c.
a.
2.Disassembly
4
1
Caution
The heat sink, and CPU
area in general, contains parts which are
subject to high temperatures. Allow the area
time to cool before removing these parts.
b.
2
3
4. CPU
2 - 14 Removing the Processor
Disassembly
Removing the VGA Card
1.
2.
3.
4.
5.
6.
Figure 11
VGA Card Removal
Turn off the computer, and turn it over and remove the battery (page 2 - 5).
Locate the VGA bay cover and remove screws 1 - 10 .
Lift off the bay cover 11 .
Remove screws 12 - 14 from the VGA card fan and disconnect the fan cable 15 .
Remove the VGA card fan 16 .
Remove screws 17 - 20 from the heatsink in the order indicated on the label.
a.
1
c.
2
3
10
8
7
6
5
2.Disassembly
9
a. Remove the screws.
b. Remove the cover.
c. Remove the screws and
disconnect the cable(s).
d. Release the VGA card
fan.
e. Remove the screws.
4
14
15
12
13
b.
e.
d.
11
17
18
16
19
20
11. Bay Cover
20. VGA card fan
VGA Card Fans
• 17 Screws
Removing the VGA Card 2 - 15
Disassembly
Figure 12
VGA Card Removal
(cont’d.)
f. Remove the VGA module from slot A.
h. Remove the VGA module.
7. Grip the handle and carefully remove the heatsink 21 .
8. Remove screws 22 & 23 from the video card.
9. Carefully remove the VGA card module 24 from the mainboard.
f.
g.
21
2.Disassembly
21
23
10. Reverse the process to install a new VGA card modules.
21. VGA Card Heatsink
24. VGA Card Module
• 2 Screws
2 - 16 Removing the VGA Card
24
Disassembly
Installing the VGA Card
Figure 13
VGA Card
Installation
a. Carefully Insert the VGA
Card.
2.Disassembly
1. Prepare to fit the VGA card 24 into the slot by holding it at about a 30° angle.
2. The card needs to be fully into the slot, and the VGA card and socket have a guide-key and pin which align to allow
the card to fit securely.
3. Fit the connectors firmly into the socket, straight and evenly.
4. DO NOT attempt to push one end of the card in ahead of the other.
5. The card’s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the socket
as it will go (none of the gold colored contact should be showing). DO NOT FORCE the card; it should fit without
much pressure.
6. Secure the card with screw 22 & 23 (Figure 12f on page 2 - 16).
7. Place the heatsink 24 back on the card, and secure the screws in the order indicated in Figure 11 on page 2 15.
8. Attach the VGA card fan and secure with the screws as indicated in Figure 11 on page 2 - 15.
9. Reinsert the component bay cover, and secure with the screws as indicated in Figure 11 on page 2 - 15.
a.
25
24. VGA card Module
Removing the VGA Card 2 - 17
Disassembly
Figure 14
Removing the Wireless LAN Module
Wireless LAN
Module Removal
1.
2.
3.
a. Remove the screws.
4.
b. Remove the keyboard
5.
shielding.
2.Disassembly
c. Disconnect the cables
and remove the screws.
d. Remove the WLAN
module.
Turn off the computer, and turn it over, remove the battery (page 2 - 5) and keyboard (page 2 - 9).
Remove screws 1 - 2 from the keyboard shielding.
Remove the keyboard shielding 3 , the Wireless LAN Module will be visible at point 4 .
Carefully disconnect cables 5 and remove screws 6 .
The Wireless LAN Module 7 (Figure c) will pop-up, and you can remove it.
b.
a.
4
2
1
Note: Make sure you
reconnect the antenna
cables to the “Main”
socket (Figure c).
3
c.
d.
5
6
3. Keyboard Shielding
7. Wireless LAN Module
• 3 Screws
2 - 18 Removing the Wireless LAN Module
7
7
Disassembly
Removing the Bluetooth Module
Figure 15
Bluetooth Module
Removal
1. Turn off the computer, and turn it over, remove the battery (page 2 - 5), keyboard (page 2 - 9) and keyboard shielding (page 2 - 18).
2. The Bluetooth module is visible at point 1 .
a. Disconnect the cables
3. Carefully disconnect cables 2 & 3 and remove the screw 4 .
and remove the screw.
4. Lift the Bluetooth module 5 off the computer.
b. Remove the Bluetooth
module.
a.
b.
2
1
4
3
5
5. Bluetooth Module
• 1 Screw
Removing the Bluetooth Module 2 - 19
2.Disassembly
Note: Make sure you
reconnect the antenna
cables to the socket
(Figure a).
Disassembly
Figure 16
Modem Removal
a. Remove the screws and
disconnect the cable.
b. Lift the modem up off
the socket.
Removing the Modem
1. Turn off the computer, and turn it over, remove the battery (page 2 - 5), keyboard (page 2 - 9) and keyboard shielding (page 2 - 18).
2. The modem is visible at point 1 .
3. Remove the screws 2 - 3 from the modem module and disconnect cable 4 .
4. Lift the modem up off the socket 5 .
5. Lift the modem 6 up and off the computer.
a.
2.Disassembly
b.
2
4
1
3
4
5
6. Modem
• 2 Screws
2 - 20 Removing the Modem
6
6
Disassembly
Removing the TV Tuner Card
Figure 17
1. Turn off the computer, and turn it over, remove the battery (page 2 - 5), keyboard (page 2 - 9) and keyboard shielding (page 2 - 18).
2. The TV tuner card is visible at point 1 .
3. Remove the screws 2 from the TV tuner module and disconnect cable 3 .
4. The TV tuner card 4 will pop-up and and you can remove it.
.
a.
TV Tuner Card
Removal
a. Remove the screws and
disconnect the cable.
b. The TV tuner card will
pop up and remove it.
b.
2
2.Disassembly
3
4
1
4
4. TV tuner card
• 1 Screw
Removing the TV Tuner Card 2 - 21
Disassembly
Figure 18
Intel Turbo Memory
Card Removal
a. Remove the screws and
disconnect the cable.
b. The Intel turbo memory
card will pop up and remove it.
Removing the Intel Turbo Memory Card
1. Turn off the computer, and turn it over, remove the battery (page 2 - 5), keyboard (page 2 - 9) and keyboard shielding (page 2 - 18).
2. The Intel turbo memory card is visible at point 1 .
3. Remove the screws 2 from the module and disconnect cable 3 .
4. The Intel turbo memory card 4 will pop-up and and you can remove it.
.
a.
2.Disassembly
b.
4
1
2
3
4
4. Intel
card
turbo
memory
• 1 Screw
2 - 22 Removing the Intel Turbo Memory Card
Part Lists
Appendix A: Part Lists
This appendix breaks down the D900F series notebook’s construction into a series of illustrations. The component part
numbers are indicated in the tables opposite the drawings.
Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure
to cross-check any relevant documentation.
Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the
total number of duplicated parts used.
A.Part Lists
Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the
time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.
A - 1
Part Lists
Part List Illustration Location
The following table indicates where to find the appropriate part list illustration.
Table A- 1
Part List Illustration
Location
A.Part Lists
Parts
A - 2 Part List Illustration Location
Top
page A - 3
Bottom
page A - 4
LCD
page A - 5
Mainboard
page A - 6
Blu-Ray Combo
page A - 7
DVD Super Multi
page A - 8
Part Lists
Top
Figure A - 1
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Top A - 3
A.Part Lists
Top
Part Lists
Bottom
A.Part Lists
Figure A - 2
Bottom
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A - 4 Bottom
Part Lists
LCD
Figure A - 3
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╭
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LCD A - 5
A.Part Lists
LCD
㾲䈷╭
╭
╭
╭
╭
╭
Part Lists
Mainboard
A.Part Lists
Figure A - 4
Mainboard
㾲䈷
㾲䈷╭
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▓
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▁
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㾲䈷
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㾲䈷
A - 6 Mainboard
Part Lists
Blu-Ray Combo
Figure A - 5
㾲䈷
㾲䈷
㾲䈷
㾲䈷
㾲䈷
㾲䈷
Blu-Ray Combo A - 7
A.Part Lists
Blu-Ray Combo
Part Lists
DVD Super Multi
A.Part Lists
Figure A - 6
DVD Super Multi
㾲䈷
㾲䈷
㾲䈷
㖑䜛
㖑䜛
㾲䈷
㾲䈷
㕰㖑䜛
㾲䈷
㾲䈷
㾲䈷
A - 8 DVD Super Multi
Schematic Diagrams
Appendix B: Schematic Diagrams
This appendix has circuit diagrams of the D900F notebook’s PCB’s. The following table indicates where to find the appropriate schematic diagram.
Diagram - Page
Diagram - Page
Diagram - Page
Intel Debug Card & Fan Control - Page B - 19
Click Board - Page B - 36
LGA1366 Part A DDR3 1/2 - Page B - 3
Clock Generator CV193 - Page B - 20
Hotkey Board - Page B - 37
LGA1366 Part B DDR3 2/2 - Page B - 4
MXM3.0 PCI-E - Page B - 21
Switch Board - Page B - 38
LGA1366 Part C QPI - Page B - 5
MXM PWR, SATA ODD - Page B - 22
USB Board - Page B - 39
LGA1366 Part C Power - Page B - 6
HDMI & e-SATA - Page B - 23
Power CPU_VTT - Page B - 40
LGA1366 Part E GND, Thermal - Page B - 7
DVI-I - Page B - 24
Power 1.5V, 0.75VS, 12V - Page B - 41
DDR3 Channel A SO-DIMM_0 - Page B - 8
LCD, INT - Page B - 25
Power 1.8VS, 1.1VS - Page B - 42
DDR3 Channel B SO-DIMM_1 - Page B - 9
Card Reader/1394 - Page B - 26
Power AC_In, Charge - Page B - 43
DDR3 Channel C SO-DIMM_2 - Page B - 10
RTL8111C - Page B - 27
Power Switch, ICH_1.1VS - Page B - 44
X58 QPI Interface - Page B - 11
ALC662 / AMP TP6047A-4 - Page B - 28
Power VCORE - Page B - 45
X58 PCIEX16, PCIEX4, DMI - Page B - 12
KBC-ITE IT8512E - Page B - 29
Power VDD3, VDD5 - Page B - 46
X58 Misc - Page B - 13
Mini WLAN/ TMP/ TPA6017A2 - Page B - 30
Power Delivery Chart - Page B - 47
X58 PWR - Page B - 14
Daughter CONN - Page B - 31
Power Sequence Diagram - Page B - 48
X58 GND - Page B - 15
SATA HDD/ CCD/ BT/ PC BEEP - Page B - 32
ICH10 DMI/PCIE/USB/SATA - Page B - 16
New Card/ MDC/ TV/ Robson - Page B - 33
ICH10 PCI/SPI/Other - Page B - 17
Audio Board - Page B - 34
ICH10 Power/GND - Page B - 18
Card Reader Board - Page B - 35
Schematic
Diagrams
B.Schematic Diagrams
System Block Diagram - Page B - 2
Table B - 1
Version Note
The schematic diagrams in this chapter
are based upon version 6-7P-M8103-003.
If your mainboard (or
other boards) are a later version, please
check with the Service
Center for updated diagrams (if required).
B - 1
Schematic Diagrams
System Block Diagram
CLEVO D900F System Block Diagram
BUTTOM BOARD
BOT TOM
POW ER BOTTOM LED
CLICK BOARD
P .45
P .37
VIN,VA
DDR3 SDRAM SOCKET
P .35
P .19
14.31 8 MHz
S ocket-B
P .42
CPU_VT T
PROCESSOR
Bloomfield
LGA1366
CLOC K GEN .
CV193
B.Schematic Diagrams
SYS5V, SYS10V, SYS15V,VDD3,VDD5
P .39
1.5V,0 .75VS,1 2V
P .40
1.8VS, 1.1VS
DDRIII
P .41
80 0/106 6 MHz
5VS,3 VS,1.5 VS,5V,3 V,VCCA_1.1VS
P .2,3,4,5,6
P .43
HDMI
P.22
Sheet 1 of 47
System Block
Diagram
6.4 GT/s
Def ault 4.8 GT/s
VCORE
QPI
SO -DIMM0
SO -DIMM1
SO -DIMM2
DVI/R GB
P.23
IOH
Intel
Tylersburg
LVDS
P.24
TOUCH
PAD
P .35
MXM-3.0
VGA CARD
10 M Hz
PCI -E x16
SPDIF
OUT
DMI
LPC
33 M Hz
P .28
INT. K/B
MDC CONN.
S YSTEM SMBUS
P .32
SOUTH BRIDGE
AZALIA LINK 24 M Hz
ICH10
676 mBGA
PCIE
THE RMAL
SEN SOR
SMART
FAN
EMC1402
P.06
P .18
SMA RT
BAT TERY
ALC662+
TPA6047A4+
TPA6017A2
P .27,29
P .42
Mini CARD
SOCKET
P .15,16,17
P.29
USB7
WLAN
P .29
Mini CARD
SOCKET
Mini CARD
SOCKET
USB11
USB9
ROBSON
P .32
TV CARD
P.32
NEW
CARD
GLAN(G bE)
AR8111 C
USB10
48pins QFN
P .32
6mm x 6mm
P .26
SATA 300MB/s
RJ-45
U SB2.0
P .26
P .22
P .21
SATA
HDD
P .31
PO RT0 PORT1 P ORT2 PORT3
USB0 US B1
USB2 US B3
CC D
U SB4
BT
U SB5
P.38
P.31
P .31
H ot Key & Cl ick
C onnect or
P .36 ( M /B sid e)
B - 2 System Block Diagram
INT.
SPK
100 MH z
TPM
3 2.768
K Hz
SATA
ODD
P .33
3 2.768
K Hz
EC SMBUS
P .28
eS ATA
LINE
IN
A ZALIA
C ODEC+
A MPLIFIER
AZALIA
MDC
MODULE
X4
IT8512E
HP
OUT
5.1 CHANNEL OUT
P .26
P .10,11,12,13,14
EC
MIC
IN
RJ-11
1295 ball
P .20,21
P .44
P .7
P .8
P .9
25 MHz
JMB38 0
24.5 76
MHz
P .25
CAR D
REA DER
7 IN 1
IEE E
139 4
P .25,34
MMC/SD/MS/MS Pro
P .25
Schematic Diagrams
LGA1366 Part A DDR3 1/2
J_CPU 1A
ChannelA
7 M_D ATA_A[6 3: 0]
M_DATA_A[ 63:0]
M_CB_ECC_A[7:0]
7 M_D QS_ A_D N[ 7: 0]
M_DQS_A_DP[ 7: 0]
M_DQS_A_DN [7:0]
ChannelB
8 M_D ATA_B[6 3: 0]
M_DATA_B[ 63:0]
M_CB_ECC_B[7:0]
8 M_D QS_ B_D P[7 :0 ]
8 M_D QS_ B_D N[ 7: 0]
M_DQS_B_DP[ 7: 0]
M_DQS_B_DN [7:0]
ChannelC
9 M_D ATA_C[ 63:0 ]
M_DATA_C [63: 0]
M_CB_ECC_C[7:0]
9 M_D QS_ C_DP[ 7: 0]
9 M_D QS_ C_DN [7:0 ]
M_DQS_C _D P[7:0]
W4
V4
U3
U1
Y3
Y2
V1
U4
T3
R4
N3
M3
T2
T1
N2
N1
L2
L3
H3
G1
M1
L1
H1
H2
F2
F3
C6
B6
G3
F1
C4
B5
B3 8
C3 8
D4 2
D4 1
D3 7
A3 8
C4 1
D4 0
F4 2
F4 3
J4 1
J4 2
E4 3
E4 2
H4 3
H4 1
L4 2
L4 3
P4 1
P4 2
K4 3
K4 2
N4 3
N4 1
T4 2
U4 1
W4 2
W4 0
R4 2
R4 3
V4 1
W4 1
DD R0 _D Q_63
DD R0 _D Q_62
DD R0 _D Q_61
DD R0 _D Q_60
DD R0 _D Q_59
DD R0 _D Q_58
DD R0 _D Q_57
DD R0 _D Q_56
DD R0 _D Q_55
DD R0 _D Q_54
DD R0 _D Q_53
DD R0 _D Q_52
DD R0 _D Q_51
DD R0 _D Q_50
DD R0 _D Q_49
DD R0 _D Q_48
DD R0 _D Q_47
DD R0 _D Q_46
DD R0 _D Q_45
DD R0 _D Q_44
DD R0 _D Q_43
DD R0 _D Q_42
DD R0 _D Q_41
DD R0 _D Q_40
DD R0 _D Q_39
DD R0 _D Q_38
DD R0 _D Q_37
DD R0 _D Q_36
DD R0 _D Q_35
DD R0 _D Q_34
DD R0 _D Q_33
DD R0 _D Q_32
DD R0 _D Q_31
DD R0 _D Q_30
DD R0 _D Q_29
DD R0 _D Q_28
DD R0 _D Q_27
DD R0 _D Q_26
DD R0 _D Q_25
DD R0 _D Q_24
DD R0 _D Q_23
DD R0 _D Q_22
DD R0 _D Q_21
DD R0 _D Q_20
DD R0 _D Q_19
DD R0 _D Q_18
DD R0 _D Q_17
DD R0 _D Q_16
DD R0 _D Q_15
DD R0 _D Q_14
DD R0 _D Q_13
DD R0 _D Q_12
DD R0 _D Q_11
DD R0 _D Q_10
DD R0 _D Q_9
DD R0 _D Q_8
DD R0 _D Q_7
DD R0 _D Q_6
DD R0 _D Q_5
DD R0 _D Q_4
DD R0 _D Q_3
DD R0 _D Q_2
DD R0 _D Q_1
DD R0 _D Q_0
J _C PU1B
D DR 0_ DQS_P0
DD R0_D QS_N0
D DR 0_ DQS_P1
DD R0_D QS_N1
D DR 0_ DQS_P2
DD R0_D QS_N2
D DR 0_ DQS_P3
DD R0_D QS_N3
D DR 0_ DQS_P4
DD R0_D QS_N4
D DR 0_ DQS_P5
DD R0_D QS_N5
D DR 0_ DQS_P6
DD R0_D QS_N6
D DR 0_ DQS_P7
DD R0_D QS_N7
D DR 0_ DQS_P8
DD R0_D QS_N8
D DR 0_ DQS_P9
DD R0_D QS_N9
DD R0 _D QS_ P10
D DR 0_DQS_N 10
DD R0 _D QS_ P11
D DR 0_DQS_N 11
DD R0 _D QS_ P12
D DR 0_DQS_N 12
DD R0 _D QS_ P13
D DR 0_DQS_N 13
DD R0 _D QS_ P14
D DR 0_DQS_N 14
DD R0 _D QS_ P15
D DR 0_DQS_N 15
DD R0 _D QS_ P16
D DR 0_DQS_N 16
DD R0 _D QS_ P17
D DR 0_DQS_N 17
T43 M_D QS_ A_D P0
U43 M_D QS_ A_D N0
L41 M_D QS_ A_D P1
M41 M_D QS_ A_D N1
F41 M_D QS_ A_D P2
G41 M_D QS_ A_D N2
B39 M_D QS_ A_D P3
B40 M_D QS_ A_D N3
E3
E4
M_D QS_ A_D P4
M_D QS_ A_D N4
K2
K3
M_D QS_ A_D P5
M_D QS_ A_D N5
R2
R3
M_D QS_ A_D P6
M_D QS_ A_D N6
W2 M_D QS_ A_D P7
W1 M_D QS_ A_D N7
D34
D35
Z0201
Z0202
V43
V42
Z0203
Z0204
N42
M43
Z0205
Z0206
H42
G43
Z0207
Z0208
D39
C39
Z0209
Z0210
D5
D4
Z0211
Z0212
J2
J1
Z0213
Z0214
P2
P1
Z0215
Z0216
V2
V3
Z0217
Z0218
B36
B35
Z0219
Z0220
M_D ATA _B63
M_D ATA _B62
M_D ATA _B61
M_D ATA _B60
M_D ATA _B59
M_D ATA _B58
M_D ATA _B57
M_D ATA _B56
M_D ATA _B55
M_D ATA _B54
M_D ATA _B53
M_D ATA _B52
M_D ATA _B51
M_D ATA _B50
M_D ATA _B49
M_D ATA _B48
M_D ATA _B47
M_D ATA _B46
M_D ATA _B45
M_D ATA _B44
M_D ATA _B43
M_D ATA _B42
M_D ATA _B41
M_D ATA _B40
M_D ATA _B39
M_D ATA _B38
M_D ATA _B37
M_D ATA _B36
M_D ATA _B35
M_D ATA _B34
M_D ATA _B33
M_D ATA _B32
M_D ATA _B31
M_D ATA _B30
M_D ATA _B29
M_D ATA _B28
M_D ATA _B27
M_D ATA _B26
M_D ATA _B25
M_D ATA _B24
M_D ATA _B23
M_D ATA _B22
M_D ATA _B21
M_D ATA _B20
M_D ATA _B19
M_D ATA _B18
M_D ATA _B17
M_D ATA _B16
M_D ATA _B15
M_D ATA _B14
M_D ATA _B13
M_D ATA _B12
M_D ATA _B11
M_D ATA _B10
M_D ATA _B9
M_D ATA _B8
M_D ATA _B7
M_D ATA _B6
M_D ATA _B5
M_D ATA _B4
M_D ATA _B3
M_D ATA _B2
M_D ATA _B1
M_D ATA _B0
W9
AA7
W5
V9
W10
Y10
W7
W6
R7
R8
M6
J4
T5
R5
K5
K4
J5
G5
H9
G9
H4
G4
J6
H8
F6
D6
G8
F10
F5
E5
E8
E9
K30
L32
H34
J34
J32
K32
L33
H33
H36
J36
M36
N34
J35
K35
M34
M35
N38
N37
R35
R34
N39
P39
P35
P34
Y39
Y40
AB36
AA35
Y34
Y35
AA36
AA37
D DR 1_ DQ_63
D DR 1_ DQ_62
D DR 1_ DQ_61
D DR 1_ DQ_60
D DR 1_ DQ_59
D DR 1_ DQ_58
D DR 1_ DQ_57
D DR 1_ DQ_56
D DR 1_ DQ_55
D DR 1_ DQ_54
D DR 1_ DQ_53
D DR 1_ DQ_52
D DR 1_ DQ_51
D DR 1_ DQ_50
D DR 1_ DQ_49
D DR 1_ DQ_48
D DR 1_ DQ_47
D DR 1_ DQ_46
D DR 1_ DQ_45
D DR 1_ DQ_44
D DR 1_ DQ_43
D DR 1_ DQ_42
D DR 1_ DQ_41
D DR 1_ DQ_40
D DR 1_ DQ_39
D DR 1_ DQ_38
D DR 1_ DQ_37
D DR 1_ DQ_36
D DR 1_ DQ_35
D DR 1_ DQ_34
D DR 1_ DQ_33
D DR 1_ DQ_32
D DR 1_ DQ_31
D DR 1_ DQ_30
D DR 1_ DQ_29
D DR 1_ DQ_28
D DR 1_ DQ_27
D DR 1_ DQ_26
D DR 1_ DQ_25
D DR 1_ DQ_24
D DR 1_ DQ_23
D DR 1_ DQ_22
D DR 1_ DQ_21
D DR 1_ DQ_20
D DR 1_ DQ_19
D DR 1_ DQ_18
D DR 1_ DQ_17
D DR 1_ DQ_16
D DR 1_ DQ_15
D DR 1_ DQ_14
D DR 1_ DQ_13
D DR 1_ DQ_12
D DR 1_ DQ_11
D DR 1_ DQ_10
D DR 1_ DQ_9
D DR 1_ DQ_8
D DR 1_ DQ_7
D DR 1_ DQ_6
D DR 1_ DQ_5
D DR 1_ DQ_4
D DR 1_ DQ_3
D DR 1_ DQ_2
D DR 1_ DQ_1
D DR 1_ DQ_0
J_ CPU 1C
DD R1 _D QS_ P0
D DR 1_DQS_N 0
DD R1 _D QS_ P1
D DR 1_DQS_N 1
DD R1 _D QS_ P2
D DR 1_DQS_N 2
DD R1 _D QS_ P3
D DR 1_DQS_N 3
DD R1 _D QS_ P4
D DR 1_DQS_N 4
DD R1 _D QS_ P5
D DR 1_DQS_N 5
DD R1 _D QS_ P6
D DR 1_DQS_N 6
DD R1 _D QS_ P7
D DR 1_DQS_N 7
DD R1 _D QS_ P8
D DR 1_DQS_N 8
DD R1 _D QS_ P9
D DR 1_DQS_N 9
D DR 1_ DQS_P10
DD R1_D QS_N10
D DR 1_ DQS_P11
DD R1_D QS_N11
D DR 1_ DQS_P12
DD R1_D QS_N12
D DR 1_ DQS_P13
DD R1_D QS_N13
D DR 1_ DQS_P14
DD R1_D QS_N14
D DR 1_ DQS_P15
DD R1_D QS_N15
D DR 1_ DQS_P16
DD R1_D QS_N16
D DR 1_ DQS_P17
DD R1_D QS_N17
Y 38 M_DQS_B_DP0
Y 37 M_DQS_B_DN 0
R 38 M_DQS_B_DP1
R 37 M_DQS_B_DN 1
L35 M_DQS_B_DP2
L36 M_DQS_B_DN 2
L30 M_DQS_B_DP3
L31 M_DQS_B_DN 3
E7
D7
M_DQS_B_DP4
M_DQS_B_DN 4
H6
G6
M_DQS_B_DP5
M_DQS_B_DN 5
L6
L5
M_DQS_B_DP6
M_DQS_B_DN 6
Y8
Y9
M_DQS_B_DP7
M_DQS_B_DN 7
G33
G34
Z0221
Z0222
AA40
AA41
Z0223
Z0224
P3 6
P3 7
Z0225
Z0226
L37
K3 7
Z0227
Z0228
K3 4
K3 3
Z0229
Z0230
F8
F7
Z0231
Z0232
H7
J7
Z0233
Z0234
M5
M4
Z0235
Z0236
Y4
Y5
Z0237
Z0238
F3 5
E3 5
Z0239
Z0240
M_D ATA_ C6 3
M_D ATA_ C6 2
M_D ATA_ C6 1
M_D ATA_ C6 0
M_D ATA_ C5 9
M_D ATA_ C5 8
M_D ATA_ C5 7
M_D ATA_ C5 6
M_D ATA_ C5 5
M_D ATA_ C5 4
M_D ATA_ C5 3
M_D ATA_ C5 2
M_D ATA_ C5 1
M_D ATA_ C5 0
M_D ATA_ C4 9
M_D ATA_ C4 8
M_D ATA_ C4 7
M_D ATA_ C4 6
M_D ATA_ C4 5
M_D ATA_ C4 4
M_D ATA_ C4 3
M_D ATA_ C4 2
M_D ATA_ C4 1
M_D ATA_ C4 0
M_D ATA_ C3 9
M_D ATA_ C3 8
M_D ATA_ C3 7
M_D ATA_ C3 6
M_D ATA_ C3 5
M_D ATA_ C3 4
M_D ATA_ C3 3
M_D ATA_ C3 2
M_D ATA_ C3 1
M_D ATA_ C3 0
M_D ATA_ C2 9
M_D ATA_ C2 8
M_D ATA_ C2 7
M_D ATA_ C2 6
M_D ATA_ C2 5
M_D ATA_ C2 4
M_D ATA_ C2 3
M_D ATA_ C2 2
M_D ATA_ C2 1
M_D ATA_ C2 0
M_D ATA_ C1 9
M_D ATA_ C1 8
M_D ATA_ C1 7
M_D ATA_ C1 6
M_D ATA_ C1 5
M_D ATA_ C1 4
M_D ATA_ C1 3
M_D ATA_ C1 2
M_D ATA_ C1 1
M_D ATA_ C1 0
M_D ATA_ C9
M_D ATA_ C8
M_D ATA_ C7
M_D ATA_ C6
M_D ATA_ C5
M_D ATA_ C4
M_D ATA_ C3
M_D ATA_ C2
M_D ATA_ C1
M_D ATA_ C0
U9
V8
T7
T6
U 10
T10
U6
U5
R9
R 10
N7
N8
P10
P9
N6
P7
M8
L8
M10
L 11
N9
M9
K10
L 10
L 12
H 12
G10
G11
L 13
H 13
J 12
K12
E38
F38
G39
H 39
H 37
J 37
F40
G40
K38
L 40
N 36
P40
J 39
J 40
M40
M39
R 40
T41
V39
W 39
T36
R 39
U 39
U 38
V38
V37
V34
U 34
U 36
V36
W 35
W 34
DD R2_D Q_63
DD R2_D Q_62
DD R2_D Q_61
DD R2_D Q_60
DD R2_D Q_59
DD R2_D Q_58
DD R2_D Q_57
DD R2_D Q_56
DD R2_D Q_55
DD R2_D Q_54
DD R2_D Q_53
DD R2_D Q_52
DD R2_D Q_51
DD R2_D Q_50
DD R2_D Q_49
DD R2_D Q_48
DD R2_D Q_47
DD R2_D Q_46
DD R2_D Q_45
DD R2_D Q_44
DD R2_D Q_43
DD R2_D Q_42
DD R2_D Q_41
DD R2_D Q_40
DD R2_D Q_39
DD R2_D Q_38
DD R2_D Q_37
DD R2_D Q_36
DD R2_D Q_35
DD R2_D Q_34
DD R2_D Q_33
DD R2_D Q_32
DD R2_D Q_31
DD R2_D Q_30
DD R2_D Q_29
DD R2_D Q_28
DD R2_D Q_27
DD R2_D Q_26
DD R2_D Q_25
DD R2_D Q_24
DD R2_D Q_23
DD R2_D Q_22
DD R2_D Q_21
DD R2_D Q_20
DD R2_D Q_19
DD R2_D Q_18
DD R2_D Q_17
DD R2_D Q_16
DD R2_D Q_15
DD R2_D Q_14
DD R2_D Q_13
DD R2_D Q_12
DD R2_D Q_11
DD R2_D Q_10
DD R2_D Q_9
DD R2_D Q_8
DD R2_D Q_7
DD R2_D Q_6
DD R2_D Q_5
DD R2_D Q_4
DD R2_D Q_3
DD R2_D Q_2
DD R2_D Q_1
DD R2_D Q_0
D DR 2_DQS_P0
DD R2_D QS_N0
D DR 2_DQS_P1
DD R2_D QS_N1
D DR 2_DQS_P2
DD R2_D QS_N2
D DR 2_DQS_P3
DD R2_D QS_N3
D DR 2_DQS_P4
DD R2_D QS_N4
D DR 2_DQS_P5
DD R2_D QS_N5
D DR 2_DQS_P6
DD R2_D QS_N6
D DR 2_DQS_P7
DD R2_D QS_N7
D DR 2_DQS_P8
DD R2_D QS_N8
D DR 2_DQS_P9
DD R2_D QS_N9
DD R2_D QS_ P10
D DR 2_DQ S_N 10
DD R2_D QS_ P11
D DR 2_DQ S_N 11
DD R2_D QS_ P12
D DR 2_DQ S_N 12
DD R2_D QS_ P13
D DR 2_DQ S_N 13
DD R2_D QS_ P14
D DR 2_DQ S_N 14
DD R2_D QS_ P15
D DR 2_DQ S_N 15
DD R2_D QS_ P16
D DR 2_DQ S_N 16
DD R2_D QS_ P17
D DR 2_DQ S_N 17
W3 7 M_D QS_ C_DP0
W3 6 M_D QS_ C_DN 0
T37 M_D QS_ C_DP1
T38 M_D QS_ C_DN 1
K40 M_D QS_ C_DP2
K39 M_D QS_ C_DN 2
E39 M_D QS_ C_DP3
E40 M_D QS_ C_DN 3
J10 M_D QS_ C_DP4
J9 M_D QS_ C_DN 4
L7
K7
M_D QS_ C_DP5
M_D QS_ C_DN 5
P6
P5
M_D QS_ C_DP6
M_D QS_ C_DN 6
U8
T8
M_D QS_ C_DP7
M_D QS_ C_DN 7
G2 9
G3 0
Z0241
Z0242
U3 5
T35
Z0243
Z0244
U4 0
T40
Z0245
Z0246
M3 8
L38
Z0247
Z0248
H3 8
G3 8
Z0249
Z0250
H1 1
J11
Z0251
Z0252
K9
K8
Z0253
Z0254
N4
P4
Z0255
Z0256
V6
V7
Z0257
Z0258
H3 1
G3 1
Z0259
Z0260
Sheet 2 of 47
LGA1366 Part A
DDR3
1/2
M_DQS_C _D N[ 7: 0]
M_ CB_ECC _A7 C3 4
M_ CB_ECC _A6 B3 4
M_ CB_ECC _A5 A3 7
M_ CB_ECC _A4 C3 7
M_ CB_ECC _A3 C3 3
M_ CB_ECC _A2 F3 2
M_ CB_ECC _A1 A3 6
M_ CB_ECC _A0 C3 6
M_C B_E CC _B7 G35
M_C B_E CC _B6 E34
M_C B_E CC _B5 F37
M_C B_E CC _B4 E37
M_C B_E CC _B3 G36
M_C B_E CC _B2 E33
M_C B_E CC _B1 F36
M_C B_E CC _B0 D36
DD R0 _EC C_ 7
DD R0 _EC C_ 6
DD R0 _EC C_ 5
DD R0 _EC C_ 4
DD R0 _EC C_ 3
DD R0 _EC C_ 2
DD R0 _EC C_ 1 L GA1366
DD R0 _EC C_ 0
1 OF 12
D DR 1_ ECC _7
D DR 1_ ECC _6
D DR 1_ ECC _5
D DR 1_ ECC _4
D DR 1_ ECC _3
D DR 1_ ECC _2
D DR 1_ ECC _1
D DR 1_ ECC _0
M_C B_EC C_ C7 F30
M_C B_EC C_ C6 F31
M_C B_EC C_ C5 J 30
M_C B_EC C_ C4 J 31
M_C B_EC C_ C3 E30
M_C B_EC C_ C2 E29
M_C B_EC C_ C1 F33
M_C B_EC C_ C0H 32
LGA1366
2 OF 12
DD R2_EC C_ 7
DD R2_EC C_ 6
DD R2_EC C_ 5
DD R2_EC C_ 4
DD R2_EC C_ 3
DD R2_EC C_ 2
DD R2_EC C_ 1
DD R2_EC C_ 0
LGA1 36 6
3 OF 12
LGA1366 Part A DDR3 1/2 B - 3
B.Schematic Diagrams
7 M_D QS_ A_D P[7 :0 ]
M_ DATA_A63
M_ DATA_A62
M_ DATA_A61
M_ DATA_A60
M_ DATA_A59
M_ DATA_A58
M_ DATA_A57
M_ DATA_A56
M_ DATA_A55
M_ DATA_A54
M_ DATA_A53
M_ DATA_A52
M_ DATA_A51
M_ DATA_A50
M_ DATA_A49
M_ DATA_A48
M_ DATA_A47
M_ DATA_A46
M_ DATA_A45
M_ DATA_A44
M_ DATA_A43
M_ DATA_A42
M_ DATA_A41
M_ DATA_A40
M_ DATA_A39
M_ DATA_A38
M_ DATA_A37
M_ DATA_A36
M_ DATA_A35
M_ DATA_A34
M_ DATA_A33
M_ DATA_A32
M_ DATA_A31
M_ DATA_A30
M_ DATA_A29
M_ DATA_A28
M_ DATA_A27
M_ DATA_A26
M_ DATA_A25
M_ DATA_A24
M_ DATA_A23
M_ DATA_A22
M_ DATA_A21
M_ DATA_A20
M_ DATA_A19
M_ DATA_A18
M_ DATA_A17
M_ DATA_A16
M_ DATA_A15
M_ DATA_A14
M_ DATA_A13
M_ DATA_A12
M_ DATA_A11
M_ DATA_A10
M_ DATA_A9
M_ DATA_A8
M_ DATA_A7
M_ DATA_A6
M_ DATA_A5
M_ DATA_A4
M_ DATA_A3
M_ DATA_A2
M_ DATA_A1
M_ DATA_A0
Schematic Diagrams
LGA1366 Part B DDR3 2/2
C han nelA
7
7
M_SB S_ A[2 : 0]
7
M_SC KE _A [1 : 0]
7
M_OD T_ A[ 1 :0]
M_S BS_ A[ 2 :0 ]
M_S C KE_A[ 1: 0 ]
M_OD T_ A[1 : 0]
7
7
7
7
7
M_SC S_ A_ N 0
M_SC S_ A_ N 1
M_SCS_A_N4
M_SCS_A_N5
7
Sheet 3 of 47
LGA1366 Part B
DDR3
2/2
J_ C PU 1 D
DD R 0 _D R AMR ST
M_S C S_ A_N 0
M_S C S_ A_N 1
DIMM1 no using
M_MAA_ B[ 1 5: 0 ]
8
M_SB S_ B[2 : 0]
8
M_SC KE _B [1 : 0]
8
M_OD T_ B[ 1 :0]
8
8
8
8
8
8
8
8
8
8
M_MA A_ B[1 5:0 ]
M_S BS_ B[ 2 :0 ]
DD R 1 _D R AMR ST
F 26
H 26
B 14
E 24
E 23
H 14
G 24
E 22
D 22
J 27
F 22
K 28
L 28
J 17
J 16
J 14
M_ SBS_ B2
M_ SBS_ B1
M_ SBS_ B0
H 27
K 13
C 18
M_ RA S_ B_ N
M_ CA S_ B_ N
M_ W E_B _N
G 14
E 14
G 13
M_ SC S_ B_ N0
M_ SC S_ B_ N1
Z0 301
Z0 302
Z0 303
Z0 304
Z0 305
Z0 306
D 12
A8
E 15
E 13
C 17
E 10
C 14
E 12
C K_ M_C H 1 _0 _ D P
C K_ M_C H 1 _0 _ D N
C K_ M_C H 1 _2 _ D P
C K_ M_C H 1 _2 _ D N
C K_ M_C H 1 _1 _ D P
C K_ M_C H 1 _1 _ D N
C K_ M_C H 1 _3 _ D P
C K_ M_C H 1 _3 _ D N
C 21
D 21
G 19
G 20
K 18
L 18
H 18
H 19
M_S C KE_B[ 1: 0 ]
M_OD T_ B[1 : 0]
C K_ M_C H 1 _0_ DP
CK _M_ C H1 _0 _D P
C K_ M_C H 1 _0_ DN
CK _M_ C H1 _0 _D N
C K_ M_C H 1 _1_ DP
CK _M_ C H1 _1 _D P
C K_ M_C H 1 _1_ DN
CK _M_ C H1 _1 _D N
CK_M_CH1_2_DP
CK_M_CH1_2_DN
DIMM1 no using
CK_M_CH1_3_DP
CK_M_CH1_3_DN
M_R A S_ B_N
M_R AS_ B_ N
M_C A S_ B_N
M_C AS_ B_ N
M_W E _B _N
M_W E_B_ N
M_S C S_ B_N 0
M_SC S_ B_ N 0
M_S C S_ B_N 1
M_SC S_ B_ N 1
M_SCS_B_N4
M_SCS_B_N5
M_ MA A_ B1 5
M_ MA A_ B1 4
M_ MA A_ B1 3
M_ MA A_ B1 2
M_ MA A_ B1 1
M_ MA A_ B1 0
M_ MA A_ B9
M_ MA A_ B8
M_ MA A_ B7
M_ MA A_ B6
M_ MA A_ B5
M_ MA A_ B4
M_ MA A_ B3
M_ MA A_ B2
M_ MA A_ B1
M_ MA A_ B0
D D R0_ D RA MR ST
Ch annelB
8
J_ C PU 1 E
M_MA A_ A[1 5:0 ]
C K_ M_C H 0 _0_ DP
CK _M_ C H0 _0 _D P
C K_ M_C H 0 _0_ DN
CK _M_ C H0 _0 _D N
C K_ M_C H 0 _1_ DP
CK _M_ C H0 _1 _D P
C K_ M_C H 0 _1_ DN
CK _M_ C H0 _1 _D N
CK_M_CH0_2_DP
CK_M_CH0_2_DN
DIMM1 no using
CK_M_CH0_3_DP
CK_M_CH0_3_DN
M_R A S_ A_N
M_R AS_ A_ N
M_C A S_ A_N
M_C AS_ A_ N
M_W E _A _N
M_W E_A_ N
7
7
7
7
B.Schematic Diagrams
M_MAA_ A[ 1 5: 0 ]
M_ SC KE_ B0
Z0 307
M_ SC KE_ B1
Z0 308
H 28
E 27
D 27
C 27
Z0 309
Z0 310
Z0 311
Z0 312
Z0 313
Z0 314
M_ OD T_ B1
M_ OD T_ B0
G 28
H 29
E 28
F 28
F 11
D 14
C8
D 11
M_MA A_ C[ 15: 0 ]
Z0 315
D 20
M_S BS_ C [2 : 0]
Z0 316
Z0 317
Z0 318
Z0 319
C 22
E 25
F 25
F 27
DIMM1 no using
D D R1_ D RA MR ST
Ch annelC
9
M_MAA_ C [ 15 : 0]
9
M_SB S_ C[ 2 :0]
9
M_SC KE _C [ 1:0 ]
M_S C KE_C [1 : 0]
M_OD T_ C[ 1:0]
9
M_OD T_ C [ 1: 0 ]
9
9
9
9
C K_ M_C H 2 _0_ DP
CK _M_ C H2 _0 _D P
C K_ M_C H 2 _0_ DN
CK _M_ C H2 _0 _D N
C K_ M_C H 2 _1_ DP
CK _M_ C H2 _1 _D P
C K_ M_C H 2 _1_ DN
CK _M_ C H2 _1 _D N
CK_M_CH2_2_DP
CK_M_CH2_2_DN
DIMM1 no using
CK_M_CH2_3_DP
CK_M_CH2_3_DN
M_R A S_ C_ N
M_R AS_ C _ N
M_C A S_ C_ N
M_C AS_ C _ N
M_W E _C _ N
M_W E_C _N
M_S C S_ C_ N 0
M_SC S_ C _ N0
M_S C S_ C_ N 1
M_SC S_ C _ N1
9
9
9
9
9
M_SCS_C_N5
M_SCS_C_N6
9
DD R 2 _D R AMR ST
B - 4 LGA1366 Part B DDR3 2/2
D D R _C OMP1
DIMM1 no using
D D R2_ D RA MR ST
D D R 1_D R AMRS T
Y7
D 29
D D R 1_MA_ 1 5
D D R 1_MA_ 1 4
D D R 1_MA_ 1 3
D D R 1_MA_ 1 2
D D R 1_MA_ 1 1
D D R 1_MA_ 1 0
D D R 1_MA_ 9
D D R 1_MA_ 8
D D R 1_MA_ 7
D D R 1_MA_ 6
D D R 1_MA_ 5
D D R 1_MA_ 4
D D R 1_MA_ 3
D D R 1_MA_ 2
D D R 1_MA_ 1
D D R 1_MA_ 0
D D R 0_ MA_ 15
D D R 0_ MA_ 14
D D R 0_ MA_ 13
D D R 0_ MA_ 12
D D R 0_ MA_ 11
D D R 0_ MA_ 10
D DR 0 _ MA _9
D DR 0 _ MA _8
D DR 0 _ MA _7
D DR 0 _ MA _6
D DR 0 _ MA _5
D DR 0 _ MA _4
D DR 0 _ MA _3
D DR 0 _ MA _2
D DR 0 _ MA _1
D DR 0 _ MA _0
D D R 0_ BA _2
D D R 0_ BA _1
D D R 0_ BA _0
D D R 1_B A_2
D D R 1_B A_1
D D R 1_B A_0
D DR 0 _ RA S*
D DR 0 _ CA S*
D D R0 _ W E*
D D R 1_R AS *
D D R 1_C AS *
D D R 1_W E*
D D R 1_C S_ 0 *
D D R 1_C S_ 1 *
D D R 1_C S_ 2 *
D D R 1_C S_ 3 *
D D R 1_C S_ 4 *
D D R 1_C S_ 5 *
D D R 1_C S_ 6 /O D T_4*
D D R 1_C S_ 7 /O D T_5*
D D R 1_C LK_ P0
D D R 1_C LK_ N 0
D D R 1_C LK_ P1
D D R 1_C LK_ N 1
D D R 1_C LK_ P2
D D R 1_C LK_ N 2
D D R 1_C LK_ P3
D D R 1_C LK_ N 3
DD R 0 _C S _0*
DD R 0 _C S _1*
DD R 0 _C S _2*
DD R 0 _C S _3*
DD R 0 _C S _4*
DD R 0 _C S _5*
D D R 0_C S_ 6 /OD T_4*
D D R 0_C S_ 7 /OD T_5*
D DR 0_ CL K_ P0
D D R 0_ C L K_ N0
D DR 0_ CL K_ P1
D D R 0_ C L K_ N1
D DR 0_ CL K_ P2
D D R 0_ C L K_ N2
D DR 0_ CL K_ P3
D D R 0_ C L K_ N3
DD R 0 _C KE _0
DD R 0 _C KE _1
DD R 0 _C KE _2
DD R 0 _C KE _3
D D R 1_C KE _0
D D R 1_C KE _1
D D R 1_C KE _2
D D R 1_C KE _3
RS VD _A 31
R SVD _C 32
R SVD _C 31
R SVD _D 31
R S VD _G 28
R S VD _H 29
R S VD _E 28
R S VD _F 28
D D R 1_O D T_3
D D R 1_O D T_2
D D R 1_O D T_1
D D R 1_O D T_0
DD R 0 _O D T_3
DD R 0 _O D T_2
DD R 0 _O D T_1
DD R 0 _O D T_0
D D R 1_MA_ PA R
D D R 0_ MA_ PAR
D D R 1_P AR _E RR _ 0*
D D R 1_P AR _E RR _ 1*
D D R 1_P AR _E RR _ 2*
R S VD _F 27
D DR 0 _ PAR _ER R _0*
D DR 0 _ PAR _ER R _1*
D DR 0 _ PAR _ER R _2*
R S VD _B 33 *
D D R _COMP_ 1
D D R 1_R ES ET*
LG A1 3 66
D D R_ C O MP _0
D DR 0_ RE SET*
4 OF 12
DD R _ COMP0
R2 42
1 00 _ 1%_04
DD R _ COMP1
R2 43
2 4. 9 _ 1% _0 4
DD R _ COMP2
R3 1
1 30 _ 1%_04
5 m ils Trac e w idt h
1 50 0mils max t ra c e len gt h
B2 9
A2 8
A1 0
B2 6
A2 6
B1 9
C2 6
B2 5
A2 5
C2 4
B2 4
B2 3
D2 4
C2 3
B2 1
A2 0
M_MAA _A 15
M_MAA _A 14
M_MAA _A 13
M_MAA _A 12
M_MAA _A 11
M_MAA _A 10
M_MAA _A 9
M_MAA _A 8
M_MAA _A 7
M_MAA _A 6
M_MAA _A 5
M_MAA _A 4
M_MAA _A 3
M_MAA _A 2
M_MAA _A 1
M_MAA _A 0
C2 8
A1 6
B1 6
M_S BS_ A2
M_S BS_ A1
M_S BS_ A0
A1 5
C1 2
B1 3
M_R AS _A _N
M_C AS _A _N
M_W E_ A_N
G1 5
B1 0
C1 3
B9
B1 5
A7
C1 1
B8
M_S CS _A _N 0
M_S CS _A _N 1
J1 9
K1 9
D1 9
C1 9
F1 8
E1 8
E2 0
E1 9
C2 9
A3 0
B3 0
B3 1
A3 1
C3 2
C3 1
D3 1
Z 03 2 0
Z 03 2 1
Z 03 2 2
Z 03 2 3
Z 03 2 4
Z 03 2 5
DD R 2 _B A_ 2
DD R 2 _B A_ 1
DD R 2 _B A_ 0
D D R2_ R AS*
D D R2_ C AS*
D D R 2_ W E*
D D R2 _ C S_0*
D D R2 _ C S_1*
D D R2 _ C S_2*
D D R2 _ C S_3*
D D R2 _ C S_4*
D D R2 _ C S_5*
DD R 2 _C S_6 /OD T_4*
DD R 2 _C S_7 /OD T_5*
D D R 2_ C LK _P 0
DD R 2 _C L K_N 0
D D R 2_ C LK _P 1
DD R 2 _C L K_N 1
D D R 2_ C LK _P 2
DD R 2 _C L K_N 2
D D R 2_ C LK _P 3
DD R 2 _C L K_N 3
C K_ M_ CH 0_ 0_ D P
C K_ M_ CH 0_ 0_ D N
C K_ M_ CH 0_ 2_ D P
C K_ M_ CH 0_ 2_ D N
C K_ M_ CH 0_ 1_ D P
C K_ M_ CH 0_ 1_ D N
C K_ M_ CH 0_ 3_ D P
C K_ M_ CH 0_ 3_ D N
D DR 2 _CK E_ 0
D DR 2 _CK E_ 1
D DR 2 _CK E_ 2
D DR 2 _CK E_ 3
M_S CK E_A0
Z 03 2 6
R SVD _K2 7
R SV D_ D 3 0
R SVD _K2 9
R SV D _J 2 9
D DR 2 _OD T_ 3
D DR 2 _OD T_ 2
D DR 2 _OD T_ 1
D DR 2 _OD T_ 0
M_S CK E_A1
Z 03 2 7
Z 03 2 8
Z 03 2 9
Z 03 3 0
Z 03 3 1
C7
B1 1
C9
F1 2
Z 03 3 2
Z 03 3 3
B2 0
Z 03 3 4
D2 5
B2 8
A2 7
B3 3
Z 03 3 5
Z 03 3 6
Z 03 3 7
Z 03 3 8
AA8
D3 2
D D R 2_MA_ 1 5
D D R 2_MA_ 1 4
D D R 2_MA_ 1 3
D D R 2_MA_ 1 2
D D R 2_MA_ 1 1
D D R 2_MA_ 1 0
D D R2_ MA_ 9
D D R2_ MA_ 8
D D R2_ MA_ 7
D D R2_ MA_ 6
D D R2_ MA_ 5
D D R2_ MA_ 4
D D R2_ MA_ 3
D D R2_ MA_ 2
D D R2_ MA_ 1
D D R2_ MA_ 0
DD R 2_MA_ PA R
M_OD T_A 1
M_OD T_A 0
D D R _C OMP0
D D R 0_ D R AMR ST
D D R 2_PAR _ ER R _0*
D D R 2_PAR _ ER R _1*
D D R 2_PAR _ ER R _2*
R SVD _ K25*
D D R _C OMP_ 2
LG A1 36 6
5 OF 12
D D R 2_ R ESE T*
G25
H 24
F1 5
G23
H 23
H 17
H 22
L25
J 24
K2 2
K2 3
F2 0
J 20
G18
K1 7
A1 8
M_ MA A_ C1 5
M_ MA A_ C1 4
M_ MA A_ C1 3
M_ MA A_ C1 2
M_ MA A_ C1 1
M_ MA A_ C1 0
M_ MA A_ C9
M_ MA A_ C8
M_ MA A_ C7
M_ MA A_ C6
M_ MA A_ C5
M_ MA A_ C4
M_ MA A_ C3
M_ MA A_ C2
M_ MA A_ C1
M_ MA A_ C0
L26
F1 7
A1 7
M_ SBS_ C 2
M_ SBS_ C 1
M_ SBS_ C 0
D 17
F1 6
C 16
M_ RA S_ C_ N
M_ CA S_ C_ N
M_ WE _C _N
G16
K1 4
D 16
H 16
E1 7
D9
L17
J 15
J 22
J 21
L20
K2 0
H 21
G21
L22
L21
J 26
G26
D 26
L27
M_ SC S_ C_ N 0
M_ SC S_ C_ N 1
Z033 9
Z034 0
Z034 1
Z034 2
Z034 3
Z034 4
CK _M_ C H2 _0 _D P
CK _M_ C H2 _0 _D N
CK _M_ C H2 _2 _D P
CK _M_ C H2 _2 _D N
CK _M_ C H2 _1 _D P
CK _M_ C H2 _1 _D N
CK _M_ C H2 _3 _D P
CK _M_ C H2 _3 _D N
M_ SC KE_ C 0
Z034 5
M_ SC KE_ C 1
Z034 6
K2 7
D 30
K2 9
J 29
D 10
D 15
F1 3
L16
Z034 7
Z034 8
Z034 9
Z035 0
Z035 1
Z035 2
B1 8
Z035 3
F2 1
J 25
F2 3
K2 5
Z035 4
Z035 5
Z035 6
Z035 7
M_ OD T_ C1
M_ OD T_ C0
AC 1
DD R _ COMP2
E3 2
DD R 2 _D R AMR ST
Schematic Diagrams
LGA1366 Part C QPI
J_CPU1F
J _CPU1G
QPI BUS External Connection
CSI0_DR X_D P[19:0 ]
10 CSI 0_ DRX_DN [19:0]
CSI0_DR X_D N[ 19: 0]
10 CSI 0_ DTX_DP[ 19:0]
CSI0_DTX_D P[19:0 ]
10 CSI 0_ DTX_DN [19:0]
CSI0_DTX_D N[ 19: 0]
CO MP0
AB41
10 CSI 0_ CLKR X_D P
10 CSI 0_ CLKR X_D N
10 CSI 0_ CLKTX_D P
10 CSI 0_ CLKTX_D N
CSI0_CLKRX_DP
CSI0_CLKRX_DN
CSI0_CLKTX_ DP
CSI0_CLKTX_ DN
H_CATER R_N
H_PROC HOT#
H_CPUR ST#
SKTOC C#
TH ERMTRIP#
PECI
Z04 004
AC37
AG35
AL39
AG36
AG37
AH36
AK35
HW RST#
H_MBP_N 0
H_MBP_N 1
H_MBP_N 2
H_MBP_N 3
H_MBP_N 4
H_MBP_N 5
H_MBP_N 6
H_MBP_N 7
AF10
B3
A5
C2
B4
D1
C3
D2
E2
H_PRDY _N
H_PREQ_ N
B41
C42
CK_133M_C PU _D N
C K_133M_CPU_DP
T O PO W ER
44 I MON
44 H_PSI#
IMON
H_PSI#
39
39
39
39
39
CPU_VTT_FB
CPU_VTT_FBCPUVTT_VID 4
CPUVTT_VID 3
CPUVTT_VID 2
CPU _VTT_FB
CPU _VTT_FBCPU VTT_VID4
CPU VTT_VID3
CPU VTT_VID2
H_VI D[7:0]
44 H_VID [7: 0]
15,44
H_PRO CH OT#
H_PR OCH OT#
VC C_SEN SE
VSS_SEN SE
44 VCC _SENSE
44 VSS_SENSE
H_PWR GD
12,1 6, 18 H_PWRGD
VTT_PW RGD
H_C PU RST#
12, 18 H_CPUR ST#
16, 18 HW RST#
15,28 PEC I
15 TH ERMTRI P#
HWR ST#
PEC I
THERMTR IP#
18 H_MBP_N [7 :0]
18 H_PRDY _N
18 H_PREQ_N
18 H_TC K
18 H_TD I
18 H_TD O
18 H_TMS
18 H_TR ST_N
18 CPU _TAPGOOD
18 C K_H_BCLK_ITP_DN
18 C K_H_BCLK_ITP_DP
H_MBP_N[ 7:0 ]
H_PRD Y_N
H_PREQ_N
H_TCK
H_TDI
H_TDO
H_TMS
H_TRST_N
CPU_TAPGOOD
CK_H_ BCLK_ ITP_DN
CK_H_ BCLK_ ITP_DP
C PU_VTT
R6
49. 9_1%_04
H_CPUR ST#
R8
49. 9_1%_04
H_PR OC HOT#
R 17
49. 9_1%_04
R 24 5
1K_04
R 14
49. 9_1%_04
TH ER MTRIP#
R 35
51_1%_04
H_TDI
H_CATERR _N
H_TCK
H_TDI
H_TDO
H_TMS
H_TRST_N
CPU _TAPGOOD
AH10
AJ 9
AJ10
AG10
AH 9
AH 5
Z04 005
Z04 006
Z04 007
Z04 008
Z04 009
Z04 010
Z04 011
Z04 012
Z04 013
Z04 014
Z04 015
Z04 016
Z04 017
Z04 018
BA4
AY 4
AW41
AY40
BA40
AV2
AW 2
AY 3
AV1
AV42
AV43
AW42
AY41
AU 2
Z04 019
A40
Z04 020
Z04 021
Z04 022
Z04 023
AL5
AL4
AL40
AL41
Z04 024
K24
Z04 025
Z04 026
Z04 027
AK36
L15
K15
L23
CPU _DD R_VR EF
CR B_CPU _GTLREF AJ37
Z04 028
Z04 029
AT5
AT4
RSVD
RSVD
BCLK_DN
BCLK_DP
BCLK_ITP_ DN
BCLK_ITP_ DP
51_1%_04
VTTD_SEN SE
VSS_SENSE_VTTD
COMP0
VCC_SEN SE
RSVD
CAT_ ERR*
PROC HOT*
RESET*
SKTOC C*
TH ER MTRIP*
PECI
RSVD
VSS_SEN SE
RSVD
VCC TT_VID _4
VCC TT_VID _3
VCC TT_VID _2
DBR*
BPM_0*
BPM_1*
BPM_2*
BPM_3*
BPM_4*
BPM_5*
BPM_6*
BPM_7*
VTTPW RGOOD
VDD PW RGOOD
VCC PW RGOOD
RSVD
DDR _THERM*
PRDY *
PREQ*
PSI *
TC K
TD I
TD O
TMS
TR ST*
RSVD
VID_0/ MSID _0
VID_1/ MSID _1
VID_2/ MSID _2
VI D_3/CSC _0
VI D_4/CSC _1
VI D_5/CSC _2
VI D6
VI D7
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
AK7
AK8
Z04136
IMON
AE36
AE37
CPU _VTT_FB
CPU _VTT_FB-
AP7
H_PSI#
AL10
AL9
AN9
AM10
AN10
AP9
AP8
AN8
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
H_VID7
CSI 0_DRX_DP19
CSI 0_DRX_DN 19
CSI 0_DRX_DP18
CSI 0_DRX_DN 18
CSI 0_DRX_DP17
CSI 0_DRX_DN 17
CSI 0_DRX_DP16
CSI 0_DRX_DN 16
CSI 0_DRX_DP15
CSI 0_DRX_DN 15
CSI 0_DRX_DP14
CSI 0_DRX_DN 14
CSI 0_DRX_DP13
CSI 0_DRX_DN 13
CSI 0_DRX_DP12
CSI 0_DRX_DN 12
CSI 0_DRX_DP11
CSI 0_DRX_DN 11
CSI 0_DRX_DP10
CSI 0_DRX_DN 10
CSI 0_DRX_DP9
CSI 0_DRX_DN 9
CSI 0_DRX_DP8
CSI 0_DRX_DN 8
CSI 0_DRX_DP7
CSI 0_DRX_DN 7
CSI 0_DRX_DP6
CSI 0_DRX_DN 6
CSI 0_DRX_DP5
CSI 0_DRX_DN 5
CSI 0_DRX_DP4
CSI 0_DRX_DN 4
CSI 0_DRX_DP3
CSI 0_DRX_DN 3
CSI 0_DRX_DP2
CSI 0_DRX_DN 2
CSI 0_DRX_DP1
CSI 0_DRX_DN 1
CSI 0_DRX_DP0
CSI 0_DRX_DN 0
AG4
AG5
AK2
Z04032
Z04033
Z04034
CSI 0_CLKRX_D P
CSI 0_CLKRX_D N
CSI 0_CLKTX_D P
CSI 0_CLKTX_D N
AL3
AL38
AM36
AM38
AN36
AN38
AR36
AR37
AT36
Z04035
Z04036
Z04037
Z04038
Z04039
Z04040
Z04041
Z04042
Z04043
AR9
V11
VCC _SENSE
Z04030
AR8
U 11
VSS_SENSE
Z04031
AV6
AF7
AV3
CPU VTT_VID4
CPU VTT_VID3
CPU VTT_VID2
AB35
AA6
AR7
VTT_PWR GD
VDD PW RG OOD
H_PWRGD
AF4
AB5
PLT_MN R_ EXTTS_N1
PLT_MN R_ EXTTS_N0
AP38
AR 38
AN 39
AP39
AP41
AP40
AM42
AM41
AN 40
AM40
AN 43
AM43
AP42
AN 42
AT40
AR 40
AT43
AR 43
AU 42
AT42
AU 40
AU 41
AW 40
AV40
AU 39
AT39
BA38
AY 38
AW 37
AW 38
BA36
BA37
AW 36
AY 36
AV36
AV37
AU 38
AV38
AT37
AU 37
AR 41
AR 42
AG 42
AF42
QPI _D RX_DP19
QPI _D RX_DN19
QPI _D RX_DP18
QPI _D RX_DN18
QPI _D RX_DP17
QPI _D RX_DN17
QPI _D RX_DP16
QPI _D RX_DN16
QPI _D RX_DP15
QPI _D RX_DN15
QPI _D RX_DP14
QPI _D RX_DN14
QPI _D RX_DP13
QPI _D RX_DN13
QPI _D RX_DP12
QPI _D RX_DN12
QPI _D RX_DP11
QPI _D RX_DN11
QPI _D RX_DP10
QPI _D RX_DN10
QPI _D RX_DP9
QPI _D RX_DN9
QPI _D RX_DP8
QPI _D RX_DN8
QPI _D RX_DP7
QPI _D RX_DN7
QPI _D RX_DP6
QPI _D RX_DN6
QPI _D RX_DP5
QPI _D RX_DN5
QPI _D RX_DP4
QPI _D RX_DN4
QPI _D RX_DP3
QPI _D RX_DN3
QPI _D RX_DP2
QPI _D RX_DN2
QPI _D RX_DP1
QPI _D RX_DN1
QPI _D RX_DP0
QPI _D RX_DN0
AE40
AF40
AD 38
AE38
AB39
AB38
AC 39
AC 38
AC 41
AC 40
AD 40
AD 39
AC 43
AB43
AD 42
AC 42
AE42
AE41
AF43
AE43
AG 40
AG 41
AJ 43
AH 43
AK42
AJ 42
AH 41
AH 42
AK40
AK41
AH 40
AJ 40
AJ 38
AJ 39
AK37
AK38
AF39
AG 39
AG 38
AH 38
QPI _D TX_DP19
QPI_DTX_D N19
QPI _D TX_DP18
QPI_DTX_D N18
QPI _D TX_DP17
QPI_DTX_D N17
QPI _D TX_DP16
QPI_DTX_D N16
QPI _D TX_DP15
QPI_DTX_D N15
QPI _D TX_DP14
QPI_DTX_D N14
QPI _D TX_DP13
QPI_DTX_D N13
QPI _D TX_DP12
QPI_DTX_D N12
QPI _D TX_DP11
QPI_DTX_D N11
QPI _D TX_DP10
QPI_DTX_D N10
QPI_DTX_D P9
QPI _D TX_DN9
QPI_DTX_D P8
QPI _D TX_DN8
QPI_DTX_D P7
QPI _D TX_DN7
QPI_DTX_D P6
QPI _D TX_DN6
QPI_DTX_D P5
QPI _D TX_DN5
QPI_DTX_D P4
QPI _D TX_DN4
QPI_DTX_D P3
QPI _D TX_DN3
QPI_DTX_D P2
QPI _D TX_DN2
QPI_DTX_D P1
QPI _D TX_DN1
QPI_DTX_D P0
QPI _D TX_DN0
C SI0_ DTX_D P19
C SI0_ DTX_D N19
C SI0_ DTX_D P18
C SI0_ DTX_D N18
C SI0_ DTX_D P17
C SI0_ DTX_D N17
C SI0_ DTX_D P16
C SI0_ DTX_D N16
C SI0_ DTX_D P15
C SI0_ DTX_D N15
C SI0_ DTX_D P14
C SI0_ DTX_D N14
C SI0_ DTX_D P13
C SI0_ DTX_D N13
C SI0_ DTX_D P12
C SI0_ DTX_D N12
C SI0_ DTX_D P11
C SI0_ DTX_D N11
C SI0_ DTX_D P10
C SI0_ DTX_D N10
C SI0_ DTX_D P9
C SI0_ DTX_D N9
C SI0_ DTX_D P8
C SI0_ DTX_D N8
C SI0_ DTX_D P7
C SI0_ DTX_D N7
C SI0_ DTX_D P6
C SI0_ DTX_D N6
C SI0_ DTX_D P5
C SI0_ DTX_D N5
C SI0_ DTX_D P4
C SI0_ DTX_D N4
C SI0_ DTX_D P3
C SI0_ DTX_D N3
C SI0_ DTX_D P2
C SI0_ DTX_D N2
C SI0_ DTX_D P1
C SI0_ DTX_D N1
C SI0_ DTX_D P0
C SI0_ DTX_D N0
Z04048 AM8
Z04049 AL8
Z04050 AM6
Z04051 AM7
Z04052 AN 5
Z04053 AN 6
Z04054 AM4
Z04055 AN 4
Z04056 AP3
Z04057 AP4
Z04058 AM2
Z04059 AM3
Z04060 AN 1
Z04061 AM1
Z04062 AP2
Z04063 AN 2
Z04064 AR 4
Z04065 AR 5
Z04066 AT1
Z04067 AR 1
Z04068 AT3
Z04069 AT2
Z04070 AU 4
Z04071 AU 3
Z04072 AW 4
Z04073 AW 3
Z04074 AU 7
Z04075 AU 6
Z04076 AY 6
Z04077 AY 5
Z04078 BA7
Z04079 BA6
Z04080 AV5
Z04081 AW 5
Z04082 AY 8
Z04083 BA8
Z04084 AV7
Z04085 AW 7
Z04086 AU 8
Z04087 AV8
Z04088
Z04089
Z04090
Z04091
QPI _C LKRX_DP
QPI _C LKRX_DN
QPI _C LKTX_DP L GA136 6
QPI _C LKTX_DN
QPI_CMP0
7 O F 12
AL 43
Z0413 5
AT6
AR 6
AF6
AE6
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
LG A13 66
8
RSVD
AC8
AD8
AD5
AE5
AD6
AD7
AB6
AC6
AC4
AD4
AE3
AE4
AC3
AB3
AD2
AD3
AE1
AD1
AF2
AF3
AH2
AG2
AH3
AH4
AK1
AJ1
AJ3
AJ2
AG7
AG6
AJ4
AK4
AK6
AK5
AH6
AJ6
AJ8
AJ7
AG8
AH8
Z04092
Z04093
Z04094
Z04095
Z04096
Z04097
Z04098
Z04099
Z04100
Z04101
Z04102
Z04103
Z04104
Z04105
Z04106
Z04107
Z04108
Z04109
Z04110
Z04111
Z04112
Z04113
Z04114
Z04115
Z04116
Z04117
Z04118
Z04119
Z04120
Z04121
Z04122
Z04123
Z04124
Z04125
Z04126
Z04127
Z04128
Z04129
Z04130
Z04131
Sheet 4 of 47
LGA1366 Part C
QPI
AL6 Z04132
OF 12
R5
21_ 1%_0 4
RVSD
RVSD
RVSD
RVSD
RVSD
RSVD
RSVD
RSVD
RSVD
AY39 Z04044
AY35 Z04045
AW39 Z04046
AV35 Z04047
CPU _VTT
5V
RVSD
R502
51_1%_04
R503
10K_ 04
R504
RVSD
RVSD
RVSD
B
1 2, 15, 16,28,4 4 PWRGD_PS
VTT_PWR GD
B
C
Q48
E 04
2N39
C7 75
.0 1U_10 V_X7R_06
C
Q49
2N3904
E
10K_04
DD R_VR EF
RVSD
RVSD
RVSD
LGA13 66
CPU _TAPGO OD
6
R 37
R SVD_AK7
I SEN SE
O F 12
1.5 V
Ba ck up, Bloomf ield proces sor is
des igned with an int er nal VREF
H_TDO
R 33
51_1%_04
H_TMS
R 38
*1K_04
H_PR DY _N
1.5V
R 40
1K_1%_04
*10K_04
SKTOC C#
11/ 3
51_1%_04
H_TCK
R 36
51_1%_04
H_TRST_N
R 18
49. 9_1%_04
COMP0
VD DPWR GOO D
C 50
R 32
2K_ 04
C48
.1U _10V_X7R_ 04
10U_6.3V_X5R_0 8
C51
. 1U_10V_ 04
R 24 4
806_1%_04
CPU _DD R_VR EF
C 52
R 50 5
R34
R39
1K_1 %_04
.1U _10V_04
17, 24, 30,31,39. .41,43.. 45 5 V
CPU _VTT
R 10
*1K_1%_04
CR B_CPU _GTLR EF
C 12
*. 1U_10V_04
C11
R9
*1K_1 %_04
5, 15, 18,39,44 CPU_VTT
5,7.. 9, 40, 43 1.5V
*. 1U _10V_04
Bloomf ield now requires boar d lev el termination
f or JTAG signals.
LGA1366 Part C QPI B - 5
B.Schematic Diagrams
10 CSI 0_ DRX_DP[ 19 :0]
19 CK_13 3M_CPU_DN
19 CK_13 3M_CPU_DP
In te l X D P D e b u g
J_CPU1H
AF1
Z04 001
Z04 002 AG1
CK_ 133M_CPU_D N AH35
CK_ 133M_CPU_D P AJ35
CK_ H_BC LK_I TP_D N AA4
CK_ H_BC LK_I TP_D P AA5
Schematic Diagrams
LGA1366 Part C Power
VCORE
VC OR E
VCORE
1.5V
VCORE
J_CPU 1I
C3 92
J _C PU1J
C 41 7
C398
C 389
C3 99
C 411
C410
C 409
C4 08
AC10
AC11
AC33
AC34
AC35
AD9
AD34
AD35
AD36
AE8
AE9
AE34
AF8
VC OR E
R33
R11
M13
M15
M19
M21
M23
M25
M29
M31
M33
N11
N33
T11
T33
W11
AH11
AH33
AJ11
AJ33
AK11
AK12
LG A13 66
1.8VS
LG A1 36 6
10
C 40 4
C390
C 421
C17
C 21
C22
C37
C18
C3 3
C 35
C26
C 27
C25
C15
C20
C3 6
C 40
CAD NOTE:
PLA C E A LL 0805 CA PS IN SIDE
CPU SOC KET CA V ITY
VCORE
+ C3
+C4
C4 02
+ C5
*330U _2.5 V_D3
C 40 1
C400
C 407
C 403
*33 0U _2 .5V_ D3
10U_10 V_08 10U _10V_08 10U_ 10V_08
10U _10V_08
10U _10V_08
*330 U_2. 5V_D 3
CPU_VTT
C 39 7
C406
C 422
C4 12
C 413
10U _10V_08 10U_ 10V_08 1 0U _1 0V_08
10 U_10 V_08
C4 14
C 423
C32
C 23
CPU _VTT
1.8VS
+ C49
+ C4 38
+ C 34
C416
33 0U _2 .5V_D3 330U_ 2. 5V_D 3
C41
10U _10V_08
.1U_10V_X7R_04
D 03
O F 12
C4 19
C 41 8
C420
C 43 3
C4 37
C 432
C434
C 43 5
C4 36
10 U_10 V_08 10U _10V_08
.1U_1 0V_X7R_04
.1U_1 0V_X7R_04
. 1U _1 0V_X7 R_0 4
*3 30U_ 2. 5V_D 3
10U_ 10V_08
. 1U _10 V_X7R _04
. 1U_ 10V_X7R _04
.1U_ 10V_X7R_04
2
330U _2.5 V_D 3
+ C 43 9
C4 24
.1U _10V_ X7R_ 04
.1U _10V_ X7R_ 04
. 1U _10V_X7 R_04
. 1U_10V_X7R _0 4
.1U_10V_X7R _04
.1U_10V_X7R_04
1. 5V
1
O F 12
C16
.1U_10V_X7R_04
.1U_10V_X7R_04
.1U_1 0V_X7R_04
. 1U _10V_X7R_04
. 1U _10V_X7R _04
. 1U _10 V_X7R _04
. 1U_ 10V_X7R _04
.1U_10V_X7R_04
VCC PLL
VCC PLL
VCC PLL
9
C28
.1U_10V_X7R_04
.1U_10V_X7R_04
.1U_1 0V_X7R_04
. 1U _10V_X7R_04
. 1U _10V_X7R _04
. 1U _10 V_X7R _04
. 1U_ 10V_X7R _04
.1U_10V_X7R_04
1
V33
U33
W33
B - 6 LGA1366 Part C Power
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
C3 96
1
VTTD
VTTD
VTTD
VTTD
VTTD
VTTD
VTTD
VTTD
VTTD
VTTD
VTTD
VTTD
VTTD
C 395
2
AF36
AF9
AE35
AA10
AA11
AA33
AB8
AB9
AB10
AB11
AB33
AB34
C394
1
VTTD
VTTD
VTTD
VTTD
VTTD
VTTD
VTTD
VTTD
VTTD
VTTD
VTTD
VTTD
C 39 3
10U_10V_08 10U _10V_08 10U_ 10V_08 10U _1 0V_08 10U_10 V_08 10U _10V_08 10U_ 10V_08 1 0U _1 0V_08
2
AF37
C PU_VTT
C3 91
1
VTTD
C PU_VTT
AK13
AK15
AK16
AK18
AK19
AK21
AK24
AK25
AK27
AK28
AK30
AK31
AK33
AL12
AL13
AL15
AL16
AL18
AL19
AL21
AL24
AL25
AL27
AL28
AL30
AL31
AL33
AL34
AM1 2
AM1 3
AM1 5
AM1 6
AM1 8
AM1 9
AM2 1
AM2 4
AM2 5
AM2 7
AM2 8
AM3 0
AM3 1
AM3 3
AM3 4
AN1 2
AN1 3
AN1 5
AN1 6
AN1 8
AN1 9
AN2 1
AN2 4
AN2 5
AN2 7
AN2 8
AN3 0
AN3 1
AN3 3
AN3 4
AP12
AP13
AP15
AP16
AP18
AP19
AP21
AP24
AP25
AP27
AP28
AP30
AP31
AP33
AP34
AR1 0
AR1 2
AR1 3
AR1 5
AR1 6
AR1 8
AR1 9
2
AG34
AF34
AF33
AF11
AE33
AE11
AE10
AD10
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VC CP
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
VD DQ
1
VTTA
VTTA
VTTA
VTTA
VTTA
VTTA
VTTA
VTTA
A24
A29
B7
B12
B17
B22
B27
B32
C10
C15
C20
C25
C30
D13
D18
D23
D28
E11
E16
E21
E26
E31
F14
F19
F24
G17
G22
G27
H15
H20
H25
J18
J23
J28
K16
K21
K26
L14
L19
L24
M17
M27
A19
A14
A9
2
AY13
AY15
AY16
AY18
AY19
AY21
AY24
AY25
AY27
AY28
AY30
AY31
AY33
AY34
BA9
BA10
BA12
BA13
BA15
BA16
BA18
BA19
BA24
BA25
BA27
BA28
BA30
M1 1
1
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
2
Sheet 5 of 47
LGA1366 Part C
Power
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
VCC P
2
B.Schematic Diagrams
10U_10V_08 10U _10V_08 10U_ 10V_08 10U _1 0V_08 10U_10 V_08 10U _10V_08 10U_ 10V_08 1 0U _1 0V_08 10 U_10 V_08
AR21
AR24
AR25
AR27
AR28
AR30
AR31
AR33
AR34
AT9
AT10
AT12
AT13
AT15
AT16
AT18
AT19
AT21
AT24
AT25
AT27
AT28
AT30
AT31
AT33
AT34
AU 9
AU10
AU12
AU13
AU15
AU16
AU18
AU19
AU21
AU24
AU25
AU27
AU28
AU30
AU31
AU33
AU34
AV9
AV10
AV12
AV13
AV15
AV16
AV18
AV19
AV21
AV24
AV25
AV27
AV28
AV30
AV31
AV33
AV34
AW 9
AW10
AW12
AW13
AW15
AW16
AW18
AW19
AW21
AW24
AW25
AW27
AW28
AW30
AW31
AW33
AW34
AY 9
AY10
AY12
4, 15 ,18,3 9, 44 CPU_VTT
44 VCOR E
1 3, 41 1. 8VS
4 ,7. .9,4 0, 43 1. 5V
Schematic Diagrams
LGA1366 Part E GND, Thermal
J_ CPU1 K
J_ CPU1 L
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
11
LGA136 6
OF 12
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AV23
AV22
AV20
AV17
AV14
AV11
AV4
AU4 3
AU3 6
AU3 5
AU3 2
AU2 9
AU2 6
AU2 3
AU2 2
AU2 0
AU1 7
AU1 4
AU1 1
AU5
AU1
AT41
AT38
AT35
AT32
AT29
AT26
AT23
AT22
AT20
AT17
AT14
AT11
AT8
AT7
AR3 9
AR3 5
AR3 2
AR2 9
AR2 6
AR2 3
AR2 2
AR2 0
AR1 7
AR1 4
AR1 1
AR3
AR2
AP43
AP37
AP36
AP35
AP32
AP29
AP26
AP23
AP22
AP20
AP17
AP14
AP11
AP10
AP6
AP5
AP1
AN4 1
AN3 7
AN3 5
AN3 2
AN2 9
AN2 6
AN2 3
AN2 2
AN2 0
AN1 7
AN1 4
AN1 1
AN7
AN3
AM39
AM37
AM35
AM32
AM29
AM26
AM23
AM22
AM20
AM17
AM14
AM11
AM9
AM5
AL 42
AL 37
AL 36
AL 35
AL 32
AL 29
AL 26
AL 23
AL 22
AL 20
AL 17
AL 14
AL 11
AL7
AL2
AL1
AK43
AK39
AK34
AK32
AK29
AK26
AK23
AK22
AK20
AK17
AK14
AK10
AK9
AK3
AJ 41
AJ 36
AJ 34
AJ5
AH 39
AH 37
AH 34
AH7
AH1
AG 43
AG 33
AG 11
AG9
AG3
AF41
AF38
AF35
AF5
AE39
AE7
AE2
AD 43
AD 41
AD 33
AD 11
AD 37
AC 36
AC9
AC5
AC2
AB42
AC7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
LGA13 66
12
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AB40
AB37
AB7
AB4
AA39
AA38
AA34
AA9
AA3
Y 41
Y 36
Y 33
Y 11
Y6
Y1
W 43
W 38
W8
W3
V40
V35
V10
V5
U 42
U 37
U7
U2
T39
T34
T9
T4
R 41
R 36
R6
R1
P43
P38
P33
P11
P8
P3
N 40
N 35
N 10
N5
M42
M37
M32
M30
M28
M26
M24
M22
M20
M18
M16
M14
M12
M7
M2
L39
L34
L29
L9
L4
K41
K36
K31
K11
K6
K1
J 43
J 38
J 33
J 13
J8
J3
H 40
Sheet 6 of 47
LGA1366 Part E
GND, Thermal
Place near to the CPU
Thermal IC
3V
20M IL
R 25 4
C4 30
*100K_ 04
.1U_1 0V_X7R_04
R2 55
*10 K_ 04
R2 53
*0_ 04
3V
U16
H_THERMDA
1
2
H_THERMDC
C4 31
10 00P_ 50V_X7R _04
3
5
VDD
D+
4
6
THERM_ALERT# 28
ALERT
DSDATA
GN D
SCL K
EMC1 402
Layout Note:
Layout Note:
Route H_THERMDA and
H_THERMDC on same layer.
10 mil trace on 10 mil spacing.
Close to Thermal IC
12 H _TH ERMD A
12 H _TH ERMD C
THERM
AL ERT
7
8
SMD_C PU _THERM
SMC_C PU _THERM
ALERT
28
SMD_ CPU_ THER M 28
SMC_ CPU_ THER M 28
ADM1032 1000p
F75383M 2200p
H_ THERMDA
H_ THERMDC
OF 1 2
12, 13, 15. .1 7, 20, 24,26 ,2 9.. 32 ,40,4 1,4 3 3V
LGA1366 Part E GND, Thermal B - 7
B.Schematic Diagrams
B4 2
B3 7
B2
A4 1
A3 9
A3 5
A6
A4
C5
E6
E1
D4 3
D3 8
D3 3
D8
D3
C4 3
C4 0
C3 5
E3 6
E4 1
F4
F9
F2 9
F3 4
F3 9
G2
G7
G1 2
G3 2
G3 7
G4 2
H5
H1 0
H3 0
H3 5
BA3 9
BA3 5
BA2 9
BA2 6
BA2 0
BA1 7
BA1 4
BA1 1
BA5
BA3
AY4 2
AY3 7
AY3 2
AY2 9
AY2 6
AY2 3
AY2 2
AY2 0
AY1 7
AY1 4
AY1 1
AY 7
AY 2
AW3 5
AW3 2
AW2 9
AW2 6
AW2 3
AW2 2
AW2 0
AW1 7
AW1 4
AW1 1
AW 8
AW 6
AW 1
AV4 1
AV3 9
AV3 2
AV2 9
AV2 6
Schematic Diagrams
DDR3 Channel A SO-DIMM_0
ChannelA
SO-DIMM0
Layout Note:
CLK0/space/CLK_1
B.Schematic Diagrams
MS:8.5 / 5 / 8.5
SL: 4 / 4 / 4
D IM0
C HA
S A0
Low
S A1
C HB
C HC
Lo w
Low
Hig h
Hi gh
L ow
Sheet 7 of 47
DDR3 Channel A
SO-DIMM_0
R46
R45
10K_04
10K_04
R43
R50
R49
R48
R52
R44
R51
R47
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
M_ SBS_A0
M_ SBS_A1
M_ SBS_A2
M_ SCS_A_N0
M_ SCS_A_N1
CK_M_C H0_0_ DP
CK_M_C H0_0_ DN
CK_M_C H0_1_ DP
CK_M_C H0_1_ DN
M_ SCKE_A0
M_ SCKE_A1
M_ CAS_A_N
M_ RAS_A_N
M_ WE_A_N
SA0_DIM0
SA1_DIM0
SCLK
SDATA
109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200
BA0
BA1
BA2
S0#
S1#
C K0
C K0 #
C K1
C K1 #
C KE0
C KE1
C AS#
R AS#
W E#
SA0
SA1
SCL
SDA
M_ OD T_A0
M_ OD T_A1
116
120
ODT0
ODT1
0_04
0_04
0_04
0_04
0_04
0_04
0_04
0_04
Z0704
Z0705
Z0706
Z0707
Z0708
Z0709
Z0710
Z0711
X5 8 ? ? ? ?
? ? ? E CC ? ? ,
? ? DM ? ? ? ? ? O K
11
28
46
63
136
153
170
187
12
29
47
64
137
154
171
188
M_ DQS_ A_DP0
M_ DQS_ A_DP1
M_ DQS_ A_DP2
M_ DQS_ A_DP3
M_ DQS_ A_DP4
M_ DQS_ A_DP5
M_ DQS_ A_DP6
M_ DQS_ A_DP7
M_ DQS _A _DP 8
M_ DQS _A _DN 8
JD IMM1A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC #
A13
A14
A15
M_ MAA_A0
M_ MAA_A1
M_ MAA_A2
M_ MAA_A3
M_ MAA_A4
M_ MAA_A5
M_ MAA_A6
M_ MAA_A7
M_ MAA_A8
M_ MAA_A9
M_ MAA_A10
M_ MAA_A11
M_ MAA_A12
M_ MAA_A13
M_ MAA_A14
M_ MAA_A15
10
27
45
62
135
152
169
186
M_ DQS_ A_DN 0
M_ DQS_ A_DN 1
M_ DQS_ A_DN 2
M_ DQS_ A_DN 3
M_ DQS_ A_DN 4
M_ DQS_ A_DN 5
M_ DQS_ A_DN 6
M_ DQS_ A_DN 7
D M0
D M1
D M2
D M3
D M4
D M5
D M6
D M7
D QS0
D QS1
D QS2
D QS3
D QS4
D QS5
D QS6
D QS7
ChannelA
J DI MM1B
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ1 0
DQ1 1
DQ1 2
DQ1 3
DQ1 4
DQ1 5
DQ1 6
DQ1 7
DQ1 8
DQ1 9
DQ2 0
DQ2 1
DQ2 2
DQ2 3
DQ2 4
DQ2 5
DQ2 6
DQ2 7
DQ2 8
DQ2 9
DQ3 0
DQ3 1
DQ3 2
DQ3 3
DQ3 4
DQ3 5
DQ3 6
DQ3 7
DQ3 8
DQ3 9
DQ4 0
DQ4 1
DQ4 2
DQ4 3
DQ4 4
DQ4 5
DQ4 6
DQ4 7
DQ4 8
DQ4 9
DQ5 0
DQ5 1
DQ5 2
DQ5 3
DQ5 4
DQ5 5
DQ5 6
DQ5 7
DQ5 8
DQ5 9
DQ6 0
DQ6 1
DQ6 2
DQ6 3
D QS0#
D QS1#
D QS2#
D QS3#
D QS4#
D QS5#
D QS6#
D QS7#
DD R3_ SODI MM0 _2 04P
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
M_D ATA_A0
M_D ATA_A1
M_D ATA_A2
M_D ATA_A3
M_D ATA_A4
M_D ATA_A5
M_D ATA_A6
M_D ATA_A7
M_D ATA_A8
M_D ATA_A9
M_D ATA_A10
M_D ATA_A11
M_D ATA_A12
M_D ATA_A13
M_D ATA_A14
M_D ATA_A15
M_D ATA_A16
M_D ATA_A17
M_D ATA_A18
M_D ATA_A19
M_D ATA_A20
M_D ATA_A21
M_D ATA_A22
M_D ATA_A23
M_D ATA_A24
M_D ATA_A25
M_D ATA_A26
M_D ATA_A27
M_D ATA_A28
M_D ATA_A29
M_D ATA_A30
M_D ATA_A31
M_D ATA_A32
M_D ATA_A33
M_D ATA_A34
M_D ATA_A35
M_D ATA_A36
M_D ATA_A37
M_D ATA_A38
M_D ATA_A39
M_D ATA_A40
M_D ATA_A41
M_D ATA_A42
M_D ATA_A43
M_D ATA_A44
M_D ATA_A45
M_D ATA_A46
M_D ATA_A47
M_D ATA_A48
M_D ATA_A49
M_D ATA_A50
M_D ATA_A51
M_D ATA_A52
M_D ATA_A53
M_D ATA_A54
M_D ATA_A55
M_D ATA_A56
M_D ATA_A57
M_D ATA_A58
M_D ATA_A59
M_D ATA_A60
M_D ATA_A61
M_D ATA_A62
M_D ATA_A63
1.5V
3VS
M_DATA_A[63: 0]
VD DSPDA
NC3
NC_04
VD DSPDA
75
76
81
82
87
88
93
94
99
10 0
10 5
10 6
11 1
11 2
11 7
11 8
12 3
12 4
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD1 0
VDD1 1
VDD1 2
VDD1 3
VDD1 4
VDD1 5
VDD1 6
VDD1 7
VDD1 8
19 9
VDDSPD
77
12 2
12 5
NC 1
NC 2
NC TEST
19 8
30
EVEN T#
RESET#
1
12 6
VREF_D Q
VREF_C A
20 mil s tra ce
C449
2.2U_16V_X5R _06
Z070 1
Z070 2
Z070 3
C 448
.1 U_1 0V_ X7R _04
PM_EXTTS_DD R#
DD R0_DRAMRST
D IMM_C A_VREF_A
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VTT1
VSS11
VTT2
VSS12
VSS13
G1
VSS14
G2
VSS15
D DR 3_SODIMM0_204P
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
M_DATA_ A[63:0] 2
M _C B_E CC _A[ 7: 0]
M_DQS_A_D P[7: 0]
M_DQS_A_D N[ 7:0]
M_MAA_A[ 15:0]
M_SBS_A[2 :0 ]
M_DQS_A_DP[ 7: 0] 2
M_DQS_A_DN [7:0]
2
M_MAA_A[15:0] 3
M_SBS_A[ 2:0 ] 3
M_SCKE_A[ 1: 0]
M_SC KE_A[1: 0] 3
M_OD T_A[ 1: 0]
M_ODT_A[1:0]
C K_M_CH0 _0_DP
C K_M_CH0 _0_DN
CK_M_CH 0_0_D P 3
CK_M_CH 0_0_D N 3
C K_M_CH0 _1_DP
C K_M_CH0 _1_DN
CK_M_CH 0_1_D P 3
CK_M_CH 0_1_D N 3
M_RAS_A_N
M_CAS_A_N
M_WE_ A_N
M_R AS_A_N 3
M_C AS_A_N 3
M_W E_A_N 3
M_SCS_A_N0
M_SCS_A_N1
M_SC S_A_N0
M_SC S_A_N1
D DR0_D RAMR ST
PM_EXTTS_D DR#
DDR 0_D RAMR ST 3
PM_EXTTS_DD R# 8 ,9
SC LK
SD ATA
SC LK 8, 9, 12, 16 ,18,19,3 2
SDATA 8,9, 12 ,1 6,18, 19, 32
3
0. 75V
203
204
3
3
GND 1
GND 2
1.5V
R41
Fro m pow er 0. 75 V
15m il s t rac e
34m il s s pac in g
1 K_1%_0 4
0 .75V
D IMM_C A_VREF_A
R42
C54
C1 05
C 84
C106
C91
1 K_1%_0 4 . 1U_10V_ X7R_04
4. 7U_6. 3V_0 6 4.7U_6.3V_06
.1U _1 0V_X7R_04
. 1U_ 10V_X7R_04
CLOSE TO SO-DIMM_0
8,9,40 0. 75V
4,5 ,8,9,40,43 1. 5V
8,9,12,13, 15. .30, 32, 39,41,43 3VS
1.5V
+
C475
100U _6.3V_B
C71
C 73
C471
C86
C470
C 472
C468
C46 7
C 452
C77
C 88
1 0U_ 10V_08 10U_10V_08 10U_10 V_ 08 10U_10V_08 10U_10V_08 *1 0u_10 V_0 8 . 1U_ 10V_X7R_04.1U_10V_X7R _04. 1U _10V_X7 R_04.1 U_10V_ X7R _0 4 1 U_6 .3 V_04
B - 8 DDR3 Channel A SO-DIMM_0
C7 5
.01U_16V_X7 R_04
Schematic Diagrams
DDR3 Channel B SO-DIMM_1
ChannelB
SO-DIMM1
Layout Note:
CLK0/space/CLK_1
MS:8.5 / 5 / 8.5
SL: 4 / 4 / 4
C HA
C HB
C HC
S A0
Low
Lo w
Hi gh
S A1
Low
Hig h
L ow
R276
R277
10K_04
10K_04
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
M_SBS_ B0
M_SBS_ B1
M_SBS_ B2
M_SCS_B_ N0
M_SCS_B_ N1
CK_ M_C H1_0_DP
CK_ M_C H1_0_DN
CK_ M_C H1_1_DP
CK_ M_C H1_1_DN
M_SCKE_B0
M_SCKE_B1
M_CAS_B_ N
M_RAS_B_ N
M_WE_B_ N
SA0_ DIM1
SA1_ DIM1
SCL K
SDATA
109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200
M_OD T_B0
M_OD T_B1
116
120
R 27 2
R 26 6
R 26 7
R 27 3
R 26 4
R 27 4
R 26 5
R 27 5
3VS
M _DQ S_ A_D P8
M _DQ S_ A_D N8
X 58 ? ? ? ?
? ? ? EC C? ? ,
? ? D M ? ? ? ? ? OK
0 _0 4
0 _0 4
0 _0 4
0 _0 4
0 _0 4
0 _0 4
0 _0 4
0 _0 4
Z0804 11
Z0805 28
Z0806 46
Z0807 63
Z0808 136
Z0809 153
Z0810 170
Z0811 187
M_DQS_B_DP0
M_DQS_B_DP1
M_DQS_B_DP2
M_DQS_B_DP3
M_DQS_B_DP4
M_DQS_B_DP5
M_DQS_B_DP6
M_DQS_B_DP7
12
29
47
64
137
154
171
188
M_DQS_B_DN 0
M_DQS_B_DN 1
M_DQS_B_DN 2
M_DQS_B_DN 3
M_DQS_B_DN 4
M_DQS_B_DN 5
M_DQS_B_DN 6
M_DQS_B_DN 7
10
27
45
62
135
152
169
186
JD IMM2A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC #
A13
A14
A15
BA0
BA1
BA2
S0#
S1#
C K0
C K0 #
C K1
C K1 #
C KE0
C KE1
C AS#
R AS#
W E#
SA0
SA1
SCL
SDA
O DT0
O DT1
D M0
D M1
D M2
D M3
D M4
D M5
D M6
D M7
D QS0
D QS1
D QS2
D QS3
D QS4
D QS5
D QS6
D QS7
ChannelB
JDI MM2B
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
D QS0#
D QS1#
D QS2#
D QS3#
D QS4#
D QS5#
D QS6#
D QS7#
DD R3_SODI MM1_204P
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
12 9
13 1
14 1
14 3
13 0
13 2
14 0
14 2
14 7
14 9
15 7
15 9
14 6
14 8
15 8
16 0
16 3
16 5
17 5
17 7
16 4
16 6
17 4
17 6
18 1
18 3
19 1
19 3
18 0
18 2
19 2
19 4
M_D ATA_B0
M_D ATA_B1
M_D ATA_B2
M_D ATA_B3
M_D ATA_B4
M_D ATA_B5
M_D ATA_B6
M_D ATA_B7
M_D ATA_B8
M_D ATA_B9
M_D ATA_B10
M_D ATA_B11
M_D ATA_B12
M_D ATA_B13
M_D ATA_B14
M_D ATA_B15
M_D ATA_B16
M_D ATA_B17
M_D ATA_B18
M_D ATA_B19
M_D ATA_B20
M_D ATA_B21
M_ DATA_B22
M_ DATA_B23
M_ DATA_B24
M_ DATA_B25
M_ DATA_B26
M_ DATA_B27
M_ DATA_B28
M_ DATA_B29
M_ DATA_B30
M_ DATA_B31
M_ DATA_B32
M_ DATA_B33
M_ DATA_B34
M_ DATA_B35
M_ DATA_B36
M_ DATA_B37
M_ DATA_B38
M_ DATA_B39
M_ DATA_B40
M_ DATA_B41
M_ DATA_B42
M_ DATA_B43
M_ DATA_B44
M_ DATA_B45
M_ DATA_B46
M_ DATA_B47
M_ DATA_B48
M_ DATA_B49
M_ DATA_B50
M_ DATA_B51
M_ DATA_B52
M_ DATA_B53
M_ DATA_B54
M_ DATA_B55
M_ DATA_B56
M_ DATA_B57
M_ DATA_B58
M_ DATA_B59
M_ DATA_B60
M_ DATA_B61
M_ DATA_B62
M_ DATA_B63
1.5V
3VS
M_DATA_B[6 3: 0]
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
VDDSPD B
NC 1
NC _04
VD DSPDB
20 mil s tra ce
C473
C4 74
2. 2U _16 V_X5 R_ 06
. 1U_ 10V_X7R_04
Z0801
Z0802
Z0803
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
199
VDDSPD
77
122
125
NC 1
NC 2
NC TEST
PM_EXTTS_ DD R#
DD R1_DRAMRST
198
30
DIMM_C A_VREF_B
1
126
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
EVEN T#
RESET#
VREF_D Q
VREF_C A
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VTT1
VSS10
VTT2
VSS11
VSS12
G1
VSS13
G2
VSS14
VSS15
D DR 3_SODIMM1_20 4P
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
M_ DATA_B[63 :0] 2
M _C B_E CC _B[ 7: 0]
M_DQS_B_D P[7: 0]
M_ DQS_ B_DP[ 7: 0] 2
M_DQS_B_D N[ 7:0]
M_ DQS_ B_DN [7:0]
M_MAA_B[ 15 :0]
M_MAA_ B[1 5:0 ] 3
M_SBS_B[2:0 ]
2
M_SBS_B[ 2:0] 3
M_SCKE_B[ 1: 0]
M_SC KE_B[1: 0] 3
M_OD T_B[ 1: 0]
M_ODT_ B[1 :0]
C K_M_ CH1_0 _DP
C K_M_ CH1_0 _DN
CK_M_CH 1_0 _D P 3
CK_M_CH 1_0 _D N 3
C K_M_ CH1_1 _DP
C K_M_ CH1_1 _DN
3
CK_M_CH 1_1 _D P 3
CK_M_CH 1_1 _D N 3
M_RAS_B_ N
M_CAS_B_ N
M_WE_ B_N
M_R AS_ B_N 3
M_C AS_ B_N 3
M_W E_ B_N 3
M_SCS_B_ N0
M_SCS_B_ N1
M_SC S_ B_N0
M_SC S_ B_N1
Sheet 8 of 47
DDR3 Channel B
SO-DIMM_1
0. 75 V
203
204
3
3
GND 1
GND 2
D DR1_D RAMR ST
PM_EXTTS_D DR#
SC LK
SD ATA
DDR 1_D RAMR ST 3
PM_EXTTS_DD R# 7,9
SC LK 7, 9, 12, 16 ,18 ,19,32
SDATA 7 ,9, 12,1 6,1 8, 19, 32
Layout note:
SO-DIMM_1 is placed farther from
the CPU than SO-DIMM_0
1.5V
R2 71
1K_ 1%_0 4
15m il s t rac e
34m il s s pac in g
Fr om po wer 0 .75 V
0 .75 V
DI MM_ CA_VR EF_B
R2 70
C 469
C1 38
1K_ 1%_0 4
C 11 3
C1 45
C114
.1U _1 0V_X7R_ 04
4. 7U_ 6. 3V_06 4 .7U_6 .3V_06
.1U _10V_X7R_04
. 1U_10V_X7 R_04
CLOSE TO SO-DIMM_1
4, 5, 7,9 ,40,43 1. 5V
7,9 ,12, 13, 15 ..30, 32 ,39 ,41,43 3VS
7,9,4 0 0. 75 V
1.5 V
+
C1 49
100U _6.3V_ B
C120
C 136
C117
C1 18
C14 2
C 14 0
C1 37
C141
C 115
C139
C 116
. 1U_10V_X7 R_04
. 1U _10V_X7 R_ 04
1 U_6.3 V_04
10U_10V_ 08 10U_10V_ 08 10U_ 10V_08 10U_10V_ 08 10 U_10V_0 8 *1 0u_10V_0 8
.1 U_10V_X7R _04
.1 U_ 10V_X7R _0 4
C1 19
.01U_ 16 V_X7R_04
DDR3 Channel B SO-DIMM_1 B - 9
B.Schematic Diagrams
D IM0
M_MAA_B0
M_MAA_B1
M_MAA_B2
M_MAA_B3
M_MAA_B4
M_MAA_B5
M_MAA_B6
M_MAA_B7
M_MAA_B8
M_MAA_B9
M_MAA_B1 0
M_MAA_B1 1
M_MAA_B1 2
M_MAA_B1 3
M_MAA_B1 4
M_MAA_ B15
Schematic Diagrams
DDR3 Channel C SO-DIMM_2
ChannelC
SO-DIMM2
M_ MAA_C 0
M_ MAA_C 1
M_ MAA_C 2
M_ MAA_C 3
M_ MAA_C 4
M_ MAA_C 5
M_ MAA_C 6
M_ MAA_C 7
M_ MAA_C 8
M_ MAA_C 9
M_ MAA_C 10
M_ MAA_C 11
M_ MAA_C 12
M_ MAA_C 13
M_ MAA_C 14
M_ MAA_C 15
Layout Note:
CLK0/space/CLK_1
B.Schematic Diagrams
MS:8.5 / 5 / 8.5
SL: 4 / 4 / 4
Sheet 9 of 47
DDR3 Channel C
SO-DIMM_2
CHB
CHC
Low
Lo w
H igh
Low
Hig h
Low
D IM 0
C HA
S A0
S A1
3VS
R 28 4
R 285
10K_0 4
*10K_0 4
R 28 9
R 290
*10K_04
10K_04
M_ SBS_C0
M_ SBS_C1
M_ SBS_C2
M_ SCS_C _N 0
M_ SCS_C _N 1
CK_M_ CH2 _0_DP
CK_M_ CH2 _0_DN
CK_M_ CH2 _1_DP
CK_M_ CH2 _1_DN
M_ SCKE_C 0
M_ SCKE_C 1
M_ CAS_C _N
M_ RAS_C _N
M_ WE_C_N
SA0_ DI M2
SA1_ DI M2
SCLK
SDATA
1 09
1 08
79
1 14
1 21
1 01
1 03
1 02
1 04
73
74
1 15
1 10
1 13
1 97
2 01
2 02
2 00
M_ OD T_C 0
M_ OD T_C 1
1 16
1 20
R 291
R 279
R 280
R 286
R 281
R 287
R 282
R 288
M_ DQ S_ A_D P8
M_ DQ S_ A_D N8
X 58 ? ? ? ?
? ? ? EC C? ? ,
? ? D M ? ? ? ? ? OK
98
97
96
95
92
91
90
86
89
85
1 07
84
83
1 19
80
78
0_04
0_04
0_04
0_04
0_04
0_04
0_04
0_04
Z09 04 11
Z09 05 28
Z09 06 46
Z09 07 63
Z09 08 1 36
Z09 09 1 53
Z09 10 1 70
Z09 11 1 87
M_ DQS_C_ DP0
M_ DQS_C_ DP1
M_ DQS_C_ DP2
M_ DQS_C_ DP3
M_ DQS_C_ DP4
M_ DQS_C_ DP5
M_ DQS_C_ DP6
M_ DQS_C_ DP7
12
29
47
64
1 37
1 54
1 71
1 88
M_ DQS_C_ DN0
M_ DQS_C_ DN1
M_ DQS_C_ DN2
M_ DQS_C_ DN3
M_ DQS_C_ DN4
M_ DQS_C_ DN5
M_ DQS_C_ DN6
M_ DQS_C_ DN7
10
27
45
62
1 35
1 52
1 69
1 86
JD IMM3A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/ AP
A11
A12/ BC #
A13
A14
A15
ChannelC
J DI MM3B
D Q0
D Q1
D Q2
D Q3
D Q4
D Q5
D Q6
D Q7
D Q8
D Q9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
BA0
BA1
BA2
S0#
S1#
C K0
C K0#
C K1
C K1#
C KE0
C KE1
C AS#
R AS#
W E#
SA0
SA1
SC L
SD A
ODT0
ODT1
D M0
D M1
D M2
D M3
D M4
D M5
D M6
D M7
D QS0
D QS1
D QS2
D QS3
D QS4
D QS5
D QS6
D QS7
D QS0#
D QS1#
D QS2#
D QS3#
D QS4#
D QS5#
D QS6#
D QS7#
DD R3 _SOD IMM2_204P
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
M_ DATA_C0
M_ DATA_C1
M_ DATA_C2
M_ DATA_C3
M_ DATA_C4
M_ DATA_C5
M_ DATA_C6
M_ DATA_C7
M_ DATA_C8
M_ DATA_C9
M_ DATA_C10
M_ DATA_C11
M_ DATA_C12
M_ DATA_C13
M_ DATA_C14
M_ DATA_C15
M_ DATA_C16
M_ DATA_C17
M_ DATA_C18
M_ DATA_C19
M_ DATA_C20
M_ DATA_C21
M_ DATA_C22
M_ DATA_C23
M_ DATA_C24
M_ DATA_C25
M_ DATA_C26
M_ DATA_C27
M_ DATA_C28
M_ DATA_C29
M_ DATA_C30
M_ DATA_C31
M_ DATA_C32
M_ DATA_C33
M_ DATA_C34
M_ DATA_C35
M_ DATA_C36
M_ DATA_C37
M_ DATA_C38
M_ DATA_C39
M_ DATA_C40
M_ DATA_C41
M_ DATA_C42
M_ DATA_C43
M_ DATA_C44
M_ DATA_C45
M_ DATA_C46
M_ DATA_C47
M_ DATA_C48
M_ DATA_C49
M_ DATA_C50
M_ DATA_C51
M_ DATA_C52
M_ DATA_C53
M_ DATA_C54
M_ DATA_C55
M_ DATA_C56
M_ DATA_C57
M_ DATA_C58
M_ DATA_C59
M_ DATA_C60
M_ DATA_C61
M_ DATA_C62
M_ DATA_C63
1. 5V
3VS
M_DATA_C[63: 0]
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
VD DSPDC
NC2
NC_ 04
VDD SPD C
2 0m ils t rac e
C 146
2. 2U _16 V_X5R_06
C148
.1U _1 0V_X7R _04
Z0 901
Z0 902
Z0 903
PM_EXTTS_DD R#
DDR 2_DRAMRST
DI MM_CA_VREF_C
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD1 0
VDD1 1
VDD1 2
VDD1 3
VDD1 4
VDD1 5
VDD1 6
VDD1 7
VDD1 8
199
VDDSPD
77
122
125
NC 1
NC 2
NC TEST
198
30
1
126
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
EVENT#
RESET#
VREF_D Q
VREF_C A
VSS1 6
VSS1 7
VSS1 8
VSS1 9
VSS2 0
VSS2 1
VSS2 2
VSS2 3
VSS2 4
VSS2 5
VSS2 6
VSS2 7
VSS2 8
VSS2 9
VSS3 0
VSS3 1
VSS3 2
VSS3 3
VSS3 4
VSS3 5
VSS3 6
VSS3 7
VSS3 8
VSS3 9
VSS4 0
VSS4 1
VSS4 2
VSS4 3
VSS4 4
VSS4 5
VSS4 6
VSS4 7
VSS4 8
VSS4 9
VSS5 0
VSS5 1
VSS5 2
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VTT1
VSS10
VTT2
VSS11
VSS12
G1
VSS13
G2
VSS14
VSS15
D DR 3_SODIMM2_204P
44
48
49
54
55
60
61
65
66
71
72
12 7
12 8
13 3
13 4
13 8
13 9
14 4
14 5
15 0
15 1
15 5
15 6
16 1
16 2
16 7
16 8
17 2
17 3
17 8
17 9
18 4
18 5
18 9
19 0
19 5
19 6
M_D ATA_C [6 3:0] 2
M_ CB_ EC C_C [7 :0]
M_DQS_C_D P[7: 0]
M_D QS_C _D P[ 7: 0] 2
M_DQS_C_D N[ 7:0 ]
M_D QS_C _D N[7:0] 2
M_MAA_C[ 15:0]
M_MAA_C [15: 0] 3
M_SBS_ C[2:0]
M_SBS_C[ 2: 0] 3
M_SC KE_C[ 1: 0]
M_SCKE_C [1:0]
M_ODT_C[ 1: 0]
M_OD T_C [1:0] 3
CK_M_C H2_0_DP
CK_M_C H2_0_DN
C K_ M_CH2_0_DP 3
C K_ M_CH2_0_DN 3
CK_M_C H2_1_DP
CK_M_C H2_1_DN
C K_ M_CH2_1_DP 3
C K_ M_CH2_1_DN 3
M_RAS_C_N
M_CAS_C_N
M_WE_C _N
M_RAS_C _N 3
M_CAS_C _N 3
M_WE_C_N 3
M_SC S_C_N0
M_SC S_C_N1
M_SCS_C _N 0 3
M_SCS_C _N 1 3
DD R2_DRAMRST
PM_EXTTS_DD R#
D DR2_DR AMRST 3
PM_EXTTS_DDR # 7, 8
SCLK
SDATA
SCL K 7,8 ,1 2,16, 18,19 ,3 2
SDATA 7, 8, 12, 16,18,1 9, 32
3
0.75V
20 3
20 4
GND 1
GND 2
Layout note:
SO-DIMM_2 is placed farther from
the CPU than SO-DIMM_1
1.5V
R293
1K_ 1%_04
1 5m ils t rac e
3 4m ils s pac in g
Fr om po we r 0 .7 5V
0.75V
DI MM_CA_VR EF_C
R292
C 502
1K_ 1%_04
C59
C81
4. 7U _6. 3V_06
4. 7U_ 6. 3V_06
C 60
C8 5
. 1U _10V_X7R_04
.1U_ 10V_X7R_04
.1U _10V_X7R_ 04
CLOSE TO SO-DIMM_2
7, 8,40 0. 75 V
4, 5,7,8,40,43 1. 5V
7,8,12,13, 15. .3 0, 32, 39,41,43 3VS
1. 5V
+
C10 7
100U_6. 3V_B
C 76
C 78
C79
10U _10V_08 10U_ 10V_08 1 0u_10V_ 08
B - 10 DDR3 Channel C SO-DIMM_2
C56
C 55
C74
C58
C 87
.1U_ 10V_X7R _04
. 1U_10V_X7 R_04
1U_6.3V_04
.1U _10V_X7R _04
.1 U_10V_X7R _0 4
C57
. 01U _16V_X7R_04
Schematic Diagrams
X58 QPI Interface
U 18- 1
TYL ER SBURG
R EV=1 .6
QPI BUS Exter nal Connection
CSI0_ DRX_ DN[1 9:0 ]
4
CSI0_ DRX_ DP[19: 0]
4
CSI0_ DTX_ DN[ 19:0 ]
4
CSI0_ DTX_ DP[19 :0]
4
4
CSI0_ CLKRX_ DN
CSI0_ CLKRX_ DP
4
4
CSI0_ CLKTX_ DN
CSI0_ CLKTX_ DP
19
19
CSI0 _DRX_ DN[ 19:0 ]
CSI0 _DRX_ DP[19 :0]
CSI0 _DTX_DN[ 19: 0]
CSI0 _DTX_DP[19 :0]
CSI 0_C LKRX_D N
CSI 0_C LKRX_D P
CSI 0_C LKTX_D N
CSI 0_C LKTX_D P
CK_ 133 M_IO H_DN
CK_ 133 M_IO H_DP
CK_13 3M_I OH_D N
CK_13 3M_I OH_D P
Form I CH10
16
16
ICH_ GP1 2
ICH_ GP8
IC H_GP12
IC H_GP8
16, 28, 32, 43
SUSB#
SU SB#
1.1 VS
1 .1VS
AC 1
AB1
CSI0_ DRX_ DN0
CSI0_ DRX_ DN1
CSI0_ DRX_ DN2
CSI0_ DRX_ DN3
CSI0_ DRX_ DN4
CSI0_ DRX_ DN5
CSI0_ DRX_ DN6
CSI0_ DRX_ DN7
CSI0_ DRX_ DN8
CSI0_ DRX_ DN9
CSI0_ DRX_ DN10
CSI0_ DRX_ DN11
CSI0_ DRX_ DN12
CSI0_ DRX_ DN13
CSI0_ DRX_ DN14
CSI0_ DRX_ DN15
CSI0_ DRX_ DN16
CSI0_ DRX_ DN17
CSI0_ DRX_ DN18
CSI0_ DRX_ DN19
AG 6
AG 5
AJ 4
AG 3
AJ 1
AH 2
AF4
AF1
AE2
AD 3
AA2
Y1
W2
Y3
W4
W5
W8
W7
Y6
AA5
CSI0_ DRX_ DP0
CSI0_ DRX_ DP1
CSI0_ DRX_ DP2
CSI0_ DRX_ DP3
CSI0_ DRX_ DP4
CSI0_ DRX_ DP5
CSI0_ DRX_ DP6
CSI0_ DRX_ DP7
CSI0_ DRX_ DP8
CSI0_ DRX_ DP9
CSI0_ DRX_ DP10
CSI0_ DRX_ DP11
CSI0_ DRX_ DP12
CSI0_ DRX_ DP13
CSI0_ DRX_ DP14
CSI0_ DRX_ DP15
CSI0_ DRX_ DP16
CSI0_ DRX_ DP17
CSI0_ DRX_ DP18
CSI0_ DRX_ DP19
AF6
AH 5
AH 4
AF3
AH 1
AG 2
AE4
AE1
AD 2
AC 3
AB2
W1
V2
AA3
Y4
V6
V8
Y7
AA6
AB5
CK_13 3M_I OH_D N AC 7
CK_13 3M_I OH_D P AB7
R94
*1K_04
R310
*1 K_ 04
VRM_ EN _TBG
AD 5
V_1P1_ CSIPLL
CSI_FREQ_ 0
CSI_FREQ_ 1
CSISBLC_SEL
R93
10 0_04
R327
100_ 04
1: CSI PLL USES ON DIE VR
0: inter nal
Note :Che cklist CSISBL C_SEL :
100 Ohm r es to GND
VRM_EN_TBG
Y2 9
CSISBLC_SEL
AJ3 5
CSI0_ RCOMP
Y9
AA9
R53
21 _1%_04
Z100 1
R80
100_ 04
I CH_G P1 2
Two GPIO of I CH10 Co nto rl The QPI FR EQ
1 6,2 8,32 ,43
SUSB#
Z100 3B
R 100
1 0K_04
R 105
Z1004 B
1 0K_04
SUSB#
IC H_GP12
IC H_GP8
AG3 5
AA3 0
IC H_GP8
AA2 9
AF7
AD 8
AC 9
AE7
AE8
AD 9
Q PI 0TNC LK_0
Q PI 0TPCLK_ 0
QPI 0RNCL K_ 0
QPI0RPCL K_ 0
Q PI 0TND AT_0
Q PI 0TND AT_1
Q PI 0TND AT_2
Q PI 0TND AT_3
Q PI 0TND AT_4
Q PI 0TND AT_5
Q PI 0TND AT_6
Q PI 0TND AT_7
Q PI 0TND AT_8
Q PI 0TND AT_9
Q PI 0TND AT_10
Q PI 0TND AT_11
Q PI 0TND AT_12
Q PI 0TND AT_13
Q PI 0TND AT_14
Q PI 0TND AT_15
Q PI 0TND AT_16
Q PI 0TND AT_17
Q PI 0TND AT_18
Q PI 0TND AT_19
QPI 0RNDAT_ 0
QPI 0RNDAT_ 1
QPI 0RNDAT_ 2
QPI 0RNDAT_ 3
QPI 0RNDAT_ 4
QPI 0RNDAT_ 5
QPI 0RNDAT_ 6
QPI 0RNDAT_ 7
QPI 0RNDAT_ 8
QPI 0RNDAT_ 9
QPI0 RNDAT_1 0
QPI0 RNDAT_1 1
QPI0 RNDAT_1 2
QPI0 RNDAT_1 3
QPI0 RNDAT_1 4
QPI0 RNDAT_1 5
QPI0 RNDAT_1 6
QPI0 RNDAT_1 7
QPI0 RNDAT_1 8
QPI0 RNDAT_1 9
Q PI 0TPDAT_ 0
Q PI 0TPDAT_ 1
Q PI 0TPDAT_ 2
Q PI 0TPDAT_ 3
Q PI 0TPDAT_ 4
Q PI 0TPDAT_ 5
Q PI 0TPDAT_ 6
Q PI 0TPDAT_ 7
Q PI 0TPDAT_ 8
Q PI 0TPDAT_ 9
Q PI 0TPDAT_ 10
Q PI 0TPDAT_ 11
Q PI 0TPDAT_ 12
Q PI 0TPDAT_ 13
Q PI 0TPDAT_ 14
Q PI 0TPDAT_ 15
Q PI 0TPDAT_ 16
Q PI 0TPDAT_ 17
Q PI 0TPDAT_ 18
Q PI 0TPDAT_ 19
QPI0RPDAT_ 0
QPI0RPDAT_ 1
QPI0RPDAT_ 2
QPI0RPDAT_ 3
QPI0RPDAT_ 4
QPI0RPDAT_ 5
QPI0RPDAT_ 6
QPI0RPDAT_ 7
QPI0RPDAT_ 8
QPI0RPDAT_ 9
Q PI 0RPDAT_1 0
Q PI 0RPDAT_1 1
Q PI 0RPDAT_1 2
Q PI 0RPDAT_1 3
Q PI 0RPDAT_1 4
Q PI 0RPDAT_1 5
Q PI 0RPDAT_1 6
Q PI 0RPDAT_1 7
Q PI 0RPDAT_1 8
Q PI 0RPDAT_1 9
Q PI 0REFCLKN
Q PI 0REFCLKP
VCC AQ PI 0RXBG_ 1
VCC AQ PI 0TXBG_ 2
VCC AQPI 0PLL_1
QPI0 VR MVR EF0_ 1
QPI0 VR MVR EF1_ 1
QPI0 VR MVR EF2_ 1
QPI0 VR MVR EF3_ 1
QPI0 VR MVR EF4_ 1
Q PI FR EQ SEL0
Q PI FR EQ SEL1
VRMEN
RSVD
RSVD
RSVD
RSVD
Q PI SBLC SEL
Q PI 0IC OMP
Q PI 0RCO MP
RSVD
RSVD
RSVD
RSVD
TESTL O14
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
RSVD
RSVD
16
CSI0 _CLKTX_DN
CSI0 _CLKTX_DP
K8
J7
H6
G5
J4
G4
G1
H2
J3
K1
N1
L3
N2
T1
P3
R4
T5
P5
R7
P6
CSI0 _DTX_DN0
CSI0 _DTX_DN1
CSI0 _DTX_DN2
CSI0 _DTX_DN3
CSI0 _DTX_DN4
CSI0 _DTX_DN5
CSI0 _DTX_DN6
CSI0 _DTX_DN7
CSI0 _DTX_DN8
CSI0 _DTX_DN9
CSI0 _DTX_DN1 0
CSI0 _DTX_DN1 1
CSI0 _DTX_DN1 2
CSI0 _DTX_DN1 3
CSI0 _DTX_DN1 4
CSI0 _DTX_DN1 5
CSI0 _DTX_DN1 6
CSI0 _DTX_DN1 7
CSI0 _DTX_DN1 8
CSI0 _DTX_DN1 9
L8
K7
J6
H5
K4
F4
F1
G2
H3
J1
M1
M3
P2
R1
R3
T4
U5
N5
T7
R6
CSI0 _DTX_DP0
CSI0 _DTX_DP1
CSI0 _DTX_DP2
CSI0 _DTX_DP3
CSI0 _DTX_DP4
CSI0 _DTX_DP5
CSI0 _DTX_DP6
CSI0 _DTX_DP7
CSI0 _DTX_DP8
CSI0 _DTX_DP9
CSI0 _DTX_DP10
CSI0 _DTX_DP11
CSI0 _DTX_DP12
CSI0 _DTX_DP13
CSI0 _DTX_DP14
CSI0 _DTX_DP15
CSI0 _DTX_DP16
CSI0 _DTX_DP17
CSI0 _DTX_DP18
CSI0 _DTX_DP19
D1
U2
L 10
M11
T2
U3
AB10
A11
A12
D11
D12
F7
E7
D5
C7
A5
B6
D8
A8
B9
C10
B13
A14
B15
C14
D15
E15
H15
G15
F14
E13
F8
E6
D6
C8
A6
B7
D9
A9
B10
C11
B12
A15
B16
C13
D14
F16
H16
G14
F13
E12
V_ 1P1_CSI BG _RX
V_ 1P1_CSI BG _TX
G11
G12
V_1P1_ CSIBG_PN1
R28 3
*100 K_ 04
*.1U _10 V_ X7R_ 04
*.1U_ 10V_X7R_0 4
L2
K2
AC4
AB4
AA8
AB8
N7
M7
C 483
C485
V_ 1P1_CSI
J14
J13
VSS
VCCAQPI 0_2
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VCCAQPI 0_2
VCCAQPI 0_2
VCCAQPI 0_2
VCCAQPI 0_2
VCCAQPI 0_2
VCCAQPI 0_2
VCCAQPI 0_2
VCCAQPI 0_2
VCCAQPI 0_2
VCCAQPI 0_2
VCCAQPI 0_2
VCCAQPI 0_2
VCCAQPI 0_2
VCCAQPI 0_2
VCCAQPI 0_2
VCCAQPI 0_2
VCCAQPI 0_2
VCCAQPI 0_2
VCCAQPI 0_2
VCCAQPI 0_2
RSVD
RSVD
VCCAQPI0R XBG_2
VCCAQPI0R XBG_2
RSVD
RSVD
Q PI 0VRMVREF0_2
Q PI 0VRMVREF1_2
Q PI 0VRMVREF2_2
Q PI 0VRMVREF3_2
Q PI 0VRMVREF4_2
E10
VCCAQPI0 PL L_2
C10 9
.1 U_10 V_ X7R_ 04
G9
H10
J11
G8
H9
J10
V_ 1P1_CSI
U1 8-2
TYLERSBURG
R EV=1 .6
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
E23
E24
B23
B24
H24
G25
F26
E27
D25
D27
A27
B26
C25
A24
A21
C23
B21
A18
C20
D19
E18
E20
G19
F20
H23
G24
F25
E26
D24
D28
A28
B27
C26
A25
A22
C22
B20
A19
C19
D18
E17
E21
G18
F19
C1 08
10 U_6. 3V_X5 R_08
Sheet 10 of 47
X58 QPI Interface
A30
B17
J23
H26
B18
C17
K11
V_ 1P1_C SI BG _PN1
H13
H12
G21
G22
H21
J21
2 OF 13
M9
L9
1 OF 13
16
C
Q7
E
2N 3904
VC CA_1. 1VS
C
Q8
E2N3 904
Z1 002
1 .1VS
L62
*HCB100 5KF- 121 T20
L12
HCB16 08KF-12 1T25 _06
V_1P1 _CSIBG_R X
CSI_FREQ_1
V_1P1_ CSIBG_PN1
V_ 1P1_CSI
L6 0
H CB1 005 KF-1 21T20_0 4
1 0mA
R98
R1 06
1.2 K_ 1%_04
1. 2K_1%_0 4
CSI _FREQ_0
L5
K5
VCCA_1. 1VS
L9
H CB1 005 KF-1 21T20_0 4
1 0mA
V_1P1_ CSIBG_TX
R99
1K_04
GP8
0
GP12
0
0
1
1
0
R1 01
1K_0 4
C454
C10 2
1U_ 6.3 V_ 04
1U_6 .3V_0 4
QPI Fr equen cy Mo de
4.80 GT/s
5.90 GT/s
6.40 GT/s
De fault
VC CA_ 1.1 VS
L6
11 ,13 ,43 VCCA_1 .1VS
11 ..1 3,1 7,1 9,4 1,43 1 .1VS
HCB10 05KF-12 1T2 0_04
V_1P1_C SI PLL
C95
C69
1U_ 6.3 V_ 04
10U _6. 3V_X5R _08
X58 QPI Interface B - 11
B.Schematic Diagrams
4
CSI0_ CLKRX_ DN
CSI0_ CLKRX_ DP
Schematic Diagrams
X58 PCIEX16, PCIEX4, DMI
U18-3
TY LERSBU RG
REV =1 .6
RX
PCIEX16_1
20 PEG_TXN [15: 0]
PEG_TXN[15: 0]
20 PEG_TXP[ 15:0]
PEG_TXP[ 15:0]
N
B.Schematic Diagrams
P
19 CK_PE_100M_I OH0_D N
CK_PE_100M_I OH0_D N
19 CK_PE_100M_I OH0_D P
CK_PE_100M_I OH0_D P
19 C K_PE_100M_I OH 1_D N
CK_PE_100M_I OH1_D N
19 C K_PE_100M_I OH 1_D P
CK_PE_100M_I OH1_D P
N
P
20 PEG_RXN [15: 0]
PEG_RXN[15: 0]
20 PEG_RXP[ 15:0]
PEG_RXP[ 15:0]
N
Sheet 11 of 47
X58 PCIEX16,
PCIEX4, DMI
PCIEX16_2 D900B none using now
P
EX P_ B_T X_ DN [15 :0 ]
EX P_ B_T X_ DP [15 :0 ]
N
CK _P E_1 00 M_ IOH 1_ DN
CK _P E_1 00 M_ IOH 1_ DP
P
EX P_ B_R X_ DN [15 :0 ]
EX P_ B_R X_ DP [15 :0 ]
1. 1VS
AH24
AJ23
AL23
AK24
AH23
AK23
AL24
AK25
PE7R N_0
PE7R N_1
PE7R N_2
PE7R N_3
PE7R P_0
PE7R P_1
PE7R P_2
PE7R P_3
PE7TN_0
PE7TN_1
PE7TN_2
PE7TN_3
PE7TP_0
PE7TP_1
PE7TP_2
PE7TP_3
AR28
AN27
AP25
AP23
AP28
AP27
AN25
AR23
PEG _TXN0
PEG _TXN1
PEG _TXN2
PEG _TXN3
PEG _TXP0
PEG _TXP1
PEG _TXP2
PEG _TXP3
PEG_RXN 4
PEG_RXN 5
PEG_RXN 6
PEG_RXN 7
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
AM26
AJ26
AL27
AH25
AL26
AJ27
AL28
AJ25
PE8R N_0
PE8R N_1
PE8R N_2
PE8R N_3
PE8R P_0
PE8R P_1
PE8R P_2
PE8R P_3
PE8TN_0
PE8TN_1
PE8TN_2
PE8TN_3
PE8TP_0
PE8TP_1
PE8TP_2
PE8TP_3
AN23
AR25
AR26
AT27
AN24
AR24
AP26
AT26
PEG _TXN4
PEG _TXN5
PEG _TXN6
PEG _TXN7
PEG _TXP4
PEG _TXP5
PEG _TXP6
PEG _TXP7
PEG_RXN 8
PEG_RXN 9
PEG_RXN 10
PEG_RXN 11
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
AL29
AK30
AL31
AK28
AK29
AK31
AL32
AJ28
PE9R N_0
PE9R N_1
PE9R N_2
PE9R N_3
PE9R P_0
PE9R P_1
PE9R P_2
PE9R P_3
PE9TN_0
PE9TN_1
PE9TN_2
PE9TN_3
PE9TP_0
PE9TP_1
PE9TP_2
PE9TP_3
AN29
AT29
AR30
AN30
AN28
AT28
AR29
AP30
PEG _TXN8
PEG _TXN9
PEG _TXN10
PEG _TXN11
PEG _TXP8
PEG _TXP9
PEG _TXP10
PEG _TXP11
PEG_RXN 12
PEG_RXN 13
PEG_RXN 14
PEG_RXN 15
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15
AK33
AL34
AK32
AH30
AL33
AM34
AJ32
AJ30
PE10TN_0
PE10TN_1
PE10TN_2
PE10TN_3
PE10TP_0
PE10TP_1
PE10TP_2
PE10TP_3
AT32
AR31
AP33
AN32
AT31
AP31
AR33
AP32
PEG _TXN12
PEG _TXN13
PEG _TXN14
PEG _TXN15
PEG _TXP12
PEG _TXP13
PEG _TXP14
PEG _TXP15
CK_PE_100M_I OH0_D N
CK_PE_100M_I OH0_D P
AG29
AF29
R308
100_1%_04 PE0_CO MP
D0 3
PE0_RBIAS
AP35
AN35
AN36
AN34
PE10RN _0
PE10RN _1
PE10RN _2
PE10RN _3
PE10RP_0
PE10RP_1
PE10RP_2
PE10RP_3
VCCD PE1PLL
VCC APE1PLL
VCCAPE1BG
PE1C LKN
PE1C LKP
U 18-4
TYLER SBURG
R EV= 1. 6
TX
PEG_RXN 0
PEG_RXN 1
PEG_RXN 2
PEG_RXN 3
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
N
P
N
P
N
P
N
P
AT22
AT20
AT19
V_1P1_PEPLLD
V_1P1_PEPLLA
V_1P5_PEBG0
PE1R CO MPO
PE1I COMPI
PE1I COMPO
1. 1VS
EXP_B_R X_D N15
EXP_B_R X_D N14
EXP_B_R X_D N13
EXP_B_R X_D N12
EXP_B_R X_D P15
EXP_B_R X_D P14
EXP_B_R X_D P13
EXP_B_R X_D P12
AJ6
AL4
AL5
AK7
AK6
AL3
AK5
AL7
PE3RN _0
PE3RN _1
PE3RN _2
PE3RN _3
PE3RP_0
PE3RP_1
PE3RP_2
PE3RP_3
PE3TN_0
PE3TN_1
PE3TN_2
PE3TN_3
PE3TP_0
PE3TP_1
PE3TP_2
PE3TP_3
AN4
AR4
AP6
AT5
AN5
AP4
AN6
AT4
EXP_B_TX_D N15
EXP_B_TX_D N14
EXP_B_TX_D N13
EXP_B_TX_D N12
EXP_B_TX_D P15
EXP_B_TX_D P14
EXP_B_TX_D P13
EXP_B_TX_D P12
EXP_B_R X_D N11
EXP_B_R X_D N10
EXP_B_R X_D N9
EXP_B_R X_D N8
EXP_B_R X_D P11
EXP_B_R X_D P10
EXP_B_R X_D P9
EXP_B_R X_D P8
AJ7
AM7
AL8
AJ9
AJ8
AM8
AL9
AK9
PE4RN _0
PE4RN _1
PE4RN _2
PE4RN _3
PE4RP_0
PE4RP_1
PE4RP_2
PE4RP_3
PE4TN_0
PE4TN_1
PE4TN_2
PE4TN_3
PE4TP_0
PE4TP_1
PE4TP_2
PE4TP_3
AR5
AR7
AP7
AT9
AR6
AT7
AP8
AT8
EXP_B_TX_D N11
EXP_B_TX_D N10
EXP_B_TX_D N9
EXP_B_TX_D N8
EXP_B_TX_D P11
EXP_B_TX_D P10
EXP_B_TX_D P9
EXP_B_TX_D P8
EXP_B_R X_D N7
EXP_B_R X_D N6
EXP_B_R X_D N5
EXP_B_R X_D N4
EXP_B_R X_D P7
EXP_B_R X_D P6
EXP_B_R X_D P5
EXP_B_R X_D P4
AK10
AK11
AM13
AL13
AL10
AJ 11
AM12
AL14
PE5RN _0
PE5RN _1
PE5RN _2
PE5RN _3
PE5RP_0
PE5RP_1
PE5RP_2
PE5RP_3
PE5TN_0
PE5TN_1
PE5TN_2
PE5TN_3
PE5TP_0
PE5TP_1
PE5TP_2
PE5TP_3
AR9
AT10
AP11
AP13
AP9
AR10
AR11
AP12
EXP_B_TX_D N7
EXP_B_TX_D N6
EXP_B_TX_D N5
EXP_B_TX_D N4
EXP_B_TX_D P7
EXP_B_TX_D P6
EXP_B_TX_D P5
EXP_B_TX_D P4
EXP_B_R X_D N3
EXP_B_R X_D N2
EXP_B_R X_D N1
EXP_B_R X_D N0
EXP_B_R X_D P3
EXP_B_R X_D P2
EXP_B_R X_D P1
EXP_B_R X_D P0
AK12
AL15
AJ 14
AJ 12
AL12
AK15
AK14
AJ 13
PE6RN _0
PE6RN _1
PE6RN _2
PE6RN _3
PE6RP_0
PE6RP_1
PE6RP_2
PE6RP_3
PE6TN_0
PE6TN_1
PE6TN_2
PE6TN_3
PE6TP_0
PE6TP_1
PE6TP_2
PE6TP_3
AN15
AT15
AR14
AM16
AN14
AT14
AP14
AM15
EXP_B_TX_D N3
EXP_B_TX_D N2
EXP_B_TX_D N1
EXP_B_TX_D N0
EXP_B_TX_D P3
EXP_B_TX_D P2
EXP_B_TX_D P1
EXP_B_TX_D P0
C K_PE_100M_I OH 1_D N
C K_PE_100M_I OH 1_D P
AN 10
AN 11
PE0CLKN
PE0CLKP
AM1
AP3
AL1
VC CD PEPLL
VCC APEPLL
VC CAPEBG
R 268
100_1%_04 PE1_C OMP
D 03
PE1R BIAS
PE1_RBI ASAN 13
3 OF 1 3
R307
750_1%_04
AP2
AN1
AN2
V_1P1_PEPLLD
V_1P1_PEPLLA
V_1P5_PEBG1
PE0RC OMPO
PE0IC OMP1
PE0IC OMPO
PE0RBI AS
R278
750_1%_04
4 O F 13
PCIEX4 D900B none using now
EX P_ C_T X_ DN [3: 0]
EX P_ C_T X_ DP [3: 0]
L13
HC B1005KF-121T20_04
2m A
1. 5VS
V_1P5_PEBG0
U18-5
TYLER SBURG
R EV= 1. 6
EX P_ C_R X_ DN [3: 0]
EX P_ C_R X_ DP [3: 0]
DMI
15
DMI _TXN[ 3: 0]
DMI_TXN[3:0]
15
DMI _TXP[3:0]
DMI_TXP[3: 0]
15
DMI _R XN[ 3: 0]
DMI_RXN[3:0]
15
DMI _R XP[3:0]
DMI_RXP[ 3: 0]
1.1VS
EXP_C_RX_DN 3
EXP_C_RX_DN 2
EXP_C_RX_DP3
EXP_C_RX_DP2
AJ 16
AJ 18
AK16
AJ 17
PE1RN _0
PE1RN _1
PE1RP_0
PE1RP_1
EXP_C_RX_DN 1
EXP_C_RX_DN 0
EXP_C_RX_DP1
EXP_C_RX_DP0
AL17
AM17
AK17
AM18
D MI_RXN0
D MI_RXN1
D MI_RXN2
D MI_RXN3
D MI_RXP0
D MI_RXP1
D MI_RXP2
D MI_RXP3
AL18
AL20
AK21
AJ 19
AL19
AK20
AJ 21
AK19
R 326 *1K_04
Z1101
AK35
PE1TN_0
PE1TN_1
PE1TP_0
PE1TP_1
AP16
AR16
AN16
AR15
EXP_C _TX_DN3
EXP_C _TX_DN2
EXP_C _TX_DP3
EXP_C _TX_DP2
PE2RN _0
PE2RN _1
PE2RP_0
PE2RP_1
PE2TN_0
PE2TN_1
PE2TP_0
PE2TP_1
AP18
AR17
AP17
AT17
EXP_C _TX_DN1
EXP_C _TX_DN0
EXP_C _TX_DP1
EXP_C _TX_DP0
D MI RN _0
D MI RN _1
D MI RN _2
D MI RN _3
D MI RP_0
D MI RP_1
D MI RP_2
D MI RP_3
D MITN_0
D MITN_1
D MITN_2
D MITN_3
DMI TP_0
DMI TP_1
DMI TP_2
DMI TP_3
AR19
AN20
AR20
AN21
AP19
AN19
AR21
AM21
DMITXN0
DMITXN1
DMITXN2
DMITXN3
DMITXP0
DMITXP1
DMITXP2
DMITXP3
AH31
AG30
AM30
AM29
AH26
AG27
AG26
AH28
Z1110
Z1111
Z1112
Z1113
Z1114
Z1115
Z1116
Z1117
PESBLCSEL
R 325 100_04
Z1102
Z1103
Z1104
Z1105
Z1106
Z1107
Z1108
Z1109
AG8
AG9
AT12
AT13
AF10
AE10
AF9
AD 10
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
C486
C491
C496
C498
C484
C488
C497
C499
C131
C128
1U _6. 3V_04
10U_6.3V_X5R_08
L4
HC B1005KF-121T20_04
2m A
V_1P5_PEBG1
. 1U _10V_X7R _04
. 1U _10V_X7R _04
. 1U _10V_X7R _04
. 1U _10V_X7R _04
. 1U _10V_X7R _04
. 1U _10V_X7R _04
. 1U _10V_X7R _04
. 1U _10V_X7R _04
DMI_TXN 0
DMI_TXN 1
DMI_TXN 2
DMI_TXN 3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
C100
C72
1U _6. 3V_04
10U_6.3V_X5R_08
L59
*HC B1005KF-121T20_04
75 mA
VC CA_1.1VS
V_1P1_PEPLLA
C455
C453
1U _6. 3V_04
10U_6.3V_X5R_08
11/4
L63
*HC B1005KF- 121T20_04
75 mA
V_1P1_PEPLLD
C500
C501
1U _6. 3V_04
10U_6.3V_X5R_08
5 OF 13
10, 13, 43 VCCA_1. 1VS
13,15,17, 29, 32,41, 43 1.5VS
10,12,13, 17, 19,41, 43 1.1VS
B - 12 X58 PCIEX16, PCIEX4, DMI
Schematic Diagrams
X58 Misc
U18 -6
TYLERSBURG
RE V=1.6
F36
G36
J30
F35
H32
H31
E35
J29
G31
F33
G30
H29
J35
J32
J36
R7 1
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
*10mil_short
CK_133M_CL_DNG34
CK_133M_CL_DPG33
*10mil_short
Z1213 L29
Z1214 M29
Z1215 L28
Z1216 K28
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
DDRPLLREFCL KN
DDRPLLREFCL KP
3 VS
K34
K33
F32
F29
H28
1.1 VS
M27
K30
J 33
K36
K31
F30
M35
M33
N31
N30
E32
E34
2. 7K_ 04 TP_TBG_THERMALERT_N
R334
2. 7K_ 04 TP_TBG_THERMTRIP_ N
R79
R78
R77
R76
51 _1%_04 IOH_JTAG_TMS
51 _1%_04 IOH_XDP_PRESENT_GTL
51 _1%_04 IOH_JTAG_TDO
51 _1%_04 IOH_JTAG_TDI
R309
R330
1K_04
10 K_04
EXT_ TBG_AK3 6
Z1 218
R642
R643
R644
R645
*1K_04
*1K_04
*1K_04
*1K_04
SPARE4_TBG
TP_BICLK_TBG
TP_ISHIFT_TBG
TP_HVM_MODE_TBG
R64
R65
51 _1%_04 IOH_JTAG_TRST_N
51 _1%_04 IOH_JTAG_TCK
1
RN11 2
8P4RX1 0K_043
4
L 34
L 31
L 35
L 32
H34
H35
D03 3/2
RSVD_D
RSVD_D
RSVD_D
RSVD_D
U18- 7
TYLERSBURG
RE V=1.6
R333
15
15
15
15
15
15
16
R5 79
R5 80
R5 81
1 5,29 CL _N_CLK
1 5,29 CL _N_DATA
1 5,29 CL _RST
15
R646
R647
R648
R649
1K_04
1K_04
1K_04
1K_04
SPARE4_TBG
TP_BICLK_TBG
TP_ISHIFT_TBG
TP_HVM_MODE_TBG
R67
R63
R70
10 0_04
1K_04
0_ 04
TBG_BMCINIT
TP_PLLBYP_TBG
TBG_I TEST
R60
1 K_04
R68
R59
1 K_04
1 K_04
R582
R583
6 OF 13
TBG_ITEST
AF34
TBG_ISAFE
AJ 34
I OH_ ITPMEN
R29
Z1201
B34
ISCAN_MODE_TBG W27
TP_ ISHI FT_TBG
AE34
TP_ EDM_TBG
V32
DISPULTSO_TBG
AF32
Z1217
Y28
TP_ BICLK_TBG
AC32
TP_ HVM_MODE_TBGAF35
TP_ PLLBYP_ TBG
AB30
IOH_XDP_PRESENT_ GTL
IOH_DFX_1
IOH_DFX_2
IOH_DFX_3
CL_CLK
CL_DATA
1K_04
1K_04
U34
T34
U32
T36
I OH_ CLPWRDET C35
C32
PLLDET_3V
AC28
H_PWRGD_IOH D34
PLTRST_DLY#
D33
AL2
IOH_CLPWROK
N36
VCCADDRPLL
*0 _04 CL _CLK
*0 _04 CL _DATA
*0 _04 CL _RST_ N
CL_VREF_I OH
4,1 8 H_CPURST#
TBG_RSVD_ E29
TBG_RSVD_ B32
TBG_RSVD_ A31
TBG_RSVD_ G28
8
7
6
5
AC31
AL 36
AE30
AB31
AD32
AG32
AE27
H_A20M#
H_FERR#
H_I NIT#
H_I NTR
H_NMI
H_SMI#
I CH_ SYNC#
U28
T27
U29
T31
PLTRST_DLY#
R584
30.1 K_04 CL_RST_N
R585
15K_04
TPEV_ERR_0_ TBG AD27
TPEV_ERR_1_ TBG AF28
TPEV_ERR_2_ TBG AE28
NODEID_ 2_TBG
NODEID_ 3_TBG
NODEID_ 4_TBG
5VS
PWROKI CH R300
*0_04 PLLDET_3V
1.1VS
R95
R332
R5 6
SCLK
SDATA
R5 7
R3 31
*1 K_04
R103
8.2K_04
7.. 9,16, 18,19, 32 SCLK
7 ..9,1 6,18, 19,32 SDATA
*1U_10V_06
3 VS
R313
1K_1%_0 4
3VS
PLLDET_3V
CL_VREF_ IOH
R102
100K_04
R89
*10 K_04
C519
Ch ange t o 0.3 5V
R314
475_ 1%_04
C
Q11
2N3 904
E
Z122 4B
.1U_10 V_X7 R_ 04
6 H_ THERMDA
6 H_ THERMDC
C
Q10
E
2N3904
10K_0 4Z1225
B
AB28
AD30
AB27
AD29
AE31
2.49K_1%_04 Z1219
1K_ 04
1K_ 04
1K_ 04
1K_ 04
Z1202
Z1203
H_ THERMDA
H_ THERMDC
TP_ TBG_THERMAL ERT_N
TP_ TBG_THERMTRIP_N
AJ3
AR12
AN9
AN8
AM6
AM3
AM5
AM2
AK3
AD26
AC26
R2 69
R5 06
R5 07
R5 08
R5 09
Vref Voltage: 0.33V
R90
1K_04
*1 0K_0 4
*1 0K_0 4
*0 _04
*0 _04
Z1218
3VS
C177
ICH_ VRM_PWRGD
R88
AH34
AG33
AH33
A2
A36
B1
AT1
AT36
C167
*0_04 IOH_CLPWRDET
R298
15,16 ,22.. 24 PWROKICH
1U_10V_06
PWRGD_PS R302
4,15 ,16,2 8,44 PWRGD_PS
0_04
XDPCLK1XP
XDPCLK1XN
XDPDQ_0
XDPDQ_1
XDPDQ_2
XDPDQ_3
XDPDQ_4
XDPDQ_5
XDPDQ_6
XDPDQ_7
XDPDQ_8
XDPDQ_9
XDPDQ_10
XDPDQ_11
XDPDQ_12
XDPDQ_13
XDPDQ_14
XDPDQ_15
XDPDQSN_0
XDPDQSP_0
XDPDQSN_1
XDPDQSP_1
XDPRDYACK*
XDPRDYREQ*
EXTSYSTRI G
A2 0M*
FERR*
INIT*
INTR
NMI
SMI *
LTRESET*
CL_CLK
CL_DATA
CLRST*
VREFCL
PL LPWRDET
AUXPWRGOOD
COREPLLPWRDET
COREPWRGOOD
CORERST*
RESETO*
TESTLO9
TESTLO5
TESTHI 3
VSS
TESTLO1 6
TESTLO1 1
TESTLO1 7
TESTLO1 0
TESTLO1 5
TESTLO1 2
TESTLO8
TESTLO1 3
TCK
TDI
TDO
TMS
TRST*
PEWIDTH_0
PEWIDTH_1
PEWIDTH_2
PEWIDTH_3
PEWIDTH_4
PEWIDTH_5
TESTHI1
LEGACYI OH
TESTLO19
TESTHI 2
TESTLO1 8
RSVD_D
RSVD_D
ERR_ N_0
ERR_ N_1
ERR_ N_2
TESTLO23
TESTLO24
TESTLO21
TESTLO25
SI NGL E_I OH
CL_CLK_SRC
TESTLO22
TESTLO26
TESTLO6
RSVD
TESTLO7
PEHPSCL
PEHPSDA
SMBSCL
SMBSDA
SMBUSID
RSVD
TSIREF
TESTLO1
TESTLO2
TESTLO3
TESTLO4
RSVD
RSVD
TSDA
TSDC
THERMALERT*
THERMTRIP*
RSVD
RMI ICLK
RMII CLKREFOUT
RMIICRSDV
RMII MDC
RMIIMDI O
RMII RXD[0]
RMII RXD[1]
RMII TXD[0]
RMII TXD[1]
RMII TXEN
AH36
AG36
W3 3
W3 6
V33
V36
Y34
V35
W3 4
U35
AD36
AB33
AA36
AA33
AE36
AC34
AB36
AB34
Y35
AA35
AC35
AD35
Y31
W3 1
AK36EXT_TBG_AK36
EXT_TBG_AK36 1 8
T33
V26
V30
U31
R30
I OH_JTAG_TCK
I OH_JTAG_TDI
I OH_JTAG_TDO
I OH_JTAG_TMS
I OH_JTAG_TRST_ N
R33
T30
R36
N28
T28
P28
P29
R32
R35
TBG_TESTPOINT_ 0
TBG_TESTPOINT_ 1
TBG_TESTPOINT_ 2
TBG_TESTPOINT_ 3
TBG_TESTPOINT_ 4
TBG_TESTPOINT_ 5
TBG_TESTPOINT_ 6
TBG_TESTPOINT_ 7
TBG_TESTPOINT_ 8
Sheet 12 of 47
X58 Misc
AC29SPARE0_TBG
AA26SPARE1_TBG
AD33SPARE2_TBG
AE33SPARE3_TBG
P31 SPARE4_TBG
N27 SPARE5_TBG
C33 SPARE6_TBG
D36 SPARE7_TBG
W2 8
Z120 6
AF31TBG_BMCINIT
G28 TBG_RSVD_G2 8
Z120 7
J26
A31 TBG_RSVD_A31
Z120 8
D30
Z120 9
D31
B32 TBG_RSVD_B32
E29 TBG_RSVD_E29
Z121 0
E31
Z121 1
J27
Z121 2
G27
GP56
TEST_0
TEST_1
TEST_2
TEST_3
TEST_4
7 O F 13
3VS
R510
10K_ 04
R511
B
15,16 ,20,2 8,29 PLTRST#
B
C
Q50
2N3904
E
C
Q51
2N3 904
E
16, 18 ICH_ VRM_PWRGD
R294
IOH_CLPWRDET R295
I OH_CLPWROK
0_ 04
*2.2K_04
C503
1.1VS
DESIGN NOTE:
DDR f requenc y s ele c tion : IO H_DFX[3 :2]
"00" = 133MHz input, 200MHzc or e
"01" = 100 MHz input
DESIGN NOTE: 2 X 16/1 X 4 (PCI- E):111011
1.1VS
10K_04
1.1VS
*.1U_10 V_04
GP56
1 6 GP5 6
R9 1
1 K_04 IOH_ DFX_1
R92
*0_04
*0_0 4 IOH_ DFX_2
R74
100_ 04
R3 36
*0_0 4 IOH_ DFX_3
R335
100_ 04
R3 12
*0_0 4 TBG_ISAFE
R311
1K_04
R7 5
IOH_I TPMEN
R320 2. 2K_ 04
PLLDET_3V
H_PWRGD_I OH
C520
R321
100K_04
1K_04
R61
*1K_04
TPM
Low ena ble
High
disable
1U_10V_06
3VS
R512
TP_EDM_TBG R571
SPARE3_TBG R572
1K_ 04
1K_ 04
SPARE2_TBG R574
10K_1%_04
SPARE6_TBG R575
SPARE7_TBG R576
SPARE0_TBG R577
SPARE1_TBG R578
10K_1%_04
10K_1%_04
10K_1%_04
10K_1%_04
1
TBG_TESTPOINT_ 1 2
TBG_TESTPOINT_ 7 3
TBG_TESTPOINT_ 0 4
8 RN16
7 8P4RX1K_04
6
5
1
TBG_TESTPOINT_ 3 2
TBG_TESTPOINT_ 6 3
TBG_TESTPOINT_ 4 4
8 RN17
7 8P4RX1K_04
6
5
R57 3
1K_04
SPARE5_TBG
R5 64
*1 K_04
R31 5
R31 8
R31 7
*1K_0 4 TBG_TESTPOINT_2
TBG_TESTPOINT_5
1K_04
TBG_TESTPOINT_8
1K_04
R3 16
R3 19
1K_ 04
*1 K_04
H_PWRGD_I OH
R32 8
1K_04
Z1223 B
4,1 6,18 H_ PWRGD
R33 8
10K_04Z122 6B
C
Q39
2N3 904
E
C
Q38
2N39 04
E
3V
15, 16,20, 28,29
PLTRST#
R3 03
4.99K_04
5
2
NODEID_3_ TBG R5 13
NODEID_2_ TBG R5 14
NODEID_4_ TBG R5 15
U3 5
100_ 04
100_ 04
100_ 04
4 PLTRST_DLY#
C521
1U_ 10V_0 6
1
3
7 4AHC1G08 GW
6, 13,15 ..17, 20,24, 26,29. .32, 40,41, 43 3V
1 0,11, 13,17, 19,41, 43 1. 1VS
7 ..9, 13,15. .30,3 2,39, 41,43 3VS
17,18 ,20.. 23,27, 29.. 31,43 5VS
X58 Misc B - 13
B.Schematic Diagrams
M32
P35
N34
P34
M36
N33
M30
P32
R7 3
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
RSVD_D
Schematic Diagrams
X58 PWR
3VS
1. 1VS
1.1VS
AC 12
AC 13
AC 15
AC 17
AC 19
AD 12
AD 13
AD 14
AD 15
AD 16
AD 17
AD 18
AD 19
AE12
AE13
AE14
AE15
AE16
AE17
AE18
AE19
AF12
AF13
AF15
AF17
AF19
AD 20
AD 21
AD 22
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC CAPE
VC CAPE
VC CAPE
VC CAPE
VC CAPE
VC CAPE
VC CAPE
VC CAPE
VC CAPE
VC CAPE
VC CAPE
VC CAPE
VC CAPE
VC CAPE
VC CAPE
VC CAPE
VC CAPE
VC CAPE
VC CAPE
VC CAPE
VC CAPE
VC CAPE
VC CAPE
VC CAPE
VC CAPE
VC CAPE
VC CAPE1
VC CAPE1
VC CAPE1
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
VCC APE1
VCC APE1
VCC APE1
VCC APE1
VCC APE1
VCC APE1
VCC APE1
VCC APE1
VCC APE1
VCC APE1
VCC APE1
VCC APE1
VCC APE1
AA12
AA13
AA14
AA15
N1 2
P12
P13
R1 2
R1 3
R1 4
T14
T15
U1 1
U1 2
U1 3
U1 4
U1 5
V14
V15
W11
W12
W13
W14
W15
Y1 4
Y1 5
K15
K17
K19
L13
L15
L17
L19
L20
M1 2
M1 3
M1 4
M1 5
M1 6
M1 7
M1 8
M1 9
M2 0
N1 3
N1 4
N1 5
N1 6
N1 7
N1 8
N1 9
AD23
AD24
AD25
AE20
AE21
AE22
AE23
AE24
AE25
AF20
AF21
AF22
AF23
3V
AB2 4
AB2 5
*HC B16 08KF- 12 1T25_06
L14
K2 0
K2 1
L15
M2 1
HC B1608KF- 121T25_ 06
L2 5
V_1P8_ CL
M2 3
M2 4
M2 6
N2 4
N2 5
P2 3
P2 5
P2 6
R2 4
V_0P9_CL
T2 5
U2 6
U2 5
V_1P8_PLL
V_0P9_CL
K2 2
K2 3
L2 2
N2 2
P2 1
R2 2
R2 6
T2 1
T2 3
T2 4
V2 9
R2 7
V_1P1_CL
V_1P1_CL
V_1P1_CL
AK2
1. 5VS
1
AA16
AA18
AA24
AB15
AB17
AB19
P15
P17
P19
R 16
R 18
R 20
T17
T19
U 16
U 18
U 20
U 22
V17
V19
V21
V23
V24
W 16
W 18
W 20
W 22
W 24
Y 17
Y 19
Y 21
Y 23
Y 25
Y 26
AA20
AA22
AB21
AB23
AC 20
AC 22
3VS
VCC MI SC3 3
VCC MI SC3 3
11/ 7
L10
*HC B1005KF- 12 1T20
VC CQ PI0VRMR XO P0_1
VC CQ PI0VRMR XO P1_1
VC CQ PI0VRMR XO P2_1
VC CQ PI0VRMR XO P3_1
VC CQ PI0 VRMTXO P0_1
VC CQ PI0VRMR XO P0_2
VC CQ PI0VRMR XO P1_2
VC CQ PI0VRMR XO P2_2
VC CQ PI0VRMR XO P3_2
VC CQ PI0 VRMTXO P0_2
VCC MI SC3 3_CL
VCC MI SC3 3_CL
VCC MI SC3 3_CL
VCC DD R_CL_18
VCC DD R_CL_18
VCC DD R_CL_18
VCC DD R_CL_18
VCC DD R_CL_18
VCC DD R_CL_18
VCC DD R_CL_18
VCC DD R_CL_18
VCC DD R_CL_18
VTTDD R
VCC QPI 0VRMRX0_ 1
VCC QPI 0VRMRX1_ 1
VCC QPI 0VRMRX2_ 1
VCC QPI 0VRMRX3_ 1
VC CQ PI0VR MTX_1
VCC QPI 0VRMRX0_ 2
VCC QPI 0VRMRX1_ 2
VCC QPI 0VRMRX2_ 2
VCC QPI 0VRMRX3_ 2
VC CQ PI0VR MTX_2
VCC XD P18
VCC XD P18
VTTXD P
VCC _C L
VCC _C L
VCC _C L
VCC _C L
VCC _C L
VCC _C L
VCC _C L
VCC _C L
VCC _C L
VCC _C L
VCC FHVC OR E
VCC _C L
VCC PE1VR M
VCCPEVR M
N4
M6
AD6
V3
AC1 0
D21
F22
F10
C16
K10
L8
H CB1 00 5KF-121 T20_04
V_1P1_CSI VRMBY P_R X
48 0m A
1. 8VS
V_1P8_CSI VRM_RX
V_ 1P1_CSI VRMBYP_TX
C97
C82
C 83
1U _6.3V_X5R_ 04
1U _6. 3V_X5R_04
10U _6.3V_X5R_ 08
L7
H CB1 00 5KF-121 T20_04
D2
E3
F3
E2
AE5
B30
C29
C28
B29
E9
60 mA
V_ 1P8_CSI VRM_R X
V_ 1P8_C SIVRM_TX
C93
1U _6 .3V_X5R_04
V_ 1P8_CSI VRM_TX
L 61
HCB100 5KF- 121T2 0_04
V_ 1P8_PLL
C70
10 U_6. 3V_X5R_08
2 00m A
V_ 1P5_PEVRM
1. 5VS
AR3 4
AT18
V_ 1P5_PEVRM
C481
1U _6.3V_X5R_ 04
L 11
*H CB100 5KF-121 T20_04
C482
10 U_6. 3V_X5R_08
48 0m A
V_ 1P1_C SIVRMBYP_RX
VC CA_1.1VS
C110
*1U _6 .3V_X5R_ 04
VCC TS
9 OF 1 3
C 104
L5
*H CB100 5KF-121 T20_04
60 mA
. 1U_ 10V_X7R _04
V_ 1P1_C SIVRMBYP_TX
2
B.Schematic Diagrams
Sheet 13 of 47
X58 PWR
U1 8- 9
TY LER SBURG
RE V= 1. 6
1. 1VS
U 18-8
TYLERSBU RG
R EV =1 .6
C94
C68
11/3
*1U _6.3V_X5R_ 04
*10 U_6. 3V_X5R _08
1. 1VS
C99
C 62
C1 35
C 123
C124
C 101
10U _6.3V_ X5R_ 08
. 1U _10 V_X7R _0 4
. 1U_ 10V_X7R _04
10 U_6.3V_X5R _08
.1 U_10V_X7R_04
. 1U _10V_ X7R _04
1.1VS
1. 1VS
1. 1VS
L 16
HC B16 08KF- 12 1T25_06
V_1P1_C L
1. 8VS
L 17
*HC B16 08KF- 12 1T25_06
V_1P8 _C L
L 18
HC B16 08KF- 12 1T25_06
1.1 VS
C65
C 111
R62
*0_ 04
C1 25
C89
*.1U_ 10V_ X7 R_ 04
*10U_ 6. 3V_X5 R_08
*. 1U_ 10V_X7R _04
C 127
C4 66
*1U_6.3 V_X5R _0 4
*1U _6 .3 V_X5R_04
*1U_ 6. 3V_X5 R_0 4
V_1P8_PL L
R54
0_ 04
C 464
*1 0U _6. 3V_ X5R_08
1 .8 VS
8 OF 1 3
1. 1VS
R 55
*1K_04
C96
C 64
C8 0
C 63
C465
C 460
C4 61
C 67
C66
V_ 0P9_C L
10 U_6.3V_X5R _08
10U_6 .3 V_X5R _08
10U _6.3V_X5R_ 08
1 0U _6 .3 V_X5R_08
*1 0U _6. 3V_X5R_08
10U _6. 3V_X5 R_ 08
1 0U_6. 3V_X5R_08
10U_ 6. 3V_X5 R_08
10U_6. 3V_ X5R _08
R 58
0 _0 4
1. 1VS
C61
C 129
C1 30
C 112
C122
C 147
C1 03
C 126
1 0U _6 .3V_X5R_08
10U _6. 3V_X5 R_ 08
. 1U_ 10V_X7R _04
1U _6 .3 V_X5R_04
10 U_6.3V_X5R _08
.1 U_10V_X7R_04
.1U _1 0V_ X7 R_0 4
1U_ 6. 3V_X5R _04
10 ,11, 43
VCCA_1. 1VS
5,4 1
10.. 12 ,1 7, 19,4 1,4 3
11, 15, 17,2 9, 32,4 1,4 3
7 .. 9, 12,15.. 30,3 2, 39,4 1,4 3
6, 12 ,15 .. 17,20, 24,26,29. .3 2, 40,41 ,4 3
V_1P1_C L
1. 1VS
C90
C 121
C9 2
C 133
1U_6. 3V_X5R _0 4
1U_6.3 V_X5R _0 4
1U _6.3V_ X5R_ 04
1U _6. 3V_X5R_04
B - 14 X58 PWR
C98
C1 32
.1U_ 10V_ X7 R_ 04
C 134
1 0U _6. 3V_X5R_08
10U_ 6. 3V_X5 R_08
1.8VS
1.1VS
1.5VS
3VS
3V
Schematic Diagrams
X58 GND
U 18- 10
TY LER SBU R G
REV=1.6
A 10
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
V SS
10 OF 13
B2
B25
B3
B33
B36
B8
C21
C27
C30
C34
C6
D10
D20
D26
D3
D35
D7
E11
E19
E25
E30
E36
E5
F18
F21
F27
F31
F5
F9
G23
G29
G32
G6
H1
H22
H27
H33
H4
H8
J2
J 20
J 22
J 25
J 28
J 31
J 34
J5
J8
J9
K1 4
K1 6
K1 8
K2 6
K2 9
K3
K3 2
K3 5
K6
K9
L1
L1 1
L1 2
L1 4
L1 6
L1 8
L2 1
L2 3
L2 4
L2 7
L3 0
L3 3
L3 6
L4
L7
M10
M2
M22
M25
M28
M31
M34
M5
M8
N 10
N 20
N 21
N 23
N 26
N 29
N3
N 32
N 35
N6
N9
P1
P1 1
P1 4
P1 6
P1 8
P2 0
P2 2
P2 4
P2 7
P3 0
P3 3
P3 6
P4
P7
R 10
R 11
R 15
R 17
R 19
U 18- 1 1
TYLER SB UR G
REV=1.6
V SS
V SS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
VSS
V SS
R2
R 21
R 23
R 25
R 28
R 31
R 34
R5
R8
T11
T12
T13
T16
T18
T20
T22
T26
T29
T3
T32
T35
T6
T9
U1
U 17
U 19
U 21
U 23
U 24
U 27
U 30
U 33
U 36
U4
U7
V1
V 10
V 11
V 12
V 13
V 16
V 18
V 20
V 22
V 25
V 28
V 31
V 34
V4
V7
W 17
W 19
W 21
W 23
W 25
W 26
W 29
W3
W 32
W 35
W6
W9
Y 11
Y 12
Y 13
Y 16
Y 18
Y2
Y 20
Y 22
Y 24
Y 27
Y 30
Y 33
Y 36
Y5
U 18-12
TYLER SB UR G
REV=1.6
A2 6
A3
A3 3
A3 5
A4
AA1
AA1 1
AA1 9
AA2 3
AA2 8
AA3 4
AA7
AB1 2
AB1 4
AB1 8
AB2 2
AB2 9
AB3 2
AB6
A C1 1
A C1 6
AC 2
A C2 3
A C2 7
A C3 3
AC 5
AD 1
A D2 8
A D3 4
AD 7
AE2 6
AE3
AE3 5
AE9
AF1 4
AF1 8
AF2 4
AF2 7
AF3 3
AF5
AG 1
A G1 1
A G1 3
A G1 5
A G1 7
A G1 9
A G2 1
A G2 3
A G2 5
A G3 1
AG 4
A H1 2
A H2 2
AH 3
A H3 5
AH 7
A J1 5
A J2 0
A J2 4
A J3 1
A J3 6
AK1
AK1 8
AK2 6
AK3 4
AK8
A L1 6
A L2 2
A L3 0
AL 6
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VS S
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
12 OF 13
U 18-13
TYLER SB UR G
REV=1.6
AM1 9
AM2 8
AM3 3
AM4
AN 1 2
AN 2 2
AN 3
AN 7
AP10
AP20
AP24
AP34
AP5
AR 1 3
AR 2
AR 2 7
AR 3 2
AR 3 6
AT16
AT21
AT3
AT33
AT35
AT6
B11
B19
B22
B28
B31
B35
B5
C1
C2
C 24
C3
C 31
C 36
C9
D 23
D 29
D 32
D4
E1
E22
E28
E33
E4
E8
AA 27
AA 32
AC 25
A C6
AF 26
AH 10
AH 11
AH 13
AH 14
AH 15
AH 16
AH 19
AH 20
AH 21
AH 29
A H8
A H9
AM10
AM11
AM20
AM22
AM24
AM25
AM27
AM31
AM35
AN 18
AN 33
AP 21
AT23
AT24
B4
C4
C5
D 22
E 16
F 11
A 13
A 17
A 20
C 15
D 13
D 17
E 14
F 15
G16
J 12
J 17
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
R SVD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD
RS VD _SP
RS VD _SP
RS VD _SP
RS VD _SP
RS VD _SP
RS VD _SP
RS VD _SP
RS VD _SP
RS VD _SP
RS VD _SP
RS VD _SP
RS VD _S P
RS VD _S P
RS VD _S P
RS VD _S P
RS VD _S P
RS VD _S P
RS VD _S P
RS VD _S P
RS VD _S P
RS VD _S P
RS VD _S P
RS VD _S P
F 17
F 23
H 17
H 18
H 20
J 16
J 24
K 12
K 13
K 24
K 25
K 27
L26
L6
M4
N 11
N8
P 10
P8
P9
R9
T10
T8
U 10
U6
U8
U9
V 27
V5
W 10
W 30
Y 10
Y 32
J 19
V9
A H1 8
Sheet 14 of 47
X58 GND
A 16
A 23
B 14
C 12
C 18
D 16
F 12
G13
G17
H 14
J 15
J 18
13 OF 13
F2
F24
F28
F34
F6
G10
G20
G26
G3
G35
G7
H 11
H 19
H 25
H 30
H 36
H7
Y8
11 OF 13
X58 GND B - 15
B.Schematic Diagrams
A 29
A 32
A 34
A7
AA 10
AA 17
AA 21
AA 25
AA 31
AA4
AB 11
AB 13
AB 16
AB 20
AB 26
AB3
AB 35
AB9
AC 14
AC 18
AC 21
AC 24
AC 30
AC 36
A C8
AD 11
AD 31
A D4
AE 11
AE 29
AE 32
AE6
AF 11
AF 16
AF2
AF 25
AF 30
AF 36
AF8
AG10
AG12
AG14
AG16
AG18
AG20
AG22
AG24
AG28
AG34
A G7
AH 17
AH 27
AH 32
A H6
AJ 10
A J2
AJ 22
AJ 29
AJ 33
A J5
AK 13
AK 22
AK 27
AK4
AL11
AL21
AL25
AL35
AM14
AM23
AM32
AM36
AM9
AN 17
AN 26
AN 31
AP1
AP15
AP22
AP29
AP36
AR 1
AR 18
AR 22
AR 3
AR 35
AR 8
AT11
AT2
AT25
AT30
AT34
Schematic Diagrams
DMI _RXN[ 3:0 ]
DMI _RXP[3: 0]
12,2 9 CL_N_C LK
12,2 9 CL_N_D ATA
12,2 9 CL_RST
HO S T
28 SB_KBCRST#
28 GA20 #
28,2 9 LPC_ SI RQ
19 C K_USB_48M_ ICH
20,28 MXM_PRESNT#
4,12,16,28,44 PWRGD_PS
G P IO
CK_1 00M_SATA_L
CK_1 00M_SATA_H
SATALED
CL_N_C LK
CL_N_D ATA
CL_RST
SB_KBC RST#
GA20 #
LPC_ SI RQ
H_FERR #
H_A2 0M#
H_I NI T#
H_I NTR
H_N MI
H_SMI#
H_ FERR #
H_A2 0M#
H_I NI T#
H_I NTR
H_N MI
H_SMI#
4, 28 PECI
4 TH ER MTR IP#
12 IOH_C LPWROK
US B
Sheet 15 of 47
ICH10 DMI/PCIE/
USB/SATA
12
12
12
12
12
12
CK_PE_100M_IC H_L
CK_PE_100M_IC H_H
PEC I
THER MTR IP#
IO H_CL PWROK
C K_USB_4 8M_ICH
MXM_PRESNT#
PWRGD _PS
32
32
32
32
32
32
32
32
26
26
26
26
29
29
29
29
25
25
25
25
32
32
32
32
1
2
3
4
8
7 RN6
6 8P4R X10K_04
5
OC# 4
OC# 5
OC# 6
OC# 7
1
2
3
4
8
7 RN1 9
6 8P4R X10K_04
5
OC# 8
OC# 9
OC# 11
R149
R147
R369
. 1U_ 10 V_X7R _04 DMIRXN0
. 1U_ 10 V_X7R _04 DMIRXP0
C507
C508
. 1U_ 10 V_X7R _04 DMIRXN1
. 1U_ 10 V_X7R _04 DMIRXP1
C509
C510
. 1U_ 10 V_X7R _04 DMIRXN2
. 1U_ 10 V_X7R _04 DMIRXP2
C512
C511
. 1U_ 10 V_X7R _04 DMIRXN3
. 1U_ 10 V_X7R _04 DMIRXP3
PE6_ RX_TV#
PE6_ RX_TV
PE6_TX_TV#
PE6_TX_TV
PE1_ RX_NEW#
PE1_ RX_NEW
PE1_TX_NEW#
PE1_TX_NEW
PE2_ RX_GLAN#
PE2_ RX_GLAN
PE2_TX_GLAN#
PE2_TX_GLAN
PE3_ RX_WAN#
PE3_ RX_WAN
PE3_TX_WAN#
PE3_TX_WAN
PE4_ RX_JMB#
PE4_ RX_JMB
PE4_TX_JMB#
PE4_TX_JMB
PE5_ RX_ROBSON#
PE5_ RX_ROBSON
PE5_TX_ROBSON#
PE5_TX_ROBSON
1.5VS
3V
OC# 0
OC# 1
OC# 2
OC# 3
C505
C506
C1 59
C1 58
C1 51
C1 50
.1U_10V_X7R_ 04
.1U_10V_X7R_ 04
.1U_10V_X7R_ 04
.1U_10V_X7R_ 04
C1 53
C1 52
.1U_10V_X7R_ 04
.1U_10V_X7R_ 04
C1 55
C1 54
.1U_10V_X7R_ 04
.1U_10V_X7R_ 04
C1 57
C1 56
.1U_10V_X7R_ 04
.1U_10V_X7R_ 04
Z1502
R299
24.9 _1%_ 04
CK_PE_100M_ ICH _L
CK_PE_100M_ ICH _H
R589
1.5 VS
PERN6 /GLAN_R XN
PERP6/ GLAN_ RXP
PETN6 /GLAN_TXN
PETP6/ GLAN_TXP
PERN1
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5
AF28
AF30
AD6
AD5
AE3
AE2
AD1
AD2
AB6
AB5
AC3
AC2
AB1
AB2
Y6
Y5
AA3
AA2
Y1
Y2
V6
V5
W2
W3
V1
V2
USB_P0USB_P0+
USB_P1USB_P1+
USB_P2USB_P2+
USB_P3USB_P3+
USB_P4USB_P4+
USB_P5USB_P5+
Z1514
Z1515
U SB_P7U SB_P7+
Z1516
Z1517
U SB_P9U SB_P9+
U SB_P10U SB_P10+
U SB_P11U SB_P11+
U SB_ P0U SB_ P0+
U SB_ P1U SB_ P1+
U SB_ P2U SB_ P2+
U SB_ P3U SB_ P3+
U SB_ P4U SB_ P4+
U SB_ P5U SB_ P5+
U SB_ P7- 2 9
U SB_ P7+ 2 9
P5
N3
P7
R7
N2
N1
N5
M1
P3
R6
T7
P1
OC#0
OC#1
OC#2
OC#3
OC#4
OC#5
OC#6
OC#7
OC#8
OC#9
U SBR BI ASB
USBRBI AS
AG1
AG2
USBRBIAS_L R371
AG3
C K_USB_4 8M_ICH
CLK48
A29
B29
CL_N_CLK R58 6
*0_ 04 C L_C LK0 G22
C18
CL_N_DATAR58 7
*0_ 04 C L_D ATA0H21
E19
C27
CL_N_ VREF_IC H
A16
I OH_C LPWROK
T6
B16
CL_RST R5 88
*0 _04 CL_ RST_ 0B G20
AJ21
AJ22
AK22
WL AN
U SB_ P9- 3 2 TV TU NR
U SB_ P9+ 3 2
U SB_ P10 - 32 NE W C AR D
U SB_ P10 + 32
U SB_ P11 - 32
U SB_ P11 + 32 Ro bso n Car d
O C0B/GP59
O C1B/GP40
O C2B/GP41
O C3B/GP42
O C4B/GP43
O C5B/GP29
O C6B/GP30
O C7B/GP31
O C8B/GP44
O C9B/GP45
OC10B/GP46
OC11B/GP47
3VS
26
OC#10
OC#11
ICH10
U20C
R29 7 24 .9_ 1%_04 Z15 01
30
30
30
30
30
30
30
30
31
31
31
31
AH21
AK21
AH22
AK23
I CH_GP17
I CH_GP1
BID 0
BID 1
C19
R32 9
R33 7
R34 1
R11 3
ICH _GPIO 49
10K_04 Z15 03 AJ24
10K_04 Z15 04 AK24
*10 K_04 Z15 05 AH23
*10 K_04 Z15 06 AD20
AJ25
GLAN_COMPO
GLAN_COMPI
CL_CLK0
TP5
CL_DATA0
TP4
CL_VREF0
TP6
CLPWR OK
TP7
CL_RST0B
PWM0
PWM1
PWM2
U1 LB
R EV = 0.7 2SATA0R XN
SATA0 RXP
SATA0TXN
SATA0 TXP
SATA1R XN
SATA1 RXP
SATA1TXN
SATA1 TXP
SATA2R XN
SATA2 RXP
SATA2TXN
SATA2 TXP
SATA3R XN
SATA3 RXP
SATA3TXN
SATA3 TXP
SATA4R XN
SATA4 RXP
SATA4TXN
SATA4 TXP
TACH0/GP17
TACH1/GP1
TACH2/GP6
TACH3/GP7
SATA5R XN
SATA5 RXP
SATA5TXN
SATA5 TXP
SATA_C LKN
SATA_CLKP
SST
SCLOC K/GP22
SLOAD/ GP38
SDATAOUT0/ GP39
SDATAOUT1/ GP48
GP49
SATALEDB
SATARBI ASB
SATARBI AS
SATA0 GP/G P2 1
SATA1 GP/G P1 9
SATA2 GP/G P3 6
SATA3 GP/G P3 7
SATA4GP
SATA5GP
R 622
2 .2K_04
32
21_1%_04
D0 3
A20GATE
A2 0MB
I GNN EB
IN IT3_3VB
IN ITB
IN TR
FERRB
NMI
RC INB
SERI RQ
SMIB
STPCLKB
THRMTRI PB
DMI_I RCOMP
DMI_ZC OMP
U 26
U 25
DMI_C LKN
DMI_C LKP
3VS
2OF6
IC
R 304
*3 .24K_1%_0 4
3 VS
VREF=0.33V
PEC I
C L_N _VREF_I CH
AK1 7 SATA_ RX#0
AJ17 SATA_ RX0
AK1 9 SATA_ TX#0
AJ19 SATA_ TX0
AJ15 SATA_ RX#1
AK1 5 SATA_ RX1
AH16 SATA_ TX#1
AF1 6 SATA_ TX1
AJ13 SATA_ RX#2
AK1 3 SATA_ RX2
AH14 SATA_ TX#2
AF1 4 SATA_ TX2
AJ11 Z1510
AK1 1 Z1511
AF1 2 Z1512
AH12 Z1513
S ATA _RX#0
S ATA _RX0
S ATA _TX#0
S ATA _TX0
S ATA _RX#1
S ATA _RX1
S ATA _TX#1
S ATA _TX1
S ATA _RX#2
S ATA _RX2
S ATA _TX#2
S ATA _TX2
AJ9 SATA_ RX#4
AK9 SATA_ RX4
AF1 0 SATA_ TX#4
AH9 SATA_ TX4
S ATA _RX#4 21
S ATA _RX4 21
S ATA _TX#4 2 1
S ATA _TX4 21
5
2
12, 16 ,20 ,2 8,2 9 PLTR ST#
1
2
3
4
8
7 RN7
6 8P4R X10K_04
5
ICH _GP17
ICH _GP1
ICH _GP19
MXM_PRESNT#
1
2
3
4
8
7 RN3
6 8P4R X10K_04
5
ICH _GP21
THERM#
SATA4GP
SATA5GP
1
2
3
4
8 RN1
7
6 8P4R X10K_04
5
SATA2GP
SATA3GP
R107
R104
R 305
1 K_04
. 1U_16V_04
*10K_04
SB_KBC RST#
LPC_SI RQ
SATALED
AJ7 SATA_ RX#5
S ATA _RX#5 22
AK7 SATA_ RX5
S ATA _RX5 22
AF8 SATA_ TX#5
S ATA _TX#5 2 2
AH7 SATA_ TX5
S ATA _TX5 22
AF1 8 C K_ 10 0M_SATA_L
AF1 9 C K_ 10 0M_SATA_H
AE7
AK6
AJ6
SATAL ED
SATABIAS R360
AK2 5
AE2 0
AE2 1
AE2 2
AF2 2
AD21
I CH_GP21
I CH_GP19
SATA2 GP
SATA3 GP
SATA4 GP
SATA5 GP
P8
AJ28
G A2 0#
H _A20 M#
AC22
M3
AE2 3
AH27
AJ27
AF2 4
L3
N6
AH26
AJ29
AD24
I CH_INI T_33V
H _IN IT#
H _IN TR
H _FERR# R306
H _NMI
SB_KBCR ST#
L PC_SIR Q
Z1507
R322
H DD2
O DD
e -S TAT
*6 2_0 4
CPU _VTT
100_04 H _SMI#
THERMTRIP#
*0 _04
PECI
C 518
I CH10R
IC
*. 1U_10V_X7R _04
4 BU F_ PLT_ RST#
BU F_ PLT_RST# 25,2 6,3 2
SPI _C LK
SPI _MOSI
74AHC1G08 GW
R5 20
R516
POWER OK
*0 _04
U 21
3
PWRGD_PS
10 K_04
10 K_04
C 529
*0 .1u _04
2
RST#
VC C
1
GND
*G690L29 3T7 3
(I MP80 9)
J_I CH_ SPI 1
2
1
4
3
6
5
8
7
SPI_VCC
SPI_CS
SPI_MI SO
SPNZ- 08S3- B-C-0-P
3VS
*0_04
R351
0_0 4
3V
C730 . 1U_16V_04
*10K_04
SPI _VCC
PM_PWR OK
PM_PWROK
8
16
R354
R 523
1K_04
3
U 36
VDD
SI
SO
C E#
SCK
5
2
1
6
WP#
*100 K_04
R 524
3VS
1K_04
7
HOL D#
25VF01 6B
VSS
4
R518
R519
R521
R522
C73 1
C73 2
C73 3
C73 4
33_04
33_04
33_04
33_04
SPI _MO SI
SPI _MI SO
SPI _CS
SPI _CL K
SPI _MOSI 16
SPI _MI SO 16
SPI _CS 16
SPI _CLK 1 6
*33P_ 04
*33P_ 04
*33P_ 04
*33P_ 04
3VS
R345
R339
*1 0K_04
*10K_04
TH ERM#
R87
TH ERM# 1 6
8.2K_04
CQ37
BID 0
BID 1
Z1519
B
E2N 3904
CQ9
B - 16 ICH10 DMI/PCIE/USB/SATA
H DD1
U4
1
3
R 517
10K_04
H DD0
24. 9_1%_04
AC23 I CH_PEC I R618
3VS
R346
31
31
31
31
31
31
31
31
31
31
31
31
3O F6
C191
3VS
GA20#
D 29
D 30
E26
E28
P30
P29
R 26
R 28
M30
M29
N 26
N 28
K30
K29
L26
L28
H 30
H 29
J 26
J 28
F30
F29
G26
G28
USBP0N
POR T0 U SBP0P
USBP1N
POR T1 U SBP1P
USBP2N
POR T2 U SBP2P
USBP3N
POR T3 U SBP3P
USBP4N
C CD U SBP4P
USBP5N
B T U SBP5P
USBP6N
U SBP6P
USBP7N
U SBP7P
USBP8N
U SBP8P
USBP9N
U SBP9P
U SBP10N
USBP10P
U SBP11N
USBP11P
I CH1 0R
10 K_04
10 K_04
10 K_04
12/ 15
DMI0R XN
DMI0R XP
DMI0TXN
DMI0TXP
DMI1R XN
DMI1R XP
DMI1TXN
DMI1TXP
DMI2R XN
DMI2R XP
DMI2TXN
DMI2TXP
DMI3R XN
DMI3R XP
DMI3TXN
DMI3TXP
P C I -E
B.Schematic Diagrams
19 C K_100M_ SATA_L
19 C K_100M_ SATA_H
3 0 SATALED
U 1LB
REV = 0. 72
W 28
W 26
V30
V29
AA26
AA28
Y 30
Y 29
AC 26
AC 28
AB30
AB29
AF26
AE26
AD 29
AD 30
DM I
C L T o IO H S A T A
1 9 CK_PE_1 00M_IC H_L
1 9 CK_PE_1 00M_IC H_H
ICH10
U 20B
DMI_TXN0
DMI_TXP0
DMI_R XN0
DMI_R XP0
DMI_TXN1
DMI_TXP1
DMI_R XN1
DMI_R XP1
DMI_TXN2
DMI_TXP2
DMI_R XN2
DMI_R XP2
DMI_TXN3
DMI_TXP3
DMI_R XN3
DMI_R XP3
SAT A
DMI _TXN[ 3:0 ]
DMI _TXP[3: 0]
1 1 DMI _RXN[ 3:0 ]
1 1 DMI _RXP[3: 0]
H OS T
11 DMI _TXN[ 3:0]
11 DMI _TXP[3 :0]
US B
DM I
ICH10 DMI/PCIE/USB/SATA
R340
10K_ 04
4,4 4 H_PR OCHOT#
R 85
D7
8. 2K_04 Z1518 B
E2N3 904
A
C PW RO KICH
*R B751 V
PW RO KIC H 12 , 16, 2 2. .24
6, 12, 13 ,16 ,1 7,2 0,2 4, 26, 29. .3 2,4 0,4 1, 43
11 ,13 ,17 ,2 9,3 2,4 1, 43
4, 5,1 8,3 9, 44
7.. 9,1 2,1 3, 16. .30 ,3 2,3 9,4 1, 43
3V
1. 5VS
CPU_VTT
3VS
Schematic Diagrams
3 VS
SDATI1
SDATI0
SDATI1
SDATI0
27,3 2 BI T_CL K
27,3 2 AC_ RESET#
27,3 2 SDATO
27,3 2 SYN C
PWR GD_PS_BUF
PWRGD_ PS_BUF
4 ,12, 18 H_PWRGD
12, 18 ICH _VRM_PWRGD
CK_PWRGD
ICH SPK
SUSB#
SUSC #
SUS_ ST#
ODD _DETECT#
24 SB_ BL ON
ICH _GP12
ICH _GP8
8 RN20
7 8P4RX8.2K_0 4
6
5
ICH_ GP35
ICH_ SY NC#
ICHSPK
PC I_PME#
R376
R324
R150
R529
*10 K_ 04
1 K_ 04
2 .2K_04
*8. 2K_04
SU S_ ST#
R616
8 .2K_04
ICH_ GP35
ICH_ GP9
R530
R350
1 0K_04
8 .2K_04
ICH_ GP8
ICH_ GP12
R565
R566
1 .1K_04
1 .1K_04
PCI_R EQ #0
PCI_R EQ #1
PCI_R EQ #2
PCI_R EQ #3
K7
G13
F13
G8
PCI_I NT# A
PCI_I NT# B
PCI_I NT# C
PCI_I NT# D
PCI_I NT# E
PCI_I NT# F
PCI_I NT# G
PCI_I NT# H
J5
E1
F1
A3
K6
L7
F2
G2
GNT0B
GNT1B/GP51
GNT2B/GP53
GNT3B/GP55
REQ0B
REQ1B/ GP5 0
REQ2B/ GP5 2
REQ3B/ GP5 4
PIRQ AB
PIRQ BB
PIRQ CB
PIRQ DB
PIRQ EB/G P2
PIRQ FB/G P3
PIRQ GB/ GP4
PIRQ HB/ GP5
C/ BE0 B
C/ BE1 B
C/ BE2 B
C/ BE3 B
3V
H_ PWR GD
I CH_VRM_ PWR GD
F1 1
G9
C4
E8
PC I_C/ BE# 0
PC I_C/ BE# 1
PC I_C/ BE# 2
PC I_C/ BE# 3
R61 9
8.2 K_ 04
SWI#
SCI#
SMI#
R11 5
R35 7
R34 7
4.7 K_ 04
8.2 K_ 04
4.7 K_ 04
I CH10 R
SMLI NK0
SMLI NK1
I CH_GP11
HWR ST#
PLTR ST#
PE_WAKE#
TH ERM#
VRM_PWRG D
IC H_SYNC#
PWR_BTN #
1
2
3
4
8 RN 18
7 8P4R X10K_0 4
6
5
R66
HWR ST#
ALERT#
R56 7
R56 8
PE_WAKE#
RI #
R53 4
R53 5
1K_04
10K_04
SUS_ST#
PWR_BTN #
GP56
R37 0
R14 8
R11 6
*8 .2K_0 4
8.2 K_ 04
8.2 K_ 04
1K_04
SPI_MO SI
SPI_MI SO
15 SPI_ CS
1 5 SPI_C LK
3V
R83
CHANGE TO 10K FOR QUALI FI ED CHI PSETS
ICH _VRM_PWRGD
10K_04
10K_04
ICH 10R
C 169
ODD _DETECT#
SB_BLON
SMBCLK
SMBDATA
R12 3
R11 9
2.2 K_ 04
2.2 K_ 04
IC H_GP12
IC H_GP8
LPCPME#
SB_MUTE#
R52 8
R11 4
8.2 K_ 04
10K_04
R81
VRM_PWRGD
R82
10 K_ 04
B
Q5
2N3 904
Z1612
10K_0 4
1 0K_04
3 VS
3 VS
3V
Sheet 16 of 47
ICH10 PCI/SPI/
Other
ICH_ SU SB#
SU SC#
CK_PWRGD
ICH_ GP72
R531
1 0K_04
3V
IC
C7 35
R53 6
3V
10 0K_04
C
Q6
2 N390
4
E
B
A1 3
B1 3
G17
F1 7
T8
C13
AK28
AE24
F2 0
C
1U_ 10V_06
E
10 K_ 04
B
Q 52
2N3 904
C
Q5 3
2 N390
4
E
*10K_0 4
Z1 611
Z160 3 R525
ICH_ GP8
A2 0
ICH_ GP9
A1 8
SWI #
C17
ICH_ GP12
A8
SMI#
A1 9
SC I#
A9
ICH_ PC I_STP
C15
M2 Z160 5
Z160 6
K1
AF5 Z160 7 R526
1 0K_04
A1 4 Z160 8 R527
1 0K_04
ICH_ CPU_STP
B1 8
C11 Z161 0
LPCPME#
A1 1
SB_MUTE#
G18
PC IE_RST#
K2
ODD_D ETEC T#
AF6
SB_BLO N
AH 5
ICH_ GP35
L1
GP56
F1 6
SBTPM_ PP
C12
AD 23 H_PWRGD
LAN100 _SLP
E2 1
THERM#
AK26
ICH_ VR M_PWRGD
C22
AH 25 ICH_ SY NC#
PWR _BTN#
T3
RI#
G19
SU S_ ST#
R1
R5 Z160 2
HWRST#
F1 9
PL TRST#
C14
ICH_ WAKE#
E2 0
INTR UDER#
G21
PWR OKICH
C25
RSMRST#
F2 2
INTVRMEN
E2 3
ICHSPK
N8
RTCVCC
C R5 33
R69
3V
SUSB#
N7
GP0/ BMBU SY B
DRAMPWROK/GP8
GP9/ WOL_EN
G P1 0/CPU_ MISSING/ JTAGTMS
GP12
GP13
HDA_BIT_ CLK
GP14/ JTAGTD I/Q ST_BMBU SY B
HDA_RSTB
STP_PCI B/ GP15
HDA_SDIN0
DPRSLPVR/ GP16
HDA_SDIN1
GP18
HDA_SDIN2
GP20
HDA_SDIN3
GP24/ MEM_LED
HDA_SDOUT
STP_ CPUB/ GP25
HDA_SYNC
S4 _STATEB/ GP26
CLK14
GP27
GP28
GP32
GP33
GP34
SATAC LKREQB/ GP35
GLAN_CL K
GP56
GP5 7/TPM_PP/ JTAGTC K
LAN_RSTSYNC
CPUPWRGD
LAN_RSTB
L AN1 00_ SL P
LAN_RXD0
LAN_RXD1
THRMB
LAN_RXD2
VRMPWRGD
LAN_TXD0
MCH_SYNC B
LAN_TXD1
PWRBTN B
LAN_TXD2
RI B
SUS_STATB/L PC PD/ GP61
RTCX1
SU SCL K/ GP62
RTCX2
SYS_RESETB
RTCRSTB
PLTR STB
SR TCRSTB
WAKEB
SMBALERTB/G P1 1/J TAGTDO
I NTRUD ER B
SMBCL K
PWRO K
RSMR STB
SMBDATA
I NTVRMEN
LINKALERTB/G P6 0/JTAG RST
SPKR
SMLINK0
SMLINK1
SL P_ S3 B
SL P_ S4 B
SPI_ MOSI
SLP_S5B/GPI O63
SPI_ MISO
SPI_ CS0B
SLP_MB
CK_PWRGD
SPI_ CLK
SPI_ CS1B
GP72
DPRSTPB
DPSLPB
TP3
4 OF6
100K_0 4 PW RGD_PS_BUF
R53 2
3VS
PWRG D_PS
R537
B
20K_0 4
C7 36
*. 1U_1 0V_X7 R_04
C73 7
Zo= 55O? 5%
1U _10V_0 6
E
R3 23
C52 7
2
X2
32. 768KHz
3
R TCRST#
RTCX1
15P_50 V_ 04
27 K_ 1%_04
R344
C5 23
1U_ 10V_0 6
10M_ 04
J OPEN 1
*OPEN_3 5mil
1U _6.3 V_ 04
3V
SCI#
SMI#
SWI#
GP56
RTCVCC
VRM_ PWR GD
LAN1 00_SLP
R96
PLTR ST#
PWROKIC H
H_ PWR GD
C53 6 *1 U_6. 3V_04
C16 4 *1 U_6. 3V_04
C17 2 *1 U_6. 3V_04
R7 2
*0_04 I CH_VRM_ PWR GD
15
390K_0 6
C52 8
15P_50 V_ 04
RTCX2
PM_PWRO K
R35 6
L AN _RST#
R9 7
1 K_ 04
BIT_ CLK
AC_RESET#
SDATO
SYNC
R 372
R 373
R 374
R 375
RSMRST#
1
R569
4 .7K_0 4
SB_BLON
R570
1 K_ 04
IC H_SUSB#
2
3
SUSB#
1. 5V_PWRGD
U1 9B
74 LVC08PW
U19C
74LVC0 8PW
8 PWRGD_3 V R29 6
R54 2
10 0K_04
10
0_0 4
PWROKIC H
1 2,15 ,22 ..2 4
3V
5
C7 38
1U _10V_X7R_0 4
HDA_BIT_CLK
HDA_R STB
HDA_SDOU T
HDA_SYNC
D03 3/ 3
9
4
6
PWRGD_ PS_BUF
3 VS
3V
40
U19 A
74 LVC08PW
14
14
0_ 04
0_ 04
0_ 04
0_ 04
0_ 04
0_ 04
0_ 04
0_ 04
O DD_DETECT#
ICH_ WAKE#
*0_0 4
U42
RTCVCC
1
3 5mi l
4 ICH_ WAKE#
PE_W AKE#2
D2 2
ASD7 51V
A
C
74 AHC 1G32 GW
3
1 K_ 04
*0_0 4
7
1 K_ 04
R1 53
R 378
MXM_BIT_ CLK
MXM_AC_RESET# R 379
R 380
MXM_SDATO
R 381
MXM_SYNC
R30 1
PE_WAKE#
R 650
3V
10K_04
7
R3 58
11
13
C5 16
*1K_0 4
PCI _GNT#1
U19 D
74 LVC08PW
12
3V
*1K_0 4
PCI _GNT#0
PM_ PW ROK
ICH _VRM_PWRGD
IC H_PCI_ STP
IC H_CPU_STP
. 1U_1 0V_X7R _04
R1 37
C 26
SPI_ MOSI
B26
SPI_ MISO
E25
SPI_ CS
G 23
SPI_ CLK
Z1 601 F23
*1K_04
15
15
IC
VR M_PWRG D? VR _Ready (VRM_ PWRGD) ?
3V
SBTPM_PP
PCI _GNT#3
A21
B21
A25
H 20
C 16
H 16
E16
F18
A15
B15
I CH_G P1 1
SMBCL K
SMBDATA
ALERT#
SML INK0
SML INK1
1O F6
ICH_ GP72
TPM_ PP n eed pull down,d isable TPM
R3 59
R TCX1
R TCX2
R TCRST#
U1L B
REV = 0.7 2
5
ICH _PCI_STP
ICH _CPU_STP
PCI _GNT#2
F25
E14
C 21
G 15
H 14
E13
F15
F14
G 14
L AN _RST#
D03
CK_PWRGD
IC HSPK
SUSB#
SUSC#
SUS_ST#
ICH10
LDRQ1 B/ GP23
FWH 0/L AD0
FWH 1/L AD1
FWH 2/L AD2
FWH 3/L AD3
LDRQ0 B
FWH 4/L FRAMEB
Cle ar CMO S
2 8 SCI #
2 8 SMI #
2 8 SWI #
1 2 G P5 6
19
19
1
2
3
4
H5
A7
C7
F7
14
10
10
PC I_I NT#H
PC I_I NT#C
PC I_I NT#G
PC I_I NT#B
PCI_G NT#0
PCI_G NT#1
PCI_G NT#2
PCI_G NT#3
7
GP IO
21
HWRST#
PLTRST#
PE_ WAKE#
THERM#
VRM_PWRGD
IC H_SYNC#
PWR_BTN#
8 RN5
7 8P4RX8.2K_0 4
6
5
PWRGD _PS
PWRGD _3V
PWROKIC H
RSMRST#
PWROKICH
RSMRST#
4 ,18
12 ,15 ,20 ,28, 29
26 ,29 ,32
15
44
12
28
1
2
3
4
H DA_BIT_C LK AH3
H DA_RSTB
AJ1
SDATI 0
AK3
SDATI 1
AH4
SDATI 2
AH1
AJ3
H DA_SDOUT AJ2
H DA_SYNC
AK1
C K_ 14M_ ICH
M5
14
12, 15, 22. .24
28
PC I_REQ# 1
PC I_REQ# 2
PC I_REQ# 0
PC I_REQ# 3
PCI
R1 35
3VS
J3
K3
H1
M7
J1
L6
L5
SPI
19
31
10 ,28 ,32, 43
28
29
8 RN10
7 8P4RX8.2K_0 4
6
5
10 K_ 04
L PC _AD0
L PC _AD1
L PC _AD2
L PC _AD3
10 K_ 04Z1 616
L PC _FRAME#
SM B
4,12 ,15 ,28 ,44 PWRGD_ PS
19 PWRGD_3 V
1
2
3
4
PC I_AD0
PC I_AD1
PC I_AD2
PC I_AD3
PC I_AD4
PC I_AD5
PC I_AD6
PC I_AD7
PC I_AD8
PC I_AD9
PC I_AD10
PC I_AD11
PC I_AD12
PC I_AD13
PC I_AD14
PC I_AD15
PC I_AD16
PC I_AD17
PC I_AD18
PC I_AD19
PC I_AD20
PC I_AD21
PC I_AD22
PC I_AD23
PC I_AD24
PC I_AD25
PC I_AD26
PC I_AD27
PC I_AD28
PC I_AD29
PC I_AD30
PC I_AD31
R TC
19
CK_1 4M_I CH
CK_14 M_I CH
PC I_I NT#D
PC I_DEVSEL #
PC I_TRDY#
PC I_STOP#
R1 54
3VS
C10
C8
E9
C9
A5
E1 2
E1 0
B7
B6
B4
E7
A4
H12
F8
C5
D2
E5
G7
E1 1
G10
G6
D3
H6
G5
C1
C2
C3
D1
J7
F3
G1
H3
VDD3
3V
C17 0
2 5mil
1U_ 6.3 V_ 04
5mi l
SMBD ATA
L AN _R ST#
SP I RO M
H
N O Re b o ot
L
N O T N O re boo t
i f no t u se P U LL L O W
. 1U_1 0V_X7 R_04
C182
.1U _10V_X7R_0 4
3VS
R 343
10K_04
Z1615
PQ61
2N7 002W
3 VS
R348
*0_04
G
R34 2
4.7 K_ 04
SDATA
3 VS
1
2
2
1
Z1613 R177
852 05-0 200 1
1K_04
Z1614
R 86
1M_ 04
R 84
39 0K_1%_06
INTVRMEN
INTRUDER#
7. .9, 12, 18, 19, 32
SMBC LK
D
LP C RO M
L
20mils
JCBAT1
C55 0
C5 57
C 230
C175
.1U_ 10V_X7 R_04
*.1 U_10 V_ X7R_ 04
. 1U_1 0V_X7 R_04
*.1U_ 10V_X7R_0 4
3VS
R 109
10K_04
21 ,24, 28, 31, 40, 42,4 3,4 5 VDD 3
6,1 2,1 3,1 5,17 ,20 ,24 ,26, 29. .32 ,40 ,41, 43 3V
7. .9, 12, 13,1 5,1 7.. 30, 32,3 9,4 1,4 3 3 VS
R110
*0_04
G
R10 8
PQ25
2N7 002W
4.7 K_ 04
3 VS
S
S PKR
H
JC BAT1
S
C18 7
P CI_ GN T #0
D
HW Str ap
D2 1
ASD7 51V
A
C
SCLK
7 ..9 ,12 ,18 ,19, 32
ICH10 PCI/SPI/Other B - 17
B.Schematic Diagrams
BIT_CLK
AC_R ESET#
SDATO
SYNC
8 RN9
7 8P4RX8.2K_0 4
6
5
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
LA N
HD A udio
32
27
1
2
3
4
REV = 0 .72
PAR
DEVSELB
PCIC LK
PCIR STB
IR DYB
PMEB
SERRB
STOPB
PLOCKB
TR DYB
PERRB
FRAMEB
1
MXM_BIT_ CLK
MXM_AC_RESET#
MXM_SDATO
MXM_SYNC
SDATI2
PC I_PERR#
PC I_PLOC K#
PC I_FRAME#
PC I_I NT#A
PCI_PAR
E3
PCI_D EVSEL# C6
CK_P_33 M_IC H B3
PCIRST#
R2
PCI_I RDY#
J8
PCI_PME#
R3
PCI_SERR#
K5
PCI_STO P#
F10
PCI_PLO CK#
H8
PCI_TRDY#
E6
PCI_PERR#
F5
PCI_FRAME# G12
4
LPC_ FRAME#
LPCPME#
2 0 MXM_BIT_CLK
2 0 MXM_AC_R ESET#
2 0 MXM_SDATO
2 0 MXM_SYNC
20 SDATI2
19
M IS C
LPC_ AD[ 3:0 ]
8 RN8
7 8P4RX8.2K_0 4
6
5
7
HD Au di o
Fo r MXM
28, 29 LPC_FRAME#
28 LPCPME#
1
2
3
4
U20 D
ICH10 U1 LB
U 20A
PC I_I RDY#
PC I_I NT#E
PC I_I NT#F
PC I_SERR#
A UDI O
L PC
2 8,2 9 L PC_ AD [3: 0]
PCIR ST#
CK_P_3 3M_I CH
MI SC
3 2 PCI RST#
1 9 C K_ P_ 33M_ ICH
LP C
P C I In te r fa c
ICH10 PCI/SPI/Other
Schematic Diagrams
ICH10 Power/GND
U 20 F
U 1L B
U2 0E
ICH10
VSS_100
R EV = 0 .7 2
V_R EF5V
V_1 P5_ CL_I NT
V_R EF5V_ SUS
C5 22
1. 5VS
.1 U_10 V_X7R _0 4
VCCHDA
V_1P5_ CL_I NT
3V
3VS
C5 42
.1U_ 10 V_X7R _0 4
B.Schematic Diagrams
1. 5VS
VCC SATA_ PLL_I CH
A6
AF1
H1 0
H1 1
AC1 1
AB2 3
AC1 8
AC2 0
A2 6
AC 9
AC1 0
AD1 0
AC1 9
AC2 1
AF2 1
AH2 4
AK5
AK2 0
VCC DMI_ PLL _I CH
T3 0
GLCI _PL L
A2 8
AF2
3V
L8 6
3VS
C2 36
.1 U_ 10V_X7R _04
Sheet 17 of 47
ICH10 Power/GND
VCC CL _3 V_I CH C2 3
B2 3
HC B10 05 KF-1 21 T2 0_ 04
C3 0
1. 5VS
C2 9
C2 8
B3 0
AA2 3
AA2 4
AA2 5
AB2 4
AB2 5
AC2 5
AD2 5
AD2 6
AD2 8
AE2 8
AE2 9
AE3 0
J2 4
J2 5
K2 3
K2 4
K2 5
L2 4
L2 5
M2 3
M2 4
M2 5
N2 4
N2 5
P2 3
P2 4
P2 5
R2 4
R2 5
T2 3
T2 4
T2 5
T2 6
T2 8
U2 4
U2 8
U2 9
U3 0
V2 3
V2 4
V2 5
W2 4
W2 5
Y2 3
Y2 4
Y2 5
V_1P5_ IC H
AG2 9
AG3 0
HC B1005 KF-1 21 T2 0_ 04
1. 5VS
AC1 3
AD1 1
AD1 2
AD1 3
AE1 1
AF1 1
AH1 0
AH1 1
AJ1 0
AK1 0
AC1 7
AD1 7
AE1 7
AF1 7
AH1 7
AH1 8
AJ1 8
AK1 8
5V
V5 REF
V5 REF_ SUS
R377
NC f o r IC H1 0 po wer p in/ N o LAN
VC C1 _5 _A_ 23
VC C1 _5 _A_ 24
VC C1 _5 _A_ 19
VC C1 _5 _A_ 22
VC C1 _5 _A_ 20
VC C1 _5 _A_ 21
VC CC L1 _5
VC CSU SHD A
VC CH DA
VC C3 _3 _0 3
VC C3 _3 _0 4
VC C3 _3 _0 5
VC C3 _3 _0 6
VC C3 _3 _0 7
VC CU SBPLL
B
C 53 8 *. 1U _1 0V_ X7 R_ 04
VC CL AN1_1_1
VC CL AN1_1_2
VC C1 _5 _A_28
VC C1 _5 _A_29
VC C1 _5 _A_30
VC C1 _5 _A_31
VC C1 _5 _A_32
VC C1 _5 _A_25
VC C1 _5 _A_26
VC C1 _5 _A_27
VCC 1_1_ 01
VCC 1_1_ 02
VCC 1_1_ 03
VCC 1_1_ 04
VCC 1_1_ 05
VCC 1_1_ 06
VCC 1_1_ 07
VCC 1_1_ 08
VCC 1_1_ 09
VCC 1_1_ 10
VCC 1_1_ 11
VCC 1_1_ 12
VCC 1_1_ 13
VCC 1_1_ 14
VCC 1_1_ 15
VCC 1_1_ 16
VCC 1_1_ 17
VCC 1_1_ 18
VCC 1_1_ 19
VCC 1_1_ 20
VCC 1_1_ 21
VCC 1_1_ 22
VCC 1_1_ 23
VCC 1_1_ 24
VCC 1_1_ 25
VCC 1_1_ 26
VCC 1_1_ 27
VCC 1_1_ 28
VCC 1_1_ 29
VC CSATAPLL
VC CD MI PLL
VC CG LAN PLL
VC CSU S3_ 3_ 01
VC CC L3 _3 _2
VC CC L3 _3 _1
VC CG LAN 1_ 5_ 4
VC CG LAN 1_ 5_ 3
VC CG LAN 1_ 5_ 2
VC CG LAN 1_ 5_ 1
VC C1 _5 _B_ 01
VC C1 _5 _B_ 02
VC C1 _5 _B_ 03
VC C1 _5 _B_ 04
VC C1 _5 _B_ 05
VC C1 _5 _B_ 06
VC C1 _5 _B_ 07
VC C1 _5 _B_ 08
VC C1 _5 _B_ 09
VC C1 _5 _B_ 10
VC C1 _5 _B_ 11
VC C1 _5 _B_ 12
VC C1 _5 _B_ 13
VC C1 _5 _B_ 14
VC C1 _5 _B_ 15
VC C1 _5 _B_ 16
VC C1 _5 _B_ 17
VC C1 _5 _B_ 18
VC C1 _5 _B_ 19
VC C1 _5 _B_ 20
VC C1 _5 _B_ 21
VC C1 _5 _B_ 22
VC C1 _5 _B_ 23
VC C1 _5 _B_ 24
VC C1 _5 _B_ 25
VC C1 _5 _B_ 26
VC C1 _5 _B_ 27
VC C1 _5 _B_ 28
VC C1 _5 _B_ 29
VC C1 _5 _B_ 30
VC C1 _5 _B_ 31
VC C1 _5 _B_ 32
VC C1 _5 _B_ 33
VC C1 _5 _B_ 34
VC C1 _5 _B_ 35
VC C1 _5 _B_ 36
VC C1 _5 _B_ 37
VC C1 _5 _B_ 38
VC C1 _5 _B_ 39
VC C1 _5 _B_ 40
VC C1 _5 _B_ 41
VC C1 _5 _B_ 42
VC C1 _5 _B_ 43
VC C1 _5 _B_ 44
VC C1 _5 _B_ 45
VC C1 _5 _B_ 46
A10
B10
AA7
AA8
AB7
AB8
T1
A24
B24
C2 4
E24
F24
G2 4
H2 3
H2 4
J23
M1 2
M1 3
M1 5
M1 7
M1 8
M1 9
N1 2
N1 9
R1 2
R1 9
U1 2
U1 9
V12
V19
W1 2
W1 3
W1 5
W1 7
W1 8
W1 9
VCC 3_3_ 01
VCC 3_3_ 02
VCC GL AN3 _3
AH3 0
AK4
A27
10 0_ 06
V_REF5V_SU S
1 .5 VS
C558
1U _10V_ X7 R_04
3 VS
5VS
I CH _1 .1VS
R361
B
CQ4 0
2N 39 04
E
10 _0 6
V_R EF5V
C5 41
.1U_ 10 V_X7R _0 4
1 .5 VS
L6 6
VCC SATA_ PLL _I CH
HC B16 08 KF-1 21 T25_06
C532
10 U_6. 3V_X5 R_ 08
1 .5 VS
L6 4
VCC DMI_PLL _I CH
HC B16 08 KF-1 21 T25_06
C5 04
L 87
AH2 8
AJ3 0
CQ4 1
2N 39 04
E
V_ 1P0 5_ VCC AUX
AC1 4
AC1 5
AC1 6
V_C PU_IO_1
V_C PU_IO_2
VCC 3_3_ 08
VCC 3_3_ 09
VCC 3_3_ 10
VCC 3_3_ 11
VCC 3_3_ 12
VCC 3_3_ 13
VCC 3_3_ 14
VCC 3_3_ 15
VCC 3_3_ 16
1 .1 VS
.1 U_10 V_X7R _0 4
C5 13
4. 7U _6 .3 V_0 6
H CB1 00 5KF-121T20 _0 4
A2
B1
B9
G1 1
G3
H7
J2
K8
L8
C 74 4
C 74 5
1 .5 VS
R TC VCC
L6 5
HC B16 08 KF-1 21 T25_06
1 U_ 6. 3V_ X5 R_04
. 1U _1 0V_ X7R_ 04
GLCI _PL L
C5 26
C525
C514
1U _6 .3V_0 4
.1U_ 10 V_X7 R_ 04
10 U_6. 3V_X5 R_ 08
3VS
3VS
3VS
VC CL AN3_3_1
VC CL AN3_3_2
VC CSU S3_3_07
VC CSU S3_3_08
VC CSU S3_3_09
VC CSU S3_3_10
VC CSU S3_3_11
VC CSU S3_3_12
VC CSU S3_3_13
VC CSU S3_3_14
VC CSU S3_3_15
VC CSU S3_3_16
VC CSU S3_3_17
VC CSU S3_3_02
VC CSU S3_3_03
VC CSU S3_3_04
VC CSU S3_3_05
VC CSU S3_3_06
L8 5
1. 5VS
3V
VC CD MI _1
VC CD MI _2
VC C1 _5 _A_ 09
VC C1 _5 _A_ 10
VC C1 _5 _A_ 11
VC C1 _5 _A_ 12
VC C1 _5 _A_ 13
VC C1 _5 _A_ 14
VC C1 _5 _A_ 15
VC C1 _5 _A_ 16
VC C1 _5 _A_ 17
VC C1 _5 _A_ 18
VC C1 _5 _A_ 01
VC C1 _5 _A_ 02
VC C1 _5 _A_ 03
VC C1 _5 _A_ 04
VC C1 _5 _A_ 05
VC C1 _5 _A_ 06
VC C1 _5 _A_ 07
VC C1 _5 _A_ 08
VC CR TC
VCC SUS1_1_1
VCC SUS1_1_2
VC CC L1_1
VCC SUS1_5_1
VCC SUS1_5_2
A12
B12
U1
U2
U3
U5
U6
U7
U8
V8
W7
W8
Y8
V_ 3P3 _C L_ R
R 35 5
0 _0 4
C2 00
C2 16
C209
C1 71
C2 04
C176
.1U_ 10 V_X7R _0 4
1U _6 .3V_X5R _0 4
. 1 U_ 10V_X7R _04
1U _6 .3 V_X5R _0 4
10 U_6. 3V_X5 R_ 08
3V
1 .5 VS
C2 15
10 U_6. 3V_X5R _08
V_ 1P5 _I CH
C1 81
C205
C1 79
C5 15
C517
.1 U_ 10V_X7R _04
*1U _6 .3V_X5R _04
.1U_ 10 V_X7R _ 04
.1 U_10 V_X7R _0 4
.1U_ 10 V_X7R _0 4
4. 7U _6.3 V_0 6
A17
B20
C2 0
E17
H1 5
3V
A22
RTCVC C
AC7 Z1701
H1 7 Z1702 C 22 1 *. 1U _1 0V_ X7R_ 04
C 18 8 *. 1U _1 0V_ X7R_ 04
A23 V_1P1 EP_I NT
C2 25
C 180
C196
C2 23
C2 02
C203
AK27
AH 29
AJ4
AF3
B27
I CH _1 .1 VS
C 524
. 1U _1 0V_X7R_ 04
C1 66
C1 93
C161
C1 68
C1 83
1 .5 VS
B - 18 ICH10 Power/GND
MATER IAL = I C
C1 63
6,1 2, 13 ,1 5, 16,2 0, 24 ,2 6, 29.. 32 ,40, 41,4 3 3 V
7. .9 ,1 2, 13,1 5, 16 ,1 8. .3 0, 32 ,39, 41,4 3 3 VS
12 ,18, 20 .. 23 ,27, 29 .. 31,4 3 5VS
U 1L B
C1 62
C165
C1 60
C1 97
C174
.1 U_ 10V_X7R _04
1U _6 .3 V_X5R _0 4
10 U_6. 3V_X5R _08
.1 U_10 V_X7R _0 4
1U _6.3 V_X5R _0 4
10 U_ 6. 3V_ X5 R_08
VSS_099
VSS_0 99
VSS_0 98
VSS_0 97
VSS_0 96
VSS_0 95
VSS_0 94
VSS_0 93
VSS_0 92
VSS_0 91
VSS_0 90
VSS_0 89
VSS_0 88
VSS_0 87
VSS_0 86
VSS_0 85
VSS_0 84
VSS_0 83
VSS_0 82
VSS_0 81
VSS_0 80
VSS_0 79
VSS_0 78
VSS_0 77
VSS_0 76
VSS_0 75
VSS_0 74
VSS_0 73
VSS_0 72
VSS_0 71
VSS_0 70
VSS_0 69
VSS_0 68
VSS_0 67
VSS_0 66
VSS_0 65
VSS_0 64
VSS_0 63
VSS_0 62
VSS_0 61
VSS_0 60
VSS_0 59
VSS_0 58
VSS_0 57
VSS_0 56
VSS_0 55
VSS_0 54
VSS_0 53
VSS_0 52
VSS_0 51
VSS_0 50
VSS_0 49
VSS_0 48
VSS_0 47
VSS_0 46
VSS_0 45
VSS_0 44
VSS_0 43
VSS_0 42
VSS_0 41
VSS_0 40
VSS_0 39
VSS_0 38
VSS_0 37
VSS_0 36
VSS_0 35
VSS_0 34
VSS_0 33
VSS_0 32
VSS_0 31
VSS_0 30
VSS_0 29
VSS_0 28
VSS_0 27
VSS_0 26
VSS_0 25
VSS_0 24
VSS_0 23
VSS_0 22
VSS_0 21
VSS_0 20
VSS_0 19
VSS_0 18
VSS_0 17
VSS_0 16
VSS_0 15
VSS_0 14
VSS_0 13
VSS_0 12
VSS_0 11
VSS_0 10
VSS_0 09
VSS_0 08
VSS_0 07
VSS_0 06
VSS_0 05
VSS_0 04
VSS_0 03
VSS_0 02
VSS_0 01
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
C189
*.1U_ 10 V_X7R _0 4
1U _6 .3 V_X5R _0 4
10 U_6. 3V_X5R _08
.1 U_10 V_X7R _0 4
*1U _6 .3 V_X5R _0 4
10 U_ 6. 3V_ X5 R_08
5OF6
IC H1 0R
43 IC H_ 1. 1VS
4, 24 ,3 0, 31 ,39. .4 1, 43 .. 45 5V
1 0. .1 3, 19 ,4 1, 43 1. 1VS
11 ,1 3, 15 ,29, 32 ,4 1, 43 1. 5VS
4 ,5 ,1 5, 18,3 9, 44 CPU _VTT
ICH10
R EV = 0.7 2
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
.1 U_ 10V_X7R _04
1U _6 .3 V_X5R _0 4
10 U_6. 3V_X5R _08
.1 U_10 V_X7R _0 4
1U _6.3 V_X5R _0 4
10 U_ 6. 3V_ X5 R_08
H1 8 V_1P1 _STBY_ IN T
AD8
. 1U _10V_ X7 R_04
C2 20
H 13
H 19
H2
H 22
H 25
H 26
H 28
H9
J 29
J 30
J6
K26
K28
L2
L 23
L 29
L 30
M14
M16
M26
M28
M6
M8
N 13
N 14
N 15
N 16
N 17
N 18
N 23
N 29
N 30
P12
P13
P14
P15
P16
P17
P18
P19
P2
P26
P28
P6
R 13
R 14
R 15
R 16
R 17
R 18
R 23
R 29
R 30
R8
T12
T13
T14
T15
T16
T17
T18
T19
T2
T29
T5
U 13
U 14
U 15
U 16
U 17
U 18
U 23
V13
V14
V15
V16
V17
V18
V26
V28
V3
V7
W1
W 14
W 16
W 23
W 29
W 30
W5
W6
Y 26
Y 28
Y3
Y7
6 OF6
I CH 10 R
IC
G3 0
G2 9
G2 5
G1 6
F9
F6
F28
F26
F21
F12
E30
E29
E22
E2
E18
E15
D2 8
B8
B5
B28
B25
B22
B2
B19
B17
B14
B11
AK8
AK30
AK29
AK2
AK16
AK14
AK12
AJ8
AJ5
AJ2 6
AJ2 3
AJ2 0
AJ1 6
AJ1 4
AJ1 2
AH8
AH6
AH20
AH2
AH19
AH15
AH13
AG28
AF9
AF7
AF29
AF25
AF23
AF20
AF15
AF13
AE9
AE8
AE6
AE5
AE25
AE19
AE18
AE16
AE15
AE14
AE13
AE12
AE10
AE1
AD9
AD7
AD3
AD22
AD19
AD18
AD16
AD15
AD14
AC8
AC6
AC5
AC30
AC29
AC24
AC12
AC1
AB3
AB28
AB26
AA6
AA5
AA30
AA29
AA1
A30
A1
Schematic Diagrams
Intel Debug Card & Fan Control
CPU FAN CONTROL
Intel Debug Card
5VS_CFAN 5 VS
28
CPU_VTT
4
4
4
4
4
4
4
4
4
H_MBP_ N[7 :0]
H_PRD Y_N
H_PREQ_N
H_TCK
H_TDI
H_TDO
H_TMS
H_TRST_N
CPU_TAPGOOD
H_MBP_ N[7 :0]
H_PRD Y_N
H_PREQ_N
H_TCK
H_TDI
H_TDO
H_TMS
H_TRST_N
CPU_TAPGOOD
3
5
9
11
15
17
H_MBP_ N4
H_MBP_ N5
H_MBP_ N6
H_MBP_ N7
21
23
27
29
33
35
OBSFN _B0
OBSFN _B1
OBSD ATA_B_0
OBSD ATA_B_1
OBSD ATA_B_2
OBSD ATA_B_3
SDATA
SCLK
51
53
SD A
SC L
EXT_ TBG_AK36
4
6
10
12
16
18
OBSFN _C0
OBSFN _C1
OBSD ATA_C_ 0
OBSD ATA_C_ 1
OBSD ATA_C_ 2
OBSD ATA_C_ 3
CK_H_ BCLK_I TP_D N
CK_H_ BCLK_I TP_D P
4 ,1 2,1 6 H_PWR GD
1 2,1 6 ICH _VRM_ PWRGD
H_PWR GD
ICH _VRM_ PWRGD
H_C PU RST#
HWR ST#
4,1 2 H_C PU RST#
4,1 6 HWRST#
22
24
28
30
34
36
R 251
1K_0 4 PRI_ PW RGD _XDP
I CH_VR M_PWRGD R 249
0_0 4 CPU_ HOOK1 _XDP
H_ CPURST#
1K_0 4 FPGA_H_C PURST_ N
R 250
C PU _FON#
FON
VI N
VOUT
VSET
GND
GND
GND
GND
8
7
6
5
R2 33
*0 _04
APE887 2
TCK1
TCK0
TDO
TRSTN
TDI
TMS
VC C_OBS_ AB
VC C_OBS_ CD
H_PREQ_N
H_PRD Y_N
H_MBP_ N0
H_MBP_ N1
H_MBP_ N2
H_MBP_ N3
EXT_ TBG_AK36
1 2 EXT_ TBG_AK36
H_ PWRGD
XDP1
43
44
SDATA
SCLK
CPU_FAN
OBSFN _A0
OBSFN _A1
OBSD ATA_A_0
OBSD ATA_A_1
OBSD ATA_A_2
OBSD ATA_A_3
OBSFN _D0
OBSFN _D1
OBSD ATA_D_ 0
OBSD ATA_D_ 1
OBSD ATA_D_ 2
OBSD ATA_D_ 3
55
57
52
54
56
58
H_ TCK
H_ TDO
H_ TRST_ N
H_ TDI
H_ TMS
5VS
5 VS_ CFAN
J_ CPUFAN1
C38 3
.1U _16 V_ 04
H OOK0
H OOK1
H OOK2
H OOK3
ITPC LK/H OOK4
ITPCLK*/H OOK5
RESET*/H OOK6
DBR*/H OOK7
39
41
45
47
40
42
46
48
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND_ XDP_PRESENT*
1
7
13
19
25
31
37
49
59
2
8
14
20
26
32
38
50
60
CK_H_ BCLK_I TP_D P
CK_H_ BCLK_I TP_D N
FPGA_ H_C PU RST_ N
HWRST#
3
8 520 5-0 300 1
10U _10 V_08
PRI_ PW RGD_ XDP
CPU_H OOK1_ XDP
CPU_TAPGOOD
J _C PUF AN1
1
2
3
C38 5
1
28 C PU _FANSEN
3VS
R1
4 .7K_ 04
C
D2
A
SC S355 V
Sheet 18 of 47
Intel Debug Card &
Fan Control
SYS FAN CONTROL
5VS_SFAN 5 VS
SY S_ FON# 1
2
3
4
28 SY S_ FAN
U 13
FON
VI N
VOUT
VSET
GND
GND
GND
GND
8
7
6
5
SYS_ FON#
R2 34
*0 _04
APE887 2
5VS
*XDP
5 VS_ SFAN
J _SYSFAN 1
10 U_1 0V_08
1
2
3
8 52 05- 030 01
SYS_FANSEN
3
C38 6
C3 84
.1 U_16 V_04
J _SY SFA N1
R2
3VS
*4 .7K_ 04
C
D1
VGA FAN CONTROL
1
A
*SCS3 55V
RAM FAN CONTROL
5VS_VFAN 5VS
28 VGA_ FAN
5VS_RFAN 5 VS
U1 0
VGA_ FON# 1
2 FON
VI N
3 VOUT
4
VSET
GND
GND
GND
GND
8
7
6
5
28 R AM_FAN
APE887 2
U 25
R AM_FON # 1
2
3
4
FON
VI N
VOUT
VSET
GND
GND
GND
GND
R AM_FON#
8
7
6
5
R4 11
*0 _04
APE887 2
VGA_FON #
5VS
R2 30
*0_ 04
5 VS_ RFAN
C58 5
5 VS
5VS_VFAN
C1 78
.1 U_16 V_04
J_VGAFAN1
C3 81
C 382
. 1U_ 16V_0 4
1 0U_ 10V_0 8
1
2
3
85 205 -03 001
10 U_1 0V_08
J _DD RFA N1
28
3VS
R2 32
C
D11
4. 7K_04
R34 9
C
D 23
3
3 VS
3
RAM_FANSEN
J_V GAF AN1
28 VGA_FANSEN
J _DDR FAN 1
1
2
3
8 52 05- 030 01
4.7 K_ 04
1
A
SCS355 V
1
A
SCS35 5V
1 2 ,1 7 ,2 0 ..2 3 , 27 , 29 . .3 1 ,4 3 5 V S
4 ,5 , 15 , 39 , 44 CPU_ V TT
7 .. 9 ,1 2 ,1 3 ,1 5 ..1 7 ,1 9 .. 3 0 ,3 2 ,3 9 ,4 1 ,4 3 3 V S
Intel Debug Card & Fan Control B - 19
B.Schematic Diagrams
4 CK_H _BCL K_ ITP_ DN
4 CK_H _BCL K_ ITP_ DP
7 ..9 ,1 2,1 6,1 9,3 2 SDATA
7. .9, 12, 16 ,19 ,32 SC LK
U 12
C PU_FON # 1
2
3
4
? ? ? ? ? ? ? ? , ? ? QPI? ? ? Intel ? ? ? ?
External Connection
Schematic Diagrams
Clock Generator CV193
C LKVDD
3 VS
L3 2
1
2
HC B20 12 KF-121T30_08
C251
C 243
.1 U_ 16 V_04
C 24 2
C244
10U_ 6. 3V_X5R_08
C 21 2
3 VS
C2 11
.1 U_16V_04
. 1U _1 6V_04
.1 U_ 16V_ 04
U5
. 1U _16V_04
16
9
2
61
39
55
CL KVDD_ IO
L1 9
1
2
HC B20 12 KF-121T30_08
C208
C2 07
.1 U_ 16 V_04
C 21 3
C246
10U _6.3V_X5R_08
C 21 4
C2 45
.1 U_16V_04
. 1U _1 6V_04
12
20
26
45
36
.1 U_ 16V_ 04
. 1U _16V_04
49
B.Schematic Diagrams
R 12 0
3VS
48
Se l_SRC 1_ 25 _2 4. 576 **
C PUT0
C PUC 0
Vdd_PL L3
Vdd_48
Vdd_PC I
Vdd_R EF
Vdd_SR C
Vdd_C PU
C PUT1
C PUC 1
SR CT8 /CPU _ ITPT
SR CC 8 /C PU _ ITPC
Vdd_I O
Vdd_PL L3 _I O
Vdd_SR C_IO
Vdd_SR C_IO
Vdd_SR C_IO
SR CC 0 / D OT96C
SR CT0 / D OT96 T
SRC T1/ 25 MH z0
SRCC 1/ 25MH z1/ 24. 57 6MHz
Vdd_C PU_IO
Sel_SRC 1_25_24.5 76 **
SRCT2/ SATA
SRCC 2/ SATA
1 00 K_04
R121
*100K_0 4
3VS
Sheet 19 of 47
Clock Generator
CV193
SRC T3 / CR #_C
SRC C3 / CR #_D
R165
1 0K_04 PCI 2R
R 543
*10 K_0 4
R168
*1 0K_ 04 PCI 4R
R 544
10 K_04
2
*1 0K_ 04 CK_ PCI F1
R 160
10 K_04
14 .3 1MHz
C2 29
C 233
R545
XTAL I
60
XTAL O
59
X1
1
SR CT4
SR CC 4
Xtal_ In
PC I_Sto p#/ SR CT5
C PU_ Stop#/ SR CC 5
Xtal_ Ou t
SR CT6
SR CC 6
27 P_50V_ 04 27P_ 50 V_04
1. 1VS
16 C K_PW RGD
R 16 9
*1 K_ 04
FSA
R 12 9
1 K_04
FSB
R 12 8
*1 K_ 04
FSC
3VS
R 54 6
1K_04
R 12 2
*10K_0 4
CK_PW RG D_R
FSB
SRC T7/ C R# _F
SRC C7/ C R# _E
56
57
64
63
7.. 9, 12, 16 ,1 8, 32 SCLK
7. .9 ,1 2, 16, 18 ,32 SD ATA
FSA ,F SC ? ? ? , SW C on tr ol
15
19
11
52
8
58
23
29
42
1. 1VS
SR CT9
SR CC 9
C KPW RG D/ PD#
FS_B / Te st Mo de
SRC T1 0
SRC C1 0
SRC T1 1/ CR #_H
SR CC 11/ CR #_G
SCL
SDA
PC I0/ C R# _A
PCI1 /C R# _B
*PCI 2/ SR_EN ABLE
**PC I3/SATA_SEL
PCI 4/ SRC 5_ EN
VSS_I O
Vss _PL L3
Vss _48
Vss _C PU
VSS_PC I
Vss _R EF
Vss _SR C
Vss _SR C
Vss _SR C
PC IF5/ I TP_ EN
USB 48 / FS_A
REF / FS_C / Te st Sel
3VS
Z1903
1 6 PW RGD_PS_BUF
PW RG D_PS_ BUF
R142
*10K_04
Z1 90 4 B
PW RG D_3 V
R6 14
47
46
14
13
17
18
21
22
24
25
3VS
C
Q19
E2N 3904
R16 6
10 K_0 4
C PU
CK_133M_I OH_DP 1 0
CK_133M_I OH_DN 10
IO H
PCI E_C LK_ ROBSO N 3 2
PCI E_C LK_ ROBSO N# 32
PC I E1 X NEW C A RD
PCI E_C LK_ NEWC ARD # 32
PCI E_C LK_ NEWC ARD 32
ROBSON
PCI E_C LK_ WAN 29
PCI E_C LK_ WAN# 29
PC I E1 X W LA N
NEW CAR D_C LKR EQ#
WAN _C LKR EQ # 2 9
27
28
38
37
CK_133M_C PU_D P 4
CK_133M_C PU_D N 4
CK_100M_SATA_ H 1 5
CK_100M_SATA_ L 1 5
SA T A
32
CK_PE_1 00 M_I OH 0_DP 11
CK_PE_1 00 M_I OH 0_DN 11
PC I_St op#
C PU_St op #
R562
R563
0_04
0_04
IC H_ PCI _STP
IC H_ CPU _STP
41
40
44
43
30
31
34
35
33
32
1
3
4
5
6
PC I2R
PC I3R
PC I4R
7
C K_PCI F1
10
FSA
R161
33_04
62
FSC
R127
33_04
R157
R158
R159
33_0 4
33_0 4
33_0 4
Z19 06
B
NEW C A RD _ C LK REQ
W LA N _ CL KR EQ
IO H
PC IE1 6 X C L K
IC H_ PCI _STP 1 6
IC H_ CPU _STP 16
CK_PE_MXM_DP 20
CK_PE_MXM_DN 20
PC I E1 6 X M X M 3 .0
CK_PE_1 00 M_I OH 1_DP 11
CK_PE_1 00 M_I OH 1_DN 11
IO H
CK_PE_1 00 M_I CH _H 15
CK_PE_1 00 M_I CH _L 15
IC H
PCI E_C LK_ JMB 2 5
PCI E_C LK_ JMB# 25
PC I E1 X JM B
PCI E_C LK_ GLAN 26
PCI E_C LK_ GLAN # 2 6
G LA N
PCLK_TPM 29
CK_P_3 3M_I CH 1 6
CK_P_3 3M_SI O 28
T PM
EC
CK_USB_ 48 M_I CH
PC IE1 6 X C L K
15
CK_14M_ IC H 16
R 547
R 548
*47 K_04
47K_0 4
R 549
R 550
*33 K_04
33K_0 4
3VS
PC I3 R
R 167
*10K_04
C
Q18
E2N3 90 4
R 14 3
1K_0 4
H_FSBSEL0
16 PW RGD _3V
51
50
I DTC V193
R170
1K_ 04
R14 4
4.7 K_04
54
53
FSA
For SLG8XP549T
10K_ 04
1. 1VS
R133
*1K_04
3VS
R 13 2
100_04
Z19 02
R13 1
4.7 K_04
Z1901
R130
*10K_04
1 6 PW RGD_PS_BUF
PW RG D_PS_ BUF
Z1 90 5 B
B
C
Q15
E2N 3904
C
Q14
E2N3 90 4
R 12 4
1K_0 4
H_FSBSEL2
16 PW RGD _3V
PW RG D_3 V
R6 15
FSC
FSC
FSB
FSA
CPU
SRC[7..0]
1
0
1
100
100
PCI
USB
33.3 48
DOT
REF
96
14.318
0
0
1
133
100
33.3 48
96
14.318
0
1
1
166
100
33.3 48
96
14.318
0
1
0
200
100
33.3 48
96
14.318
0
0
0
266
100
33.3 48
96
14.318
1
0
0
333
100
33.3 48
96
14.318
1
1
0
400
100
33.3 48
96
14.318
10K_ 04
6, 12, 13 ,15. .1 7, 20 ,24 ,2 6, 29.. 32 ,40,4 1, 43 3V
7 ..9 ,1 2, 13 ,15. .18,20. .3 0, 32,39,41, 43 3VS
10 .. 13 ,17, 41, 43 1. 1VS
B - 20 Clock Generator CV193
CK_P_33M_SIO
C253
*1 0P_50V_04
CK_P_33M_IC H
C252
*1 0P_50V_04
CK_1 4M_I CH
C199
*1 0P_50V_04
CK_U SB_4 8M_IC H
C254
*1 0P_50V_04
Schematic Diagrams
MXM3.0 PCI-E
3V
5VS
E2 -1
E2 -2
E2 -3
R197
E2 -4
10K_04
E2 -5
Q55
2N70 02W
E2 -6
G
E2 -7
R62 0
*0_0 4
1
12, 15,16 ,28, 29 PLTRST#
E2 -8
S
D
MXM1 _SMD
SMD_VGA_ THERM 28
E2 -9
2
28 EC _PCI E_ RST#
E2 -10
E4 -1
Q56
2N70 02W
E4 -2
G
E4 -3
E4 -4
S
D
MXM1 _SMC
SMC_VGA_ THERM 28
E4 -5
J_ MXM1B
E4 -6
E4 -7
15 3
19 CK_ PE_MXM_ DN
E4 -8
15 5 PEX_ REFCLK#
19 CK_ PE_MXM_ DP
PEX_ REFCLK
E4 -9
15 7
E4 -10
15 9 GND
2
R139
0 _04
16 1 RSVD
PRSNT_ R#
MXM_PRESNT# 15, 28
RSVD
4
16 3
LVDS_UCLKN
2 4 LVDS_UCLKN
6
16 5 RSVD
MXM_PWRGD
LVDS_UCLKP
2 4 LVDS_UCLKP
Z2001
8
R141
0 _04
16 7 RSVD
MXM_PWR_EN 2 8
RSVD
10
R140
*0_ 04
16 9
MXM_PWROK 21
2 4 LVDS_UN[ 3:0]
12
17 1 LVDS_UCLK#
2 4 LVDS_UP[3: 0]
14
R145
1 0K_ 04
17 3 LVDS_UCLK
3VS
GND
16
R151
*2. 2K_ 04
17 5
LVDS_UN3
AC/ BATL
18
D
S
17 7 LVDS_UTX3#
LVDS_UP3
20
17 9 LVDS_UTX3
PWR_ LEVEL
D03
GND
22
GQ57
18 1
TH_ALERT#
LVDS_UN2
2N7 002W
24
18 3 LVDS_UTX2#
LVDS_UP2
AC/BATL # 28 ,42
26
R152
0 _04
18 5 LVDS_UTX2
VGATHERM_ALERT# 2 8
GND
LVDS_UN1
28
R146
2.2 K_ 04
18 7
3VS
30
18 9 LVDS_UTX1#
LVDS_UP1
MXM1_ SMD
32
R155
4.7 K_ 04
19 1 LVDS_UTX1
3VS
GND
34
R163
4.7 K_ 04
19 3
LVDS_UN0
MXM1_ SMC
D03
36
19 5 LVDS_UTX0#
LVDS_UP0
38
19 7 LVDS_UTX0
MXM_ BI T_CLK 1 6
GND
40
19 9
MXM_ SDATO 16
22 HDMI_C #2
42
20 1 DP_C_L0 #
MXM_ SYNC 16
22 H DMI_C2
44
20 3 DP_C_L0
HDMI_S1 22
GND
46
20 5
PEG_TXN[15: 0] 11
22 HDMI_C #1
48
PEG_ TXN15C C2 56
.1U _10V_X7R_ 04PEG_TXN15
20 7 DP_C_L1 #
PEG_ TXP[15: 0] 11
22 H DMI_C1
PEG_ TXP15C C2 59
50
.1U _10V_X7R_ 04PEG_TXP1 5
20 9 DP_C_L1
GND
52
21 1
22
HDM
I_C
#0
PEG_ TXN14C C2 64
54
.1U _10V_X7R_ 04PEG_TXN14
21 3 DP_C_L2 #
22 H DMI_C0
PEG_ TXP14C C2 70
56
.1U _10V_X7R_ 04PEG_TXP1 4
21 5 DP_C_L2
GND
58
21 7
22 HDMI_CCL K#
PEG_ TXN13C C2 71
60
.1U _10V_X7R_ 04PEG_TXN13
21 9 DP_C_L3 #
2 2 HDMI _CCLK
PEG_ TXP13C C2 72
62
.1U _10V_X7R_ 04PEG_TXP1 3
22 1 DP_C_L3
GND
64
22 3
22 HDMI_C_ SDA
66
.1U _10V_X7R_ 04PEG_TXN12
22 5 DP_C_AUX#
PEG_ TXN12C C2 74
22 HDMI_C_ SCL
PEG_ TXP12C C2 77
68
.1U _10V_X7R_ 04PEG_TXP1 2
22 7 DP_C_AUX
RSVD
70
22 9
PEG_ TXN11C C2 78
72
.1U _10V_X7R_ 04PEG_TXN11
23 1 RSVD
PEG_ TXP11C C2 82
74
.1U _10V_X7R_ 04PEG_TXP1 1
23 3 RSVD
RSVD
76
23 5
PEG_ TXN10C C2 83
78
.1U _10V_X7R_ 04PEG_TXN10
23 7 RSVD
PEG_ TXP10C C2 87
80
.1U _10V_X7R_ 04PEG_TXP1 0
23 9 RSVD
RSVD
82
24 1
PEG_ TXN9C C2 88
84
.1U _10V_X7R_ 04PEG_TXN9
24 3 RSVD
PEG_ TXP9C C2 92
86
.1U _10V_X7R_ 04PEG_TXP9
24 5 RSVD
RSVD
88
24 7
2 3 EX_DVI_ DATAN[ 5:0]
PEG_ TXN8C C2 93
90
.1U _10V_X7R_ 04PEG_TXN8
24 9 RSVD
2 3 EX_DVI_ DATAP[5: 0]
PEG_ TXP8C C2 96
92
.1U _10V_X7R_ 04PEG_TXP8
25 1 RSVD
GND
EX_DVI_DATAN2
94
25 3
EX_DVI_DATAP2
PEG_ TXN7C C2 97
96
.1U _10V_X7R_ 04PEG_TXN7
25 5 DP_A_L0#
PEG_ TXP7C C3 01
98
.1U _10V_X7R_ 04PEG_TXP7
25 7 DP_A_L0
GND
EX_DVI_DATAN1
100
25 9
EX_DVI_DATAP1
102 PEG_ TXN6C C3 02
.1U _10V_X7R_ 04PEG_TXN6
26 1 DP_A_L1#
104 PEG_ TXP6C C3 04
.1U _10V_X7R_ 04PEG_TXP6
26 3 DP_A_L1
GND
EX_DVI_DATAN0
106
26 5
EX_DVI_DATAP0
108 PEG_ TXN5C C3 05
.1U _10V_X7R_ 04PEG_TXN5
26 7 DP_A_L2#
110 PEG_ TXP5C C3 08
.1U _10V_X7R_ 04PEG_TXP5
26 9 DP_A_L2
GND
112
27 1
23 EX_DVI_CLK#
114 PEG_ TXN4C C3 09
.1U _10V_X7R_ 04PEG_TXN4
27 3 DP_A_L3#
23 EX_DVI_CLK
116 PEG_ TXP4C C3 13
.1U _10V_X7R_ 04PEG_TXP4
27 5 DP_A_L3
GND
118
27 7
23
DVI_DDC_
DA
T
120 PEG_ TXN3C C3 14
.1U _10V_X7R_ 04PEG_TXN3
27 9 DP_A_AUX#
23 DVI_DDC_ CLK
122 PEG_ TXP3C C3 19
.1U _10V_X7R_ 04PEG_TXP3
28 1 DP_A_AUX
15,2 8 MXM_PR ESNT#
PRSNT_L#
124
R2 21
*0_ 04
134
9 1782- 3140M
136 PEG_ TXN2C C3 27
.1U _10V_X7R_ 04PEG_TXN2
138 PEG_ TXP2C C3 30
.1U _10V_X7R_ 04PEG_TXP2
140
142 PEG_ TXN1C C3 32
.1U _10V_X7R_ 04PEG_TXN1
144 PEG_ TXP1C C3 35
.1U _10V_X7R_ 04PEG_TXP1
146
148 PEG_ TXN0C C3 37
.1U _10V_X7R_ 04PEG_TXN0
150 PEG_ TXP0C C3 39
.1U _10V_X7R_ 04PEG_TXP0
152
91 782-3 140M
VIN
VIN
C 198
C2 01
C54 0
C539
C210
C206
C2 19
C21 7
4 .7U_2 5V_08
4. 7U_2 5V_ 08
.1 U_50V_06
.1U _50V_06
.1U_ 50V_06
.1U_5 0V_ 06
.01 U_50V_X7 R_04
.0 1U_50 V_X7R_04
5VRUN
3VRUN
C195
C533
C194
C5 37
C2 38
C376
10U_ 25V_12
*10U_25 V_1 2
10U_25 V_1 2
*10 U_25V_12
4 .7U_2 5V_ 08
4.7 U_25V_08
CLO SE TO M XM PIN E1
C LOSE TO M XM P IN E2
C LOSE TO M X M C ONN.
3V
C3 51
*. 1u_1 6V_ 04
5
PWR _SRC
PWR _SRC
PWR _SRC
PWR _SRC
PWR _SRC
PWR _SRC
PWR _SRC
PWR _SRC
PWR _SRC
PWR _SRC
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PRSNT_R#
WAKE#
PWR_GOOD
PWR_EN
RSVD
RSVD
RSVD
RSVD
PWR_LEVEL
TH_ OVERT#
TH_ ALERT#
TH_PWM
GPIO0
GPIO1
GPIO2
SMB_ DAT
SMB_ CLK
GND
OEM
OEM
OEM
OEM
GND
PEX_ TX15#
PEX_TX15
GND
PEX_ TX14#
PEX_TX14
GND
PEX_ TX13#
PEX_TX13
GND
PEX_ TX12#
PEX_TX12
GND
PEX_ TX11#
PEX_TX11
GND
PEX_ TX10#
PEX_TX10
GND
PEX_TX9#
PEX_TX9
GND
PEX_TX8#
PEX_TX8
GND
PEX_TX7#
PEX_TX7
GND
PEX_TX6#
PEX_TX6
GND
PEX_TX5#
PEX_TX5
GND
PEX_TX4#
PEX_TX4
GND
PEX_TX3#
PEX_TX3
GND
GND
PEX_TX2#
PEX_TX2
GND
PEX_TX1#
PEX_TX1
GND
PEX_TX0#
PEX_TX0
GND
4
3
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
5V
5V
5V
5V
5V
GND
GND
GND
GND
PEX_STD_SW#
VGA_DISABLE#
PNL_PWR_EN
PNL_BL_EN
PNL_BL_PWM
HDMI_CEC
DVI_ HPD
L VDS_DDC_ DAT
L VDS_DDC_ CLK
GND
OEM
OEM
OEM
OEM
GND
PEX_RX15 #
PEX_RX15
GND
PEX_RX14 #
PEX_RX14
GND
PEX_RX13 #
PEX_RX13
GND
PEX_RX12 #
PEX_RX12
GND
PEX_RX11 #
PEX_RX11
GND
PEX_RX10 #
PEX_RX10
GND
PEX_RX9#
PEX_RX9
GND
PEX_RX8#
PEX_RX8
GND
PEX_RX7#
PEX_RX7
GND
PEX_RX6#
PEX_RX6
GND
PEX_RX5#
PEX_RX5
GND
PEX_RX4#
PEX_RX4
GND
PEX_RX3#
PEX_RX3
GND
GND
PEX_RX2#
PEX_RX2
GND
PEX_RX1#
PEX_RX1
GND
PEX_RX0#
PEX_RX0
GND
MX M 3 .0 M OD U L E B O AR D C O N N E CT OR
J_ MXM1A
MXM_RST#
U7
74 AHC1 G08GW
R 189
CLK_REQ#
PEX_RST#
VGA_DDC_DAT
VGA_DDC_CL K
VGA_VSYNC
VGA_HSYNC
GND
VGA_R ED
VGA_GREEN
VGA_ BL UE
GND
LVDS_LCLK#
L VDS_LCL K
GND
L VDS_LTX3#
LVDS_L TX3
GND
L VDS_LTX2#
LVDS_L TX2
GND
L VDS_LTX1#
LVDS_L TX1
GND
L VDS_LTX0#
LVDS_L TX0
GND
D P_D_ L0#
DP_ D_L0
GND
D P_D_ L1#
DP_ D_L1
GND
D P_D_ L2#
DP_ D_L2
GND
D P_D_ L3#
DP_ D_L3
GND
DP_D_AUX#
DP_D_AUX
DP_C_H PD
DP_D_H PD
RSVD
RSVD
RSVD
GND
DP_B_ L0#
DP_B_L0
GND
DP_B_ L1#
DP_B_L1
GND
DP_B_ L2#
DP_B_L2
GND
DP_B_ L3#
DP_B_L3
GND
DP_B_AUX#
DP_B_AUX
DP_ B_H PD
DP_ A_H PD
3V3
3V3
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
210
212
214
216
218
220
222
224
226
228
230
232
234
236
238
240
242
244
246
248
250
252
254
256
258
260
262
264
266
268
270
272
274
276
278
280
1 0K_ 04
3VS
MXM_CLKREQ #
MXM_RST#
CRT_D DC_DAT 23
CRT_D DC_CLK 23
EX_DAC_VSYNC 23
EX_DAC_HSYNC 2 3
EX_DAC_R 2 3
EX_DAC_G 2 3
EX_DAC_B 23
L VDS_LCL KN
L VDS_LCL KP
L VDS_LC LKN
L VDS_LC LKP
24
24
Sheet 20 of 47
MXM3.0 PCI-E
LVDS_LN3
LVDS_LP3
LVDS_LN2
LVDS_LP2
LVDS_LN1
LVDS_LP1
LVDS_LN0
LVDS_LP0
L VDS_LN [3:0 ]
L VDS_LP[3 :0]
24
24
HDMI_ D#2 22
HDMI_ D2 2 2
HDMI_ D#1 22
HDMI_ D1 2 2
HDMI_ D#0 22
HDMI_ D0 2 2
HDMI_ DCLK# 22
HDMI_ DCLK 22
HDMI_ D_SDA 22
HDMI_ D_SCL 22
HDMI_ CHPD 22
HDMI_ DHPD 22
EX_D VI _DATAN5
EX_D VI _DATAP5
EX_D VI _DATAN4
EX_D VI _DATAP4
EX_D VI _DATAN3
EX_D VI _DATAP3
EX_DVI_DATAN[5 :0]
EX_DVI_DATAP[5:0 ]
EX_ DVI _HPD
23
23
23
3VRUN
6,12 ,13, 15.. 17,2 4,26, 29. .32, 40,41 ,43 3V
7 ..9 ,12, 13,1 5..1 9,21. .30 ,32, 39,41 ,43 3VS
12,1 7,18, 21.. 23, 27,29 ..31 ,43 5VS
24, 30, 39.. 42,44 ,45 VI N
21 3VRU N
21 5VRU N
C LO SE TO M XM CO NN.
MXM3.0 PCI-E B - 21
B.Schematic Diagrams
PWR_SRC(10A)--7-20V
5VRUN(2.5A)--5V
3VRUN(1A)--3.3V
11
11
VIN
4A
E1 -1
E1 -2
E1 -3
E1 -4
E1 -5
E1 -6
E1 -7
E1 -8
E1 -9
E1- 10
E3 -1
R2 18
*1 00K_04
E3 -2
EX_ DVI _HPD
E3 -3
E3 -4
E3 -5
E3 -6
E3 -7
E3 -8
5VRUN
E3 -9
E3- 10
1
3
5
7
9
11
13
15
17
R138
0_04 PEX_STD_ SW#
19
21
23
24 ENAVDD
25
24 ENABKL
27
R134
4.3K_04
29
3VS
R136
4.3K_04
31
33
24 DDCC_DAT
35
24 DDCC_CLK
37
39
1 6 MXM_AC _RESET#
41
16 SDATI2
R17 4
0_04 MXMSPDI F- OUT
43
2 7,30 SPDI F- OUT
45
47
PEG_ RXN[15 :0]
PEG_RXN15. 1U_10 V_X7R_04 C273PEG_RXN15 C
49
PEG_ RXP[ 15: 0]
PEG_RXP15. 1U_10 V_X7R_04 C276PEG_RXP15C
51
53
PEG_RXN14. 1U_10 V_X7R_04 C275PEG_RXN14 C
55
PEG_RXP14. 1U_10 V_X7R_04 C280PEG_RXP14C
57
59
PEG_RXN13. 1U_10 V_X7R_04 C281PEG_RXN13 C
61
PEG_RXP13. 1U_10 V_X7R_04 C285PEG_RXP13C
63
65
PEG_RXN12. 1U_10 V_X7R_04 C286PEG_RXN12 C
67
PEG_RXP12. 1U_10 V_X7R_04 C289PEG_RXP12C
69
71
PEG_RXN11. 1U_10 V_X7R_04 C290PEG_RXN11 C
73
PEG_RXP11. 1U_10 V_X7R_04 C294PEG_RXP11C
75
77
PEG_RXN10. 1U_10 V_X7R_04 C295PEG_RXN10 C
79
PEG_RXP10. 1U_10 V_X7R_04 C298PEG_RXP10C
81
83
PEG_RXN9 . 1U_10 V_X7R_04 C300PEG_RXN9C85
PEG_RXP9 . 1U_10 V_X7R_04 C303PEG_RXP9C87
89
PEG_RXN8 . 1U_10 V_X7R_04 C306PEG_RXN8C91
PEG_RXP8 . 1U_10 V_X7R_04 C310PEG_RXP8C93
95
PEG_RXN7 . 1U_10 V_X7R_04 C312PEG_RXN7C97
PEG_RXP7 . 1U_10 V_X7R_04 C316PEG_RXP7C99
1 01
PEG_RXN6 . 1U_10 V_X7R_04 C317PEG_RXN6C
1 03
PEG_RXP6 . 1U_10 V_X7R_04 C320PEG_RXP6C
1 05
1 07
PEG_RXN5 . 1U_10 V_X7R_04 C322PEG_RXN5C
1 09
PEG_RXP5 . 1U_10 V_X7R_04 C326PEG_RXP5C
1 11
1 13
PEG_RXN4 . 1U_10 V_X7R_04 C328PEG_RXN4C
1 15
PEG_RXP4 . 1U_10 V_X7R_04 C331PEG_RXP4C
1 17
1 19
PEG_RXN3 . 1U_10 V_X7R_04 C333PEG_RXN3C
1 21
PEG_RXP3 . 1U_10 V_X7R_04 C336PEG_RXP3C
1 23
1 25
1 33
PEG_RXN2 . 1U_10 V_X7R_04 C338PEG_RXN2C
1 35
PEG_RXP2 . 1U_10 V_X7R_04 C340PEG_RXP2C
1 37
1 39
PEG_RXN1 . 1U_10 V_X7R_04 C341PEG_RXN1C
1 41
PEG_RXP1 . 1U_10 V_X7R_04 C342PEG_RXP1C
1 43
1 45
PEG_RXN0 . 1U_10 V_X7R_04 C343PEG_RXN0C
1 47
PEG_RXP0 . 1U_10 V_X7R_04 C345PEG_RXP0C
1 49
1 51
M X M 3 .0 M O D U L E B O A R D CO N NE C TO R
VIN
MXM 3.0
Schematic Diagrams
MXM PWR, SATA ODD
MXM PWR
VDD3
3VS
R2 06
R208
*1M_04
22K_04
Z2101
MXM_PWR OK
Q 32
*2 N7 002W
G
S
C 368
B.Schematic Diagrams
Q31
*2N7 002W
G
20
R 207
*10 K_04
S
R 205
*1K_04
D
D
MXM_SY S_PWR GD#
5VR UN
*0 .1u_1 6V_ 04
Z2103
3VRU N
R 213
*1K_04
C
Z2102
B
EQ3 3
*2N 3904
C 369
*0 .1u_1 6V_ 04
Sheet 21 of 47
MXM PWR,
SATA ODD
3VS
3VR UN
2A
L 51
HC B2012KF-121 T30 _08
2A
C 360
C3 67
C36 4
C 359
10U _10V_08
.1 U_ 16V_04
.01 U_ 25V_ 04
10U_10V_08
SATA ODD
5VS
5VRU N
3A
L 48
3A
HC B2012KF-121 T30 _08
C 358
C3 48
C34 9
C 350
C7 39
10U _10V_08
*.1 u_16V_ 04
.1U _1 6V_0 4
. 01U_25V_0 4
10U_10V_08
J _OD D1
S1
S2
S3
S4
S5
S6
S7
P1
P2
P3
P4
P5
P6
SATA_TX4_R C 495
SATA_TX#4_R C 494
.1U_10V_X7R _04
.1U_10V_X7R _04
SATA_R X#4 _R C 493
SATA_R X4_ R C 492
.1U_10V_X7R _04
.1U_10V_X7R _04
SATA_R X#4 15
SATA_R X4 1 5
5VS
OD D_DETECT# 16
Z2104
C 18595 -1 00A
C 144
C1 43
C489
C 490
. 1U _16V_0 4
. 1U_ 16V_ 04
1U _10V_06
10U _10 V_08
PI N G N D1 ~4 =GN D
16, 24, 28,31,40, 42, 43,45
6,1 2, 13, 15 .. 17, 20 ,2 4,26, 29. .32, 40, 41,43
7. .9, 12,1 3,1 5. .2 0,22. .30,32, 39, 41,43
20
12, 17, 18 ,2 0,22, 23, 27 ,29.. 31,43
20
B - 22 MXM PWR, SATA ODD
SATA_ TX4 15
SATA_ TX#4 1 5
VDD3
3V
3VS
3VRU N
5VS
5VRU N
+ C 487
1 00U _6 .3V_B2
Schematic Diagrams
HDMI & e-SATA
D 03
3VS
A
C
HDMI
D33
HDMI_C CLK#_C
C715
. 1U _10V_X7R_04
H DMI _C CLK# 20
HDMI_C CLK_C
C714
. 1U _10V_X7R_04
H DMI _C CLK
HDMI_C #1_C
C711
. 1U _10V_X7R_04
HDMI_C 1_C
C710
. 1U _10V_X7R_04
H DMI _C 1 20
HDMI_C #0_C
C713
. 1U _10V_X7R_04
H DMI _C #0 20
HDMI_C 0_C
C712
. 1U _10V_X7R_04
H DMI _C 0 20
HDMI_C #2_C
C709
. 1U _10V_X7R_04
H DMI _C #2 20
HDMI_C 2_C
C708
. 1U _10V_X7R_04
H DMI _C 2 20
J_HDMI 1
C 12807- 119A5- L
L84
Z2211
R490
FCM1608K-121T06
L81
HCB1608KF- 121T25_06
C 719
C 723
*220P_50V_04
16
14
D DC/ CEC GND
17
SCL
15
CEC
13
CLK SH IELD
11
SDA
RESERVED
12
TMDS C LOC K-
HDMI _C LK
10
TMDS C LOC K+
8
HDMI _D ATAN1
6
HDMI _D ATAP1
4
2
TMDS D ATA0SHI ELD0
TMDS D ATA0+
TMDS D ATA1SHI ELD1
TMDS D ATA1+
TMDS D ATA2-
SHI ELD2
Z2210
3VS
9
HDMI_D ATAN0
7
HDMI_D ATAP0
D35
A
R B551 V-30
C
D36
A
R B551 V-30
C
3.3VS_HDMI
R 493
R 494
R 497
R 498
499_1%_04
499_1%_04
499_1%_04
499_1%_04
499_1%_04
499_1%_04
499_1%_04
499_1%_04
5
3
HDMI_D ATAN2
1
HDMI_D ATAP2
5VS
D37
A
RB751V- 40
C
Q 47
2N7002W
5VS_HDMI
G
D03 3/ 2
GN D1
GND GN
2 D1
GND 2
GND3
G ND3
G ND4
GN D4
TMDS D ATA2+
R491
R492
R495
R496
3.3VS_HDMI
20
3.3VS_H DMI
PWRO KI CH 12,15, 16, 23, 24
HDMI _S1
H DMI _S1
H DMI _S2
H DMI _EQ
32
33
34
S1
S2
EQ
H DMI _CLK
H DMI _CLK#
17
18
Y 4(P)
Z4(N)
H DMI _DATAP0
H DMI _DATAN 0
20
21
Y 3(P)
Z3(N)
H DMI _DATAP1
H DMI _DATAN 1
23
24
H DMI _DATAP2
H DMI _DATAN 2
26
27
H DMI _SCL
H DMI _SDA
H DMI _HPD
29
30
31
49
16
R553
0.1U_16V_04
4.7K_04
HDMI_EQ
Sheet 22 of 47
HDMI & e-SATA
U37
VC C
VC C
VC C
VC C
VC C
VC C
VC C
VC C
C740
*2.2K_04
R552
TMD S input equalizat ion select or
EQ =Low: HDMI 1 .3 Comp liant c able
EQ =High: 10m 28AW G H DMI c able
6
12
19
25
40
46
55
61
5VS_HDMI
R551
4.02K_04_1%
48
47
HD MI_ CCLK_C
HD MI_ CCLK#_C
45
44
HD MI_ C0_C
HD MI_ C#0_C
(P)A12
(N )B12
42
41
HD MI_ C1_C
HD MI_ C#1_C
(P)A11
(N )B11
39
38
HD MI_ C2_C
HD MI_ C#2_C
SCL1
SD A1
HPD1
37
36
35
HD MI_ C_SC L
HD MI_ C_SD A
HD MI_ CHPD
HD MI _C_SC L 20
HD MI _C_SD A 20
HD MI _CH PD 20
63
62
HD MI_ DCLK
HD MI_ DCLK#
HD MI _DC LK 20
HD MI _DC LK# 20
60
59
HD MI_ D0
HD MI_ D#0
HD MI _D0 20
HD MI _D#0 20
(P)A14
(N )B14
HDM I
POR T1
(P)A13
(N )B13
Y 2(P)
Z2(N)
(P)A24
(N )B24
Y 1(P)
Z1(N)
HDM I
(P)A23
(N )B23
POR T2
(P)A22
(N )B22
57
56
HD MI_ D1
HD MI_ D#1
HD MI _D1 20
HD MI _D#1 20
(P)A21
(N )B21
54
53
HD MI_ D2
HD MI_ D#2
HD MI _D2 20
HD MI _D#2 20
SCL2
SD A2
HPD2
52
51
50
HD MI_ D_SC L
HD MI_ D_SD A
HD MI_ DHPD
HD MI _D_SC L 20
HD MI _D_SD A 20
HD MI _DH PD 20
SC L_SI NK
SD A_SINK
H PD_SIN K
VD D
VSADJ
TMDS251
e-SATA
R483
15
15
C700
.0 1U_16V_X7R _04
SA TA_TX#5
C701
.0 1U_16V_X7R _04
1
R484
R485
C702
.0 1U_16V_X7R _04
4
C703
.0 1U_16V_X7R _04
15 SA TA _RX#5
1 5 S ATA _RX5
0_04
2
0_04
0_04
SATA_TX#3_R
3
SATA_RX#3_R
1
GND1
2
TXP
3
4
SATA_RX3_R
1
2
L83
*W CM2012F2S-161T03
R 486
HDMI SWITCH
J _ESATA1
L8 2
*WC M2012F2S-16 1T03
SATA_TX3_R
4
3
SA TA_TX5
5
6
7
3. 3VS_HD MI
TXN
3.3VS_HDMI
C741
0.1U_16V_04
C742
0. 1U_16V_04
GND2
R554
R555
4.7K_ 04
4.7K_ 04
HD MI_S1
HD MI_S2
R556
R557
R558
R559
2.2K_ 04
2.2K_ 04
2.2K_ 04
2.2K_ 04
HD MI_D_SC L
HD MI_D_SD A
HD MI_C_SC L
HD MI_C_SD A
C743
0. 1U_16V_04
RXN
RXP
GND3
0_04
PSABT5-07MNBS1NN 2N0
PI N GN D1~4=GN D
7.. 9,12,1 3, 15. .21,23. .30,32,39,41, 43 3VS
12, 17,18,20,21, 23, 27, 29..31, 43 5VS
6,12,13,15.. 17,20 ,24,26, 29. .32,40,41, 43 3V
HDMI & e-SATA B - 23
B.Schematic Diagrams
HDMI _C LK#
HDMI_SC L
GN D
GN D
GND
G ND
GN D
GND
GND
HDMI_SD A
HOT PLU G DETECT
+5V
HD MI_HPD_R
3
9
15
22
28
43
58
18
19
D
*22U_6.3V_08 .1U_16V_04 . 1U _16V_04
20
H DMI _C #1 20
1K_04
D0 3
S
C722
D03
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
C707
HDMI_H PD
1
2
4
5
7
8
10
11
13
14
64
5VS_HD MI_ PWR
.
D3 4
SCS751V-4 0
A
C
.
5VS
AC
*BAV99
Schematic Diagrams
DVI-I
3VS
A
C
A
C
*0. 1U _16 V_0 4
A
C 74 7
C
3VS
U 38
10
2 0 C RT_DD C_ CL K
2 0 D VI_ DDC _C LK
C RT_DD C_ CL K
D VI_DDC _C LK
C RT_DET#
5
8
7
VC C
0B1
1B1
A1
GN D
S1
*PI 5A3 15 8
1
3
D1 6
BAV99
VGA_ DD C_ DATA
2 0 EX_D AC _R
9
4
6
D 12
BAV9 9
2 0 EX_D AC _G
VGA_ DD C_ CL K
2 0 EX_D AC _B
D3 BAV9 9
AC
A0
GN D
S0
12
EX_D AC_R
L57
EX_D AC_G
L56
EX_D AC_B
L3
FRED
FCM16 08 K-121 T06
FCM16 08 K-121 T06
FGR N
FCM16 08 K-121 T06
FBLU E
C 405
R 23 7
R2 36
R4
C4 15
1 50 _1 %_0 4
15 0_ 1%_ 04
1 50 _1 %_04
22 P_5 0V_0 4 2 2P_ 50 V_ 04
C 38 8
C3 87
C6
C7
2 2P_ 50 V_ 04 22 P_5 0V_0 4 2 2P_50V_ 04
D 03
22 P_50 V_0 4
PLEASE CLOSE TO CONNECTOR
C RT_D DC_ DAT
R5 90
*0_04
VGA_ DDC _D ATA
C RT_D DC_ CL K
R5 91
*0_04
VGA_ DDC _C LK
5 VS_D VIPWR
5VS_D VIPW R
S
EX_D AC_VSY NC
S
S
D
R1 1
4 .7K_ 04
LP1
1
2
3
4
DD C_ DATA_ R
VSYN C_R
D
Q2
2 N7 002 W HSY NC_ R
D
G
Q1
2N 70 02 W
G
R1 2
8
7
6
5
FCA3 21 6KF4 -12 1T03
A
5 VS
D5
BAV99
5 VS
5VS
D1 4
*BAV9 9
5 VS
AC
A
R 23 8
TX2 N
TX2 P
L58
Z23 03
20 EX_D VI_ HPD
2 0 EX_D VI _D ATAN [5 :0]
D 03 3/ 3
TX0 N
TX0 P
EX_D VI_ DATAN 1
EX_D VI_ DATAP1
C4 7
C4 6
. 1U _1 0V_ X7R _0 4
. 1U _1 0V_ X7R _0 4
TX1 N
TX1 P
EX_D VI_ DATAN 2
EX_D VI_ DATAP2
C4 3
C4 2
. 1U _1 0V_ X7R _0 4
. 1U _1 0V_ X7R _0 4
TX2 N
TX2 P
EX_D VI_ DATAN 3
EX_D VI_ DATAP3
C3 9
C3 8
. 1U _1 0V_ X7R _0 4
. 1U _1 0V_ X7R _0 4
TX3 N
TX3 P
EX_D VI_ DATAN 4
EX_D VI_ DATAP4
C3 0
C2 4
. 1U _1 0V_ X7R _0 4
. 1U _1 0V_ X7R _0 4
TX4 N
TX4 P
EX_D VI_ DATAN 5
EX_D VI_ DATAP5
C3 1
C2 9
. 1U _1 0V_ X7R _0 4
. 1U _1 0V_ X7R _0 4
TX5 N
TX5 P
C1 3
C9
. 1U _1 0V_ X7R _0 4
. 1U _1 0V_ X7R _0 4
TXC P
TXC N
R3 0
R2 4
R1 9
R1 5
R2 9
R2 8
R2 3
R2 1
R2 7
R2 6
R2 0
R1 6
R1 3
R7
499 _1 %_0 4
499 _1 %_0 4
499 _1 %_0 4
499 _1 %_0 4
499 _1 %_0 4
499 _1 %_0 4
499 _1 %_0 4
499 _1 %_0 4
499 _1 %_0 4
499 _1 %_0 4
499 _1 %_0 4
499 _1 %_0 4
499 _1 %_0 4
499 _1 %_0 4
Q3 5
*2N 700 2W
C8
2 20 P_5 0V_0 4
D 15
*BAV99
5VS
5 VS_D VIPWR
FR ED
FGRN
FBL UE
H SYN C
VSY NC
D DC DATA
D DC LK
C1
C2
C3
C4
8
7
6
TX5 N
TX5 P
Z23 20
+5V POW ER
DATA 2DATA 2+
2/ 4 Shield
DATA 4DATA 4+
DATA 1DATA 1+
DATA 1/ 3 Shie ld
DATA 3DATA 3+
TXC P
TXC N
Z2 30 4
TX0 N
TX0 P
RED
GR EEN
BLU E
H SYN C
V SY NC
DD C Da ta
DD C Clk
D SUB
CASE
CASE
GN D
GN D
14
2 0 EX_ DVI _C LK
2 0 EX_ DVI _C LK#
S
0_ 06
7. .9 ,1 2,1 3, 15 .. 22 ,2 4.. 30 ,3 2, 39 ,4 1,4 3 3 VS
1 2, 17 ,1 8, 20 ..2 2, 27 ,2 9. .3 1,4 3 5 VS
6 ,1 2, 13 ,15 .. 17 ,2 0, 24 ,26 ,2 9. .3 2, 40 ,41 ,4 3 3 V
B - 24 DVI-I
3VS
R59 4
10 0K_ 04
CRT_D ET#
A
SCS7 51V-40
M1
M2
C5
C6
K-QH 11 2X-D JTX
G
C
C 429
. 1U_ 16 V_0 4
R2 48
1 2,1 5, 16 ,2 2, 24 PW RO KIC H
5 VS
D 18
DVI
GN D (AN ALOG )
HOT PLU G DETEC T
TMDS DATA 0TMDS DATA 0+
TMDS DATA 0/ 5 Shie ld
TMDS DATA 5TMDS DATA5+
TMDS CL K Shie ld
TMDS CL K +
TMDS Clk -
TX3 N
TX3 P
TX2N
TX2P
TX4N
TX4P
TX1N
TX1P
TX3N
TX3P
TX0N
TX0P
TX5N
TX5P
TXCP
TXCN
2 20 P_5 0V_0 4
H SYNC
15
16
17
18
19
20
21
22
23
24
*220 P_5 0V_ 04
D
. 1U _1 0V_ X7R _0 4
. 1U _1 0V_ X7R _0 4
2 20 P_5 0V_0 4
C1 0
TMDS
TMDS
TMDS
TMDS
TMDS
TMDS
TMDS
TMDS
TMDS
TMDS
TX4 N
TX4 P
TX1 N
TX1 P
C 42 5
C4 5
C4 4
2 20 P_5 0V_0 4
C1 4
VSY NC
1
2
3
4
5
9
10
11
12
13
FC M1 60 8K-1 21 T0 6
1 K_0 4
EX_D VI_ DATAN 0
EX_D VI_ DATAP0
C1 9
D DC DATA
J_D VI1
D1 7
BAV99
2 0 EX_D VI _D ATAP[ 5: 0]
D DC LK
D 03
3VS
C
D4
BAV99
AC
EX_D AC_ HSYN C
VGA_D DC _DATA
EX_D AC_HSYN C
4. 7K_ 04
4. 7K_0 4
G
C
20
EX_D AC_ VSYNC
D
A
20
S
R2 5
4 .7 K_0 4
AC
VGA_D DC _CL K
R 22
Q3
2 N7 002 W DD C_ CLK_ R
C
D0 3
5 VS
Q4
2N 70 02 W
G
A
VGA_ DDC _C LK
C
VGA_ DDC _D ATA
0 _04
AC
0 _04
R5 93
3 VS
A
R5 92
D VI_ DD C_C LK
4. 7K_ 04
AC
D VI_ DD C_D AT
4. 7K_ 04
R 19 0
C
Sheet 23 of 47
DVI-I
R 19 3
.
B.Schematic Diagrams
H: DVI Plug-In
L: CRT Plug-In
VC C
0B0
1B0
AC
2
11
AC
C RT_DD C_ DAT
D VI_DDC _D AT
.
.
.
2 0 C RT_DD C_ DAT
2 0 D VI_ DDC _D AT
R5 95
1 K_0 4
R5 96
*0 _0 6
Schematic Diagrams
LCD, INT
LC DVC C
SY S15 V
. 1U _1 6V_ 04
T XOUT-L N0
T XOUT-L P0
2
Z2 40 3
Z2 40 4
3
C
Q22
2 N7 00 2W
E
G
Q24
D
D
D
D
C346
T XOUT-L N1
T XOUT-L P1
6
.1 U_ 16 V_0 4
5
2A
4
G
S
SI 34 56 BDV- T1-E3
C 33 4
R1 85
. 01 U_ 25 V_0 4
*10 0K_ 04
T XOUT-L N2
T XOUT-L P2
LC DVC C
R1 86
R1 88
10 0_ 1%_ 06
*20 0_1%_ 06
T XOUT-L N3
T XOUT-L P3
T XCL K-L N
T XCL K-L P
Z24 02
D
S
20 EN A V DD
1
1 M_ 04
D
Q 25
D TC 11 4EU A
B
R 19 1
1 M_ 04
C 28 4
JL CD 1
SY S15 V
R 19 2
L CD VCC -R
L4 1
L CD VCC -R
HC B20 12 KF-1 21 T30 _0 8
C 27 9
3V
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
. 1U _1 6V_ 04
V_EDID
R 164
T XOUT -UN0
T XOUT -UP 0
2 20 _0 8
T XOUT -UN1
T XOUT -UP 1
T XOUT -UN2
T XOUT -UP 2
T XOUT -UN3
T XOUT -UP 3
D 03
T XC LK-UN
T XC LK-UP
C 22 8 *. 1U _1 6V_ X7 R_ 06
INT MIC
INT MIC 27
S
20 DD CC _DA T
20 DD CC _CLK
3VS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
8 72 16 -4 00 0
VI N
Sheet 24 of 47
LCD, INT
C 17 3 . 1U _5 0V_ Y5V_0 6
30 mil
1 00 K_0 4
14
R 17 8
14
5V
U 6A
1
1 6 SB_ BLON
5V
*. 1U_10 V_X7R _0 4
28,31 B T_EN
28,29 W LA N _EN
6
5
14
7 4L VC0 8PW
7
7
7 4L VC0 8PW
Z2 40 5
U 6C
28 ,3 0 L ID _SW #
12
1 2, 15 ,1 6, 22,2 3 PW RO KIC H
13
PANEL _EN
Z2 40 6 10
T XOUT -LN0
L 40
0 _0 6L VDS_LN0
R1 84
C3 18
T XOUT -LP 0
L 38
0 _0 6L VDS_LP 0
*1M_0 4
*10 0P_ 50 V_0 4
T XOUT -LN1
L 36
0 _0 6L VDS_LN1
L VDS_L N1 20
T XOUT -LP 1
L 34
0 _0 6L VDS_LP 1
L VDS_L P1 20
T XOUT -LN2
L 31
0 _0 6L VDS_LN2
T XOUT -LP 2
L 30
0 _0 6L VDS_LP 2
L VDS_L P2 20
T XOUT -LN3
L 29
0 _0 6L VDS_LN3
L VDS_L N3 20
T XOUT -LP 3
L 27
0 _0 6L VDS_LP 3
T XCL K-LN
L 25
0 _0 6L VDS_LC LKN
T XCL K-LP
L 23
0 _0 6L VDS_LC LKP
T XOUT -UN0
L 39
0 _0 6L VDS_UN0
T XOUT -UP0
L 37
0 _0 6L VDS_UP0
T XOUT -UN1
L 35
0 _0 6L VDS_UN1
T XOUT -UP1
L 33
0 _0 6L VDS_UP1
T XOUT -UN2
L 28
0 _0 6L VDS_UN2
T XOUT -UP2
L 26
0 _0 6L VDS_UP2
T XOUT -UN3
L 24
0 _0 6L VDS_UN3
T XOUT -UP3
L 22
0 _0 6L VDS_UP3
T XCL K-UN
L 21
0 _0 6LVDS_ UC LKN
T XCL K-UP
L 20
0 _0 6L VDS_UCL KP
7 4L VC 08 PW
U 6D
7
14
5V
11
7
7 4L VC0 8PW
VDD 3
VD D3
R 11 8
R1 26
1 0K_ 04
10 K_0 4
D
LED _BAT_FU LL
D
L ED_ BAT_ CH G
28 LED _BA T_FULL#
G
S
G
Q1 7
2N 70 02 W
S
Q 13
2 N7 00 2W
J LED 1
1
2
3
4
5
6
7
8
9
10
11
12
8 52 05 -1 20 0
9
8
2 0 EN ABKL
28 LED _BA T_C HG#
VD D5
L ED_B AT _CHG
L ED_B AT _FULL
B T _EN
W LAN_E N
L ED_P WR
L ED_AC IN
C 299
U 6B
3 Z240 7 4
2
2 8 BKL _EN
B RIGHT NESS
P ANEL _EN
28 B RIGHT NESS
VDD 3
VD D3
C2 18
R 12 5
R1 17
1 0K_ 04
10 K_0 4
C2 24
C2 32
C2 48
C 25 7
C 22 6
C 23 4
C 23 9
C 24 9
L VDS_L N0 20
L VDS_L P0 20
L VDS_L N2 20
L VDS_L P3 20
L VDS_L CL KN 20
L VDS_L CL KP 20
L VDS_UN0 20
L VDS_UP 0 20
L VDS_UN1 20
L VDS_UP 1 20
L VDS_UN2 20
L VDS_UP 2 20
L VDS_UN3 20
L VDS_UP 3 20
LVDS_UCLKN 2 0
L VDS_UC LKP
20
C 25 8
10 P_5 0V_ 04
10 P_5 0V_ 04
1 0P_ 50 V_0 4
1 0P_ 50 V_0 4
1 0P_ 50 V_0 4
10 P_5 0V_ 04
10 P_5 0V_04
1 0P_ 50 V_04
1 0P_ 50 V_0 4
1 0P_ 50 V_0 4
C2 22
C2 27
C2 35
C 25 0
C 26 5
C 231
C 23 7
C 24 1
C 25 5
C 26 6
10 P_5 0V_ 04
10 P_5 0V_ 04
1 0P_ 50 V_0 4
1 0P_ 50 V_0 4
1 0P_ 50 V_0 4
10 P_5 0V_ 04
10 P_50 V_0 4
1 0P_ 50 V_0 4
10P_ 50 V_0 4
1 0P_ 50 V_04
28 LED _PW R#
Q1 2
2N 70 02 W
G
S
Q 16
2 N7 00 2W
G
S
28 LED _A CIN #
D
LED _PW R
D
L ED_ ACI N
VDD 5 3 0, 31 ,4 3, 45
SY S1 5 V 4 3 ,4 5
3V 6 ,1 2, 13 ,1 5. .1 7, 20 ,2 6, 29 .. 32 ,4 0, 41, 43
3 VS 7 .. 9 ,1 2 , 1 3 ,1 5 . .2 3 , 2 5 .. 3 0 ,3 2 ,3 9 , 4 1 ,4 3
VDD 3 1 6, 21 ,2 8, 31 ,4 0, 42 ,4 3, 45
5VS 1 2, 17 ,1 8, 20 .. 23 ,27, 29 .. 31 ,4 3
VI N 2 0 , 3 0 ,3 9 . .4 2 , 4 4 ,4 5
5V 4 ,1 7, 30 ,3 1, 39 .. 41 ,4 3. .4 5
LCD, INT B - 25
B.Schematic Diagrams
Q2 1
2N 70 02 W
G
7/13
M odify C4 from 0.1uF change to
0.01uF for LV DS power time.
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
Schematic Diagrams
G ND 2
S H 2 G ND 1
SH 1
Card Reader/1394
4
2
TPA
TPA#
TPB
TPB#
3
1
4
3
2
1
J _1
Z2 50 1 R 229
Z2 50 2 R 228
Z2 50 3 R 227
Z2 50 4 R 226
EM I
56 _0 4
R 46 7
56 _0 4
R 46 9
Z251 0
R 46 8
0 _04
0 _04
0 _04
0 _04
1 394_ TPA0 +
1 394_ TPA0 1 394_ TPB0 +
1 394_ TPB0 -
56 _0 4
MDIO3 SD-DATA3 MS-DATA3
4. 99 K_1 %_0 4
C 67 8
22 0P_ 50V_0 4
Note:
Close to
JMB380
C R_ TAV33
2 0P_ 50 V_0 4
R 46 5
Note:
Close
to
JMB380
1 2K_ 04
C6 86
.1 U_ 16 V_0 4
.1 U_ 16V_0 4
D 03 3 /2
C R_ TAV3 3
C 71 7
. 1U _1 6V_ 04
MDI O3
MDI O2
MDI O1
MDI O0
15, 26 ,3 2 BU F_PL T_RST#
DV18
TXIN
TXOU T
MD IO7
MD IO6
MD IO5
MD IO4
DV33
MD IO3
MD IO2
MD IO1
MD IO0
T R EXT
T P B I A S _1
T PA1 P
T PA1 N
T PB1 P
T PB1 N
T A V 33
M DI O8
M DI O9
M DI O1 0
M DI O1 1
M DI O1 2
1 39 4_ XI
1 39 4_ XO
MDI O7
SD WP
MDI O5
MDI O4
37
38
39
40
41
42
43
44
45
46
47
48
30 mil
C6 75
C6 74
.1 U_ 16 V_0 4
.1 U_16 V_0 4
JM B3 80
VC C_ CAR D
P VT
24
23
22
21
20
19
18
17
16
15
14
13
TC PS R4 74
MD IO13
MD IO14
CR 1_ LED N
D0 3 3/ 2
10 K_0 4
CR _TAV33
CR _APVD D
CAR D_ PWR EN#
SD_ CD #
MS_ IN S#
C7 04
C7 05
VC C_ CAR D
.1 U_16 V_0 4
.1 U_ 16 V_0 4
J _C R1
JMB38 0- QGAZ0B
CAR D_ PWR EN#
CAR D_PWR EN#
30
R 48 8 22_ 04
MDI O5
QFN-48
.1 U_ 10V_X7R _0 4
.1 U_ 10V_X7R _0 4
SD _C D#
SD WP
SD /MS_C LK
MDI O4
MS_I NS#
PE4_ RX_J MB# 15
PE4_ RX_J MB 1 5
CR _APVD D
25mil
. 1U _16V_ 04
10U _10V_ 08
C 72 6
1 00 0P _ 50V _ 04
C 72 4
C7 29
PE4 _TX_ JMB# 1 5
PE4 _TX_ JMB 15
C728
C7 25
.0 1U _2 5V_ 04 .1U_ 16V_0 4
10 U_ 10 V_0 8
R5 01
MD IO 14
R4 76
200 K_0 4
MD IO 12
R4 70
200 K_0 4
CR _TEST
R5 00
0_0 4
AP REX T:12mil
VCC _C ARD
8. 2K_ 1%_ 04
VCC _C ARD
C 72 1
. 1U _1 6V_ 04
R 48 2
10K_ 04
SD WP
R 47 5
10K_ 04
MDI O1 3
Near Cardreader CONN
MOID14
D 03 3 /2
C R_ TAV3 3
B - 26 Card Reader/1394
MOID12
SD _C D#
R 48 7
4.7K_0 4
R 48 9
4.7K_0 4
MS_I NS#
R 48 1
10K_ 04
MDI O7
H i: on-board
Low : on
A dd-in c ard
MS-SCLK
30 mil
2
C R_APVDD
C 72 7
MS-BS
SD-CLK
U 34
Z25 05 C7 18
Z25 06 C7 20
1 9 PC IE_ CL K_J MB#
1 9 PC IE_ CL K_J MB
SD-CMD
MDIO5
S1
1
C ARD _PW REN #
SH OR T_ 1MM
TCPS
MDI O1 3
MDI O1 4
C R_LED N
DV3 3
REG_C TR L
DV1 8
C R1 _PC TL N
C R1 _C D0 N
C R1 _C D1 N
SEEC LK
SEED AT
1
C R_ T E S2T
3
4
5
6
A P R EX T7
8
9
10
11
12
. 1U _1 6V_ 04
XR ST N
XT EST
A P C LK N
A P C LK P
APVD D
A P G ND
A P RE X T
A P RX P
A P RX N
A P V 18
APT XN
APT XP
C 69 7
HC B20 12KF-1 21 T3 0_ 08
C6 84
36
35
34
33
32
31
30
29
28
27
26
25
C R_ APVDD
T R EXT
1 39 4_ T P B IA S 0
1 39 4_ T P A 0+
1 39 4_ T P A 01 39 4_ T P B 0+
1 39 4_ T PB 0 -
2
C 69 9
MDIO4
3VS
L8 0
.
X4
2 4. 57 6MHz
Sheet 25 of 47
Card Reader/1394
MDIO1 SD-DATA1 MS-DATA1
2 0P_ 50 V_0 4
1 M_ 04
1 39 4_ XO
MS Card
MDIO2 SD-DATA2 MS-DATA2
56 _0 4
1
C 69 8
R 47 7
SD Card
MDIO0 SD-DATA0 MS-DATA0
R 45 6
D 03 3 /3
1 39 4_ XI
.3 3U _1 6V_ Y5 V_0 6
R 46 6
13 94 _TPA0+
13 94 _TPA01 39 4_ TPB0 +
13 94 _TPB0-
Note:
Close to
CON
AF4MS0 04 K0
B.Schematic Diagrams
C 680
1 39 4_TPBI AS0
L P6
*1 60 OHM # 944C M- 00 51
4
Z2 50 1 5
Z2 50 2 6
3
2
Z2 50 3 7
1
Z2 50 4 8
M DI O8
M DI O9
M DI O1 0
M DI O1 1
M DI O1 2
J _1
IEEE1394
D 03 3 /3
H: CR 1_LEDN high ac tiv e,
L:C R1_LED N low ac t iv e
H: CR 1_PCTLN high ac tiv e,
L:C R1_PC TLN low ac t iv e
(MDIO12 is no us e in MP
v ers ion IC )
3VS
3V
3VS 7. .9 ,1 2, 13 ,1 5. .2 4, 26 .. 30 ,3 2, 39,4 1, 43
3V 6, 12 ,1 3, 15 .. 17,2 0, 24 ,2 6, 29 .. 32 ,4 0, 41,4 3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
8 80 25 -2 00 L
MDI O0
MDI O1
MDI O2
MDI O3
C ARD _PW REN #
Schematic Diagrams
RTL8111C
GLAN (RTL8111C)
LANVD D18
must be within
0.5cm (to pin
1)
must be within
0.5cm
L79
CTRL 18
LAN_ VD D3
C 662
C 679
C66 6
C6 63
C66 0
? ? ? INDUCTOR
(600mA)
C 651
C69 1
C673
C6 90
1A
*22U _6. 3V_08 .1U _16 V_04 .1 U_1 6V_0 4 . 1U_ 16V_ 04 *. 1U_16 V_ 04 .1 U_1 6V_04 .1U_ 16V_04
C6 54
C 653
. 1U_ 16 V_04
. 1U_ 16 V_04
. 1U_16 V_04
2 2U_ 6.3 V_08
.1 U_1 6V_04
RTL8111B
R4 44
C6 81
.1U_16V_0 4
.1U_ 16V_0 4
FOR RT L8102E
R163? ? ?
1.2V
1.2V
+ C6 39
C655
*10 0U_ 6.3V_B2
C689
C69 2
.1U_16V_0 4
C670
.1U_16V_04
C668
.1U_16V_04
C6 47
.1U_1 6V_04
L AN VDD15
60 mil
RTL8111C
C63 6
*2 2U_ 6.3V_08 . 1U_ 16 V_04
C6 46
.1 U_1 6V_04
Sheet 26 of 47
RTL8111C
.1 U_1 6V_04
LANVDD 18
40 mil
C66 1
C66 5
*10U _10 V_08
.1U_16V_04
. 1U_ 16V_ 04 . 1U_16V_0 4
C6 59
L77
HCB1608KF-1 21 T25_06
.
D03B
C67 2
.1U _16 V_04
REALTEK COLAY? ? ? ? ? ?
DATASHEET? 1.2V(? ? ? )
LAN_EVDD 18
FB12
40 mil
C6 38
111 2
C6 50
C6 45
*1 0U_ 10V_ 08
.1U _16 V_ 04
.1U _16 V_04
C649
C648
EVDD1 8
EVDD1 8
EGND
EGND
26
27
19
16,2 9, 32 PE_WAKE#
20
15,2 5, 32 BUF_PLT_RST#
R 471
3VS
22
28
25
31
. 1U_ 10V_ X7R _04 PCI E_ RXP2 _GL AN _C 29
. 1U_ 10V_ X7R _04 PCI E_ RXN 2_GLAN_ C 30
19 PCI E_CLK_ GLAN
19 PCI E_CL K_ GLAN #
R4 49
1K_ 04
R4 51
*1K_04
R4 50
2 .49K_1%_04
Z2 604
64
Z2 605
36
15 K_04
62
HSI P
HSI N
LAN _VDD 3
3V
C67 7
C 671
*. 1U_ 16 V_ 04
*. 1U_16V_0 4
R48 0
0_0 4
U3 2
*0_04
R4 57
R4 54
*4 9.9_1%_ 04 Z2 61 2 C676
*4 9.9_1%_ 04
*. 01U _16V_04
MDI O1+
MDI O1-
R4 53
R4 52
*4 9.9_1%_ 04 Z2 61 3 C669
*4 9.9_1%_ 04
*. 01U _16V_04
? ? ? RTL8101E
? ? ? (? ? ? ? ? RTL8101E)
IC? ?
Pad? ?
GND
L AN_VDD 3
R 455
PCI-E LAN
RTL8111C-VB
EEC S
MA2/ EESK
MA1/ EED I
MA0/ EED O
MD IP0
MDI N0
3
4
MDI O0+
MDI O0-
MD IP1
MDI N1
6
7
MDI O1+
MDI O1-
9
10
MDI O2+
MDI O2-
12
13
MDI O3+
MDI O3-
MD IP2
MDI N2
MD IP3
MDI N3
REFCL K_P
REFCL K_N
LED0
LED1
LED2
LED3
LANW AKEB
PERSTB
VC TRL 18
VC TRL 15
RSET
ISO LATEB
C KTAL2
C KTAL1
1
2
3
4
10K_04
U 33
CS
VCC
SK
NC
DI
ORG
DO
GND
AT93C 465 666
1
63
61
60
8
7
6
5
C 706
FC M16 08K- 121 T06
FC M16 08K- 121 T06
R ING
T IP
JLAN 1
L5 2
R479
LAN_VD D15
>4 0MI LS
*0_0 6
R478
LAN_VD D3
0_06 >4 0MI LS
TCT1
TD1+
TD1TCT2
TD2+
TD2TCT3
TD3+
TD3TCT4
TD4+
TD4-
MCT1
MX1+
MX1MCT2
MX2+
MX2MCT3
MX3+
MX3MCT4
MX4+
MX4-
LP3
*# 944 CM- 0051=P3
8 DLMX1+
LMX1+ 1
7 DLMX1LMX1- 2
6 DLMX2+
LMX2+ 3
5 DLMX2LMX2- 4
LP2
*# 944 CM- 0051=P3
8 DLMX3+
LMX3+ 1
7 DLMX3LMX3- 2
6 DLMX4+
LMX4+ 3
5 DLMX4LMX4- 4
24
23
22
21
20
19
18
17
16
15
14
13
10
9
RI NG
TIP
1
DA+
2
DA-
3
DB+
4
5
6
7
FOR RTL8102E
POWE R P LAN FOR PI N1
CTRL 18
>4 0MI LS
CTRL 15 /VDD33
L55
L54
1
2
882 66- 020 0
*.1 U_1 6V_04
1
2
3
4
5
6
7
8
9
10
11
12
57
56
55
54
GS5 019 PLF
8
DC +
DC DBDD +
GND
DD -
GND
GND 1
GND 2
LANVDD 18
C10 0B9
Z2602
C68 5
2
C6 96
R19 8
X5
Z2601
1
.1U _16 V_04 22U _6. 3V_08
*0_0 4
Z26 10
Z2 614
Z260 3
3. 6K_06
C N1
44
48
47
45
R 458
HSOP
HSON
GVDD
R44 8
PI N 65 , GND1 ~9=GN D
EECS
EESK
EEDI
EEDO
17
18
34
35
39
40
42
50
51
15 IC H_GPI O4 9
AVDD1 8
AVDD1 8
AVDD1 8
AVDD1 8
23
24
15 PE2_TX_ GLAN
15 PE2_TX_ GLAN #
15 PE2_RX_ GLAN
15 PE2_ RX_ GLAN #
5
8
11
14
NC
NC
NC
NC
NC
NC
NC
NC
NC
LANVDD 18
2
A V DD3 3 59
A V DD3 3
V DD 33 53
46
V DD3 3 37
V DD3 3 16
V D D33
58
V DD1 5 52
VD D15 49
V DD 15 4 3
V DD1 5 41
V DD1
V D D15 38
33
V DD 15 32
V DD1 5 21
VD D15 15
V DD 15
LAN _CL KR EQ#
.1U _16 _04 cap aci tanc e a s c lose
as pos sibl e t o R TL81 11C
FOR RTL8102E
L16? ? ?
MDI O0+
MDI O0LAN _VDD1 5
C66 4
40 mil
Z260 6
Z260 7
Z260 8
Z260 9
R225
R224
R223
R222
75_1 %_ 04 Z2 61 1
75_1 %_ 04
75_1 %_ 04
75_1 %_ 04
25MH z
C 379
R TL 8 11 1C - VB - GR
Enable Switching
regulator
Hi: Enable
Low: Disable
C69 4
R4 73
2 2P_50 V_04
C3 54
C35 5
C 353
C 352
.0 1U_ 25V_ 04
.01 U_2 5V_0 4
. 01U _2 5V_04
. 01U _2 5V_04
1 000P_ 2KV_X7R_ 12
C695
22P_50V_0 4
*0_ 04
FOR RTL8102E
R175? ? ?
LMX1+
LMX1LMX2+
LMX2-
LP5
8P4R X0_ 06
1
8
2
7
3
6
4
5
D LMX1+
D LMX1D LMX2+
D LMX2-
LMX3+
LMX3LMX4+
LMX4-
LP4
8P4RX0_06
1
8
2
7
3
6
4
5
DLMX3+
DLMX3DLMX4+
DLMX4-
6,1 2,13, 15. .17,2 0,2 4,29. .32,40,4 1,43 3V
7.. 9,12, 13, 15. .2 5,2 7.. 30 ,32,39,4 1,43 3VS
RTL8111C B - 27
B.Schematic Diagrams
60 mil
C6 93
1.8V
1.5V
LANVDD18
LANVDD15
LAN_VD D3
40 mil
.1 U_ 16V_0 4
C667
0_ 06
10 0MH z/10 0
C 656
SWF25 20CF-4R 7M- M
L ANVDD15
40 mil
.
C 644
*1 00U _6. 3V_B2 *22U _6. 3V_08
.
3V
L7 8
HCB1608KF- 121 T2 5_06
40 mil
+ C 652
FB12
Schematic Diagrams
ALC662 / AMP TP6047A-4
L91
*HCB100 5KF-1 21T20 _04
L70
3VS
3VS_AUD
5V_REGOUT
HCB1 005KF- 121T20_04
5VS_AUD
5VS
U24
L 69
HCB1005KF-121 T20_0 4
4
C57 0
C5 66
C56 3
C567
C559
C5 71
C5 73
C556
.1 U_16V_04
1 0U_10V_08
.1 U_16V_04
.1U_1 6V_04
.1U_ 16V_04
. 1U_16 V_0 4
10 U_10V_08
*10U_1 0V_ 08 Z272 5 3
OUT
VIN
MI C1-VREFO- R
MIC1 -VREFO-L
5
1
SHDN#
BYP
GND
R385
2
2.2K_04
R636
0_04
Z2701
2
3
G PI O0
G PI O1
*22P_50V_04
MI C1_R
MIC1 _L
C572
25
A VDD 1
38
A V DD 2
EAPD_ MODE
C56 5
4
DVS S1 7
DV SS 2
For AL C 6 62 ? ?
1
DV DD 1
9
D VDD 2
U2 2
AUDG
*.1U _16V_04
C564
AUDG
VREF
Z2711 C5 60
27
AUDG
10U _10V_08
E APD_MODE
R63 7
AUDG
48
0_04
INT_MIC_R
C549
C548
R 365
R 364
75 _04 Z270 8 C547
75 _04 Z270 9 C546
CEN-OUT
LFE-OUT
L INE2-L
L INE2-R
ANALOG
DCVOL
C D-L
C D-GND
C D-R
10 U_6.3 V_X7R_06 Z270 4 21
10 U_6.3 V_X7R_06 Z270 5 22
JDREF
MIC1-L
MIC1-R
C55 3
C55 2
L INE1-L
LINE1-R
MIC 2-VREFO
30
31
MIC2- VREFO
Z2714
35
36
FRONT-L
FRONT-R
R38 9
39
41
Z2715
Z2716
43
44
Z2717
Z2718
45
46
SI DE-L
SI DE-R
33
Z2721
40
Z2722 R3 92
23
24
Z2723 C5 45
Z2724 C5 44
2. 2K_04
FRONT- L 29
FRONT- R 29
*330 P_5 0V_ X7R_04
AUDG
D03 3/4
20K_1%_04
AU DG
4. 7U_6. 3V_06
4. 7U_6. 3V_06
R638
R639
R362
D 03
*4.7K_04
C55 5
C55 4
.0 1U_16 V_X7R_04
.0 1U_16 V_X7R_04
30
30
*4.7K_04
AUDG
3VS
AUDG
R 624
3 VS
La yo ut No te:
D03
AUDG
Codec p in 1 ~ pin 11 and pin 47 an d pin 48
are Dig ital signals.
The oth ers are Analo g signals.
La yo ut No te:
U39D
74L VC08 PW
*10 K_0 4
AC_ RESET# 12
11
R626
0_04
U39A
74LVC08PW
1
EAPD _MODE 13
3
28
Very cl ose to Audio Codec
2
KBC_ MUTE#
3VS
3VS
7
L -> H
LINE-L
LINE-R
3VS
AUDG
L -> H
EAPD_MODE
0_ 04
0_ 04
R363
*.1U _10V_X7R_ 04
*.1U _10V_X7R_ 04
L -> H
AZ_RST#
7
D03
3VS
R 597
5VS_AMP
C7 49
0.1 U_16V_04
1U _10V_06
C754
0.1U _25V_X7R_ 06
C756
0.1U _25V_X7R_ 06
Z2 304
1
SPKR_RIN -
2
SPKR_RIN +
0.1U _25V_X7R_ 06
3
R6 01
R6 02
*7 3.2K_1%_04
22K_1%_04
C758
0.1U _25V_X7R_ 06
R_HP_OUT_ A
R6 40
47K_04
C759
4.7U _10V_X5R_ 08
Z2 306 26
L_HP_OUT_A
R6 41
47K_04
C760
4.7U _10V_X5R_ 08
Z2 307 27
C753
14
HP_EN G
*0. 1U_16V_04
0 .1U_1 6V_ 04
0.1U_ 16V_04
0.1U _16V_04
Q 54
2 N7002 W
Z2 305
4
30
8
18
OUTR-
SPKR_LI N-
TPA6047A4
HP_INR
LOUT+
LOUT-
HP_INL
1 U_16V_X5R _06
Z2309
B YP A SS
C1P
C1N
24
C7 61
10
12
REG_EN
REG_OUT
H PV SS
C P VS S
Z2308
SPKOUTR+
SPKOU TR+
19
SPKOUTR-
SPKOUTR-
L1
L2
6
SPKOUTL+
7
SPKOUTL-
15
HEADPHO NE- R
16
HEADPHO NE- L
FCM1005KF-121 T03
FCM1005KF-121 T03
Z2 742
Z2 743
GAIN0
GAIN1
25
29
31
32
R603
C1
1
180 P_5 0V_04
180P_50 V_0 4
SPKOU TL-
FOR EMI
HEAD PHONE-R
30
HEAD PHONE-L
30
10 0K_04
J_LSPK1
5VS
5V_REGOUT
1 00K_04
*10 0K_ 04
*10 0K_ 04
R607
1 00K_04
L50
L49
5 VS
L6 7
TPA6047A4RHBR
FCM1005KF-121 T03
FCM1005KF-121 T03
Z2 744
Z2 745
C36 2
C363
180 P_5 0V_04
180P_50 V_0 4
HCB1005KF-121 T20
FOR EMI
C76 2
1U_ 16V_X5R_ 06
1U_16V_X5 R_06
AUDG
SPE C=0.47U,
EVM =1U
AUDG
4, 17, 24,30 ,31, 39.. 41,4 3..4 5 5V
12 ,17, 18,2 0..2 3,29. .31, 43 5VS
7 ..9, 12,1 3,15 ..26 ,28. .30, 32,3 9,41, 43 3VS
B - 28 ALC662 / AMP TP6047A-4
2
8 5204- 02001
PCB Foot print = 8 5204- 2P_ L
C2
SPKOU TL+
R604
R605
R606
C763
AU DG
1
2
J_SPK 1
Th ermal
Pad
14
13
SPKR_EN
HP_EN
Near CP+ and CP-
GND
G ND
S PGND
S P GND
C PGN D
23
22
20
SPKR_LI N+
HP_OUTL
SPK_EN
HP_ EN
J_SPK 1
J_RSPK1
HP_OUTR
SPK_EN
C752
SPK_EN
C776
*1 U_10V_06
AUDG
OUTR+
D03 2/ 28
29
C 751
0_04
AUD G
VD D
S PV D D
S P VD D
17
H PV D D
9
CP VD D
U40
FRON T-L
10 U_10V_08
C7 50
R625
D03
5
AUDG
C755
C757
4
AMP_MU TE
7
30mils
C748
500Hz High Pass Filter
Fcut(-3db)=520Hz
AUDG
30
7
L89
HCB1 005KF-121T20
5VS_AMP
22K_1%_04
*7 3.2K_1%_04
8
10
6
5VS
? ? : 2 000H z? ? (? ? ? ? )
R5 99
R6 00
U3 9B
7 4LVC08PW
D
3VS
100K_04
S
FRONT CHANNEL 2W
R 598
U39C
74L VC08 PW
9
1 00K_04
L88
HCB1 005KF-121T20
FRON T-R
D03
SIDE-L 2 9
SIDE-R 2 9
14
KBC_MUTE#
I NTMIC
24 I NTMIC
C56 8
Defau lt( L = Mute )
Z27 06
Z27 07
AUDG
Z2712
Z2713
29
37
*680P_50V_04
AUDG
AU DG
26
42
ALC66 2-GR
Z27 04
Z27 05
SI DESURR-O UT-L
SI DESURR- OUT-R
MIC2-L
MIC2-R
18
19
20
D03
3 0 MI C1_L
3 0 MI C1_R
SURR-O UT-L
SURR- OUT-R
Sen se A(JD1 )
Sen se B(JD2 )
. 1U_25V_X7 R_06 Z270 6 16
. 1U_25V_X7 R_06 Z270 7 17
D03
FRONT-O UT-L
FRONT- OUT-R
MIC1- VREFO-L
MIC1- VREFO-R
28
32
14
Sheet 27 of 47
ALC662 / AMP
TPA6047A4
INTMI C R3 66
MI C2-VREFO
LINE2-VREFO
PCBEEP
14
15
L _HP_ OUT_A
R_ HP_ OUT_A
LI NE1- VREFO-L
LI NE1 -VREFO-R
SPDIFO
13
34
JD_SENSE
HP_SENSE
DIG IT AL
SPDIFI/EAPD
Z2710
Z270 3 12
10K_04
1K_04
*100 P_5 0V_ 04
C5 51 1U_10V_06
30 J D_SENSE
30 HP_SEN SE
MIC1- VREFO-L
MIC1 -VREFO-R
33
28
5
21
11
B.Schematic Diagrams
R368
R367
C5 43
SDATA-OUT
BIT-CLK
SDATA-IN
SYNC
R ESET#
*0_0 4 Z270 2 47
SPDIF-OUT
20, 30 SPDIF-OUT
3 1 BEEP
5
6
8
10
11
14
F o r AL C 88 8 ? ?
AZ_SD OUT_R
AZ_BI TCLK_R
AZ_SD IN0_R
AZ_SY NC_R
AZ_RST#_R
3 3_04
0 _04
2 2_04
3 3_04
3 3_04
A VS S 1
A V SS 2
R388
R387
R386
R383
R382
SDATO
BIT_CLK
SDATI0
SYNC
AC_RESET#
C569
*68 0P_ 50V_04
L ay out No te :
Ver y close to Au dio Codec
16, 32
16, 32
16
16,32
16, 32
2.2K_04
1U_ 10V_06
*G924
D03
R390
C57 8
1
2
2
1
8 5204- 02001
PCB Foot print = 8 5204- 2P_ L
Schematic Diagrams
KBC-ITE IT8512E
KBC _AVDD
L71
HC B1005KF-1 21T20 _04
VD D3
C582
VD D3
C600
C 598
C630
C617
C 584
10U _1 0V_0 8
. 1U_ 16V_04
.1U _1 6V_0 4
R 434
VD D3
WDT_EN 29
PJ16
VDD3
R 436
10 K_04
100K_04
WD _D ISABLE 1
.1U_ 16V_ 04
. 1U_16 V_04
W DT_EN
10K_04
R4 39
.1U _16V_04
R 438
W D_DISABLE
10K_04
2
20mil
R437
C 629
Z281 1
KBC_AGND
. 1U _16V_04
3
3VS
31 KBC_ BEEP
LED_SCROLL#
30 L ED_N UM#
30 LED_C AP#
24 LED_BAT_C HG#
2 4 LED_BAT_FU LL#
2 4 LED_PWR#
66
67
68
69
70
71
72
73
ADC 0/ GPI0
ADC 1/ GPI1
ADC 2/ GPI2
ADC 3/ GPI3
ADC 4/ GPI4
ADC 5/ GPI5
ADC 6/ GPI6
ADC 7/ GPI7
SMC_BAT
SMD_BAT
SMC_VGA_THERM
SMD_VGA_THERM
R62 3
*0_04
110
111
115
116
117
118
0 _04
BRIG HTN ESS_R
KBC _BEEP
29 8 0C LK
29 3 IN 1
29 80PORT_ DET#
16 LPCPME#
3 0 TP_CL K
30 TP_ DATA
20 VGATHERM_ALER T#
40 PWR _SW #
24, 30 LID_ SW#
30
WEB_WW W#
24, 31 BT_EN
24 BKL_ EN
80C LK
3IN 1
80PO RT_ DET#
LPCPME#
24
25
28
29
30
31
32
34
85
86
87
88
89
90
VGATH ERM_ ALERT# 125
PWR_SW#
LID _SW#
WEB_WW W#
BT_EN
BKL _EN
18
21
33
108
109
VBAT 3
74
ADC
A V CC
FLFRAME#/G PG2
FLAD0/ SCE#
FLAD1/SI
FLAD2 /SO
FLAD3/G PG6
FLCLK/SCK
( PD )FLR ST#/WU I7 /TM/G PG0
GPIO
SMBUS
( PD )KSO16/G PC3
( PD )KSO17/G PC5
( PD
( PD
( PD
( PD
( PD
( PD
( PD
PWM
PWM0/G PA0(
PWM1/G PA1(
PWM2/G PA2(
PWM3/G PA3(
PWM4/G PA4(
PWM5/G PA5(
PWM6/G PA6(
PWM7/G PA7(
PU
PU
PU
PU
PU
PU
PU
PU
)
)
)
)
)
)
)
)
( PD )EGAD/ GPE1
( PD )EGCS#/ GPE2
( PD )EGCLK/ GPE3
)
)
)
)
)
)
( PD )WUI 5/ GPE5
( PD )LPC PD #/ WUI 6/ GPE6
PWM/COUNTER
( PD )TACH0/G PD6
( PD )TACH1/G PD7
PWR SW/GPE4 ( PU )
D03 3/ 3
1 20K_ 04 BR IGHTN ESS_R
C6 31
0 .1U _1 6V_0 4
VDD 3
A
42 SMD _BAT
SMD_BAT
AC
D 31
BAV99
BAT_DET
AC
D 30
BAV99
BAT1_VOLT
AC
D 28
BAV99
107
EC_PCIE_RST#
82
83
84
SMI #
SCI #
PWR _BTN #
35
17
J_K B
A
A
A
C
31
C HG_CU RSEN AC
D 27
*BAV99
TOTAL_C UR
VDD 3
A
AC
D 24
*BAV99
R400
C577
CPU_ FAN_R
120K_04
. 1U_ 16V_04
18 RAM_FAN
R399
C576
RAM_ FAN_R
120K_04
. 1U_ 16V_04
18 VGA_FAN
R398
C575
VGA_FAN_ R
120K_04
. 1U_ 16V_04
18 SYS_FAN
R397
C574
SYS_FAN_ R
120K_04
. 1U_ 16V_04
18 CPU_FAN
VTTPWR_ON 3 9
HOTKEY1# 30
HOTKEY2# 30
WLAN_D ET# 2 9
BT_DET# 31
DD _ON 40, 43
EC_PC IE_RST#
20
SMI # 16
SCI # 16
PWR _BTN # 16
6
ALER T
ALERT
R427
VDD3
30
CIR _R X
CLOCK
C K32KE
C K32K
19
C 746
4. 7K_0 4
SMD_C PU_THER M R2 47
R409
C HG_CUR SEN
R407
4. 7K_0 4
R OBSON _DET#
R396
10K_04
SMC_BAT
R414
4. 7K_0 4
SMD_BAT
R419
4. 7K_0 4
BAT_DET
R412
10K_04
BAT_VOLT_ R
100_04
C 587
C HG_CU RSEN_ R
*10 0_04
C 583
TOTAL_C UR_R
*10 0_04
C 581
1U_10V_06
*1 U_10V_06
A
1SS35 5
*1 U_10V_06
CI R_I N
PWR GD_PS 4,12,15, 16, 44
VGA_FAN SEN 18
CI R_I N
MXM_ PW R_ EN
R560
MXM_PW R_EN
SW I#
0_04
VDD 3
20
D0 3
SWI # 16
112
CH G_EN
R 43 3
8
U 29
VDD
Z2803 3
WP#
SPI _VDD
42
Z28 07
2
128 Z28 08
X3
4
3
*10K_ 04
10K_04
C
D32
CPU _FANSEN 18
RAM_FANSEN 18
PWR GD_PS
R2 52
SMC_C PU_THER M R2 46
Sheet 28 of 47
KBC-ITE IT8512E
A
TOTAL_CU R
RSMR ST# 16
SB_KBCRST# 15
47
48
10K_04
C
42 BAT1_VOLT
CC D_EN
RSMRST#
SB_KBCR ST#
*10K_ 04
R395
C
4 2 BAT_DET
SUSB# 10,16, 32,43
SUSC# 16
VTTPWR_ON
HOTKEY1#
HOTKEY2#
WD T_EN
WLAN_D ET#
BT_DET#
R393
MODEL_ID
C
R447
1K_ 04
R428
4. 7K_04 Z2802 7
*10M_ 04
32. 768KHz-200
1
2
C 62 2
15P_ 50V_ 04
D 03
C 627
15P_ 50V_ 04
SI
SO
CE#
SC K
5 KBC_SPI _SI_R R 430
2 KBC_SPI _SO_R R 446
1 KBC_SPI _CE#_R R 445
6 KBC_SPI _SCLK_RR 429
KBC _SPI_SI
KBC _SPI_SO
KBC _SPI_CE#
KBC _SPI_SC LK
47_04
15_1%_04
15_1%_04
47_04
C6 08
C 658
*33 P_04
HOLD# VSS 4
EN 25P05-50GCP
C657
C607
*33P_ 04
*33P_04
*33P_ 04
J _SPI 1
NC _04
KBC _SPI_SCLK_R
KBC _SPI_SI_R
KBC_AGND
R4 35
AC
D 29
BAV99
C61 5 .1 U_16V_04
( PD )L80H LAT/ GPE0
. 1U_16 V_04
24 BRI GH TNESS
SMC_BAT
42 SMC _BAT
C
93
94
95
96
97
98
99
119
123
LPC/WAKE UP
NC 4
H8_ RS T# 31
VD D3
42 TOTAL_CU R
56
57
( PD )CRX/G PC0
( PD )CTX/ GPB2
CIR
( PD )RI NG#/PW RFAIL#/ LPCR ST#/ GPB7
UART
KBC_ SPI _C E#
KBC_ SPI _SI
KBC_ SPI _SO
Z2809
KBC_ SPI _SCLK
CC D_EN
120
124
GI NT/GPD 5( PU )
RXD/ GPB0( PU )
TXD/ GPB1( PU )
100
101
102
103
104
105
106
1U _10V_06
C
( PD )TMRI0/W UI2/G PC4
( PD )TMRI1/W UI3/G PC6
RI 1# /WU I0/GPD 0( PU )
RI 2# /WU I1/GPD 1( PU )
GP INTERRUPT
1
2
3
7
9
10
13
16
17
18
19
20
21
22
23
24
3 IN1
H 8_R ST#
R406
WAKE UP
PU
PU
PU
PU
PU
PU
KB-SO0
KB-SO1
KB-SO2
KB-SO3
KB-SO4
KB-SO5
KB-SO6
KB-SO7
KB-SO8
KB-SO9
KB-SO10
KB-SO11
KB-SO12
KB-SO13
KB-SO14
KB-SO15
C628
BAT1 _VOL T
EXT GPIO
WAKE UP
IT851 2E-N X-L
) ID0/G PH0
) ID1/G PH1
) ID2/G PH2
) ID3/G PH3
) ID4/G PH4
) ID5/G PH5
) ID6/G PH6
( PD ) ID7/G PG1
PS/2
PS2C LK0/ GPF0(
PS2D AT0/ GPF1(
PS2C LK1/ GPF2(
PS2D AT1/ GPF3(
PS2C LK2/ GPF4(
PS2D AT2/ GPF5(
36
37
38
39
40
41
42
43
44
45
46
51
52
53
54
55
KBC_W RESET#
D
Q45
2N7 002W
GN D
AAT3510IGV-2. 93-C-C-T1
42 C HG_CU RSEN
FLASH
SMC LK0/ GPB3
SMD AT0/ GPB4
SMC LK1/ GPC1
SMD AT1/ GPC2
SMC LK2/ GPF6( PU )
SMD AT2/ GPF7( PU )
4
5
6
8
11
12
14
15
S
4
24
26
50
92
1 14
1 21
12 7
V S T BY
V ST B Y
VS T B Y
VST BY
VST BY
VST BY
IT8 512E
KB-SI 0
KB-SI 1
KB-SI 2
KB-SI 3
KB-SI 4
KB-SI 5
KB-SI 6
KB-SI 7
1
BAT_D ET
BAT_VOL T_R
CHG _C URSEN_R
TOTAL_CUR _R
MXM_PRESN T#
ROBSON_D ET#
CCD _D ET#
MOD EL_I D
30
LOW ACTIVE
11
DAC 0/ GPJ0
DAC 1/ GPJ1
DAC 2/ GPJ2
DAC 3/ GPJ3
DAC 4/ GPJ4
DAC 5/ GPJ5
DAC
AVSS
4,15 PECI
SMC _VGA_THER M
SMD _VGA_THER M
SMC _CPU _TH ERM
SMD _CPU _TH ERM
PECI
R6 21
76
77
78
79
80
81
58
59
60
61
62
63
64
65
W DI
2
1
75
D 03 3/ 3
20
20
6
6
CPU_FAN _R
RAM_FAN _R
VGA_FAN_R
WLAN _EN
SYS_FAN_R
KBC _MUTE#
ECSC I#/ GPD3 ( PU )
ECSMI#/ GPD4 ( PU )
V SS
VS S
VSS
VSS
VSS
VSS
15,20 MXM_PRESN T#
32 ROBSON_D ET#
31 C CD_DET#
23
15
VSS
27 KBC _MU TE#
KSO0/ PD0
KSO1/ PD1
KSO2/ PD2
KSO3/ PD3
KSO4/ PD4
KSO5/ PD5
KSO6/ PD6
KSO7/ PD7
KSO8/ ACK#
KSO9/ BUSY
KSO1 0/ PE
KSO11/ER R#
KSO12/SLCT
KSO13
KSO14
KSO15
GA2 0/ GPB5
KBRST#/GPB6 ( PU )
PWU REQ#/GPC 7( PU )
L80L LAT/ GPE7( PU )
1
27
49
91
11 3
12 2
24, 29 W LAN_EN
K/B
C 634
. 1U _16 V_04
KSI 0/ STB#
KSI 1/ AFD#
KSI2/I NIT#
KSI 3/ SLI N#
KSI 4
KSI 5
MATRIX
KSI 6
KSI 7
WR ST#
WEB_AP#
WEB_EMAI L#
J _KB1
85201-24051
10 0K_0 4
G
RESET#
VCC
2
4
6
8
1
3
5
7
SPI _VDD
KBC _SPI_CE#_R
KBC _SPI_SO_R
SPNZ- 08S3 -B-C -0 -P
VDD 3 16,21, 24, 31,40,42, 43, 45
3V 6,12,13, 15. .17, 20, 24,26,2 9. .32 ,40, 41, 43
3VS 7 ..9,12, 13, 15 .. 27, 29,30 ,32, 39, 41,43
KBC-ITE IT8512E B - 29
B.Schematic Diagrams
THER M_ALERT#
30 W EB_AP#
30 W EB_EMAI L#
14
126
4
16
20
LAD 0
LAD 1
LAD 2
LAD 3
LPC CLK
LFR AME#
LPC
SERI RQ
LPC RST# /W UI4/GPD 2( PU )
12
KBC _W RESET#
GA20#
AC/BATL#
V CC
U27
10
9
8
7
13
6
5
22
1 6, 29 LPC _AD 0
1 6, 29 LPC _AD 1
1 6, 29 LPC _AD 2
1 6, 29 LPC _AD 3
19 CK_P_33M_SIO
16,29 LPC _FRAME#
15, 29 LPC_SI RQ
12, 15,16,20, 29 PLTRST#
15 GA2 0#
2 0, 42 AC/ BATL #
24 L ED_AC IN #
6 THER M_ALERT#
U 30
MR #
5
7/13
ITE8512E pin4 and pin16 sw ap
for LED driver circuit.
Schematic Diagrams
Mini WLAN/ TMP/ TPA6017A2
TPM 1.2
R15 6
3 VS
19
1
3
5
PE_WAKE#
1 0K_04
7
11
13
9
15
WAN_C LKREQ#
CL KR EQ#
REFCL KREFCL K+
GN D0
GN D1
1. 5VSWLAN
Z2 924
Z2 925
Z2 926
Z2 927
Z2 928
C37 2
C 374
.1U _16 V_ 04
10 U_1 0V_08
.1U_ 16V_0 4
10U _10V_ 08
Sheet 29 of 47
Mini WLAN / TPM/
TPA6017A2
WLA N_DET#
PE3 _ RX_ W AN #
PE3 _ RX_ W AN
PE3 _ TX_ WA N#
PE3 _ TX_ WA N
2 8 W L AN _D ET#
15 PE3_ RX_W AN #
1 5 PE3 _ RX_ W AN
1 5 PE3_ TX_WA N#
15 PE3 _ TX _W A N
28
C35 7 .1U _10V_ X7R_ 04
C36 1 .1U _10V_ X7R_ 04
80 PO RT_D ET#
28 3 IN1
Z29 23
3V
1 2,1 5
1 2,1 5
1 2,1 5
R204
R210
R212
CL_N _CL K
CL_N _DATA
CL_R ST
*0 _04 MI NI_ CLK1
*0 _04 MI NI_ DATA1
*0 _04 MI NI_ RST#1
VDD3
17
19
37
39
41
43
45
47
49
51
GN D11
PETn0
PETp0
PERn0
PERp0
NC 3
NC 4
NC 6
NC 7
NC 8
NC 9
NC 10
NC 11
NC 12
NC 13
R4 43
*0 _04
10
19
24
3VS
C 643
C6 83
C64 1
C64 0
*. 1U_ 16V_0 4 *. 1U_1 6V_0 4 *.1 U_1 6V_04 *1U_ 6.3 V_ 04
L CLK
22
16
27
15
R44 0
L FRAME#
L RESET#
SERI RQ
C LKRUN#
VSB
L PCPD#
TPM_BADD 9
LPC reset timing:
TPM_PP
T
T
T
18
26
34
40
50
TZ2 502
TZ2 503
R 461
7
1
3
12
*1 00_ 04
8
5 Z29 21 R4 59
*0_ 04
3V
C6 82
*.1 U_1 6V_04
*0_04 TPM_PD# 2 8
asserted before entering S3
GPIO
G PI O2
TESTBI /BADD
XTALI
6 TZ25 04
2 TZ25 05
13 Z2915
T
T
R4 63
*0 _04
Z291 6
C687
XTALO
N C_1
N C_2
N C_3
GND _1
GND _2
GND _3
GND _4
TESTI
14 Z2914
4
11
18
25
R 464
*0 _04
2
X6
3
*32. 768 KHz-20 0
20
22
30
32
36
38
Z291 3
C688
W _DI SABLE#
PERSET#
NC(SMB_ CLK)
NC( SMB_DATA)
N C(USB_D -)
N C(U SB_D +)
24
28
48
52
42
44
46
3 .3VAUX
1. 5V_1
1. 5V_2
3. 3V_1
NC( LED_WW AN #)
LED_ WLAN#
NC (LED_ WPAN #)
HI
LOW
HI
T PM _B AD D LO W
WL AN _EN 24, 28
PLTR ST# 12, 15, 16, 20, 28
R21 4
R21 5
0_04 USB_P70_04 USB_P7+
R65 1
*0 _04
3V
WDT_EN 28
USB_P7- 1 5
USB_P7+ 1 5
T PM _P P
D03
R21 6
0_ 06
1 .5VS
80C LK
AC CESS
NO RMAL( In tern al P D )
4 E/4F h
2 E/2F h
PC LK_TPM
R44 1
*33 _04
TPM_PP
R46 0
*10 K_04
R61 7
*10 K_04
R46 2
*10 K_04
R47 2
*10 K_04
28
TPM_BADD
? ? : 500~1000Hz (? ? ? ? ? )
Z291 7
C 642
*10P_5 0V_04
3VS
3V
ADD R617
3VS
Disable TPM function
5 VS
Fcut(-3db)=1965Hz
2000Hz High Pass Filter
L 90
HCB10 05KF-1 21T2 0
5VS_ REAR
D03
C7 73
C7 68
27 FRONT-L
27 SI DE-L
AUDG
C7 74
C7 70
AUDG
27
SPK_ EN
5VS
AUD G
AUD G
22 00P_5 0V_X7 R_0 6
*22 00P_5 0V_X7 R_06
Z231 2
C76 9 220 0P_50 V_ X7R _06
22 00P_5 0V_X7 R_0 6
*22 00P_5 0V_X7 R_06
Z231 3
C77 1 220 0P_50 V_ X7R _06
R6 09
R6 08
R6 10
R6 11
17
7
19
SPK_EN
10 0K_04
*100 K_04
2
3
GAI N0
GAI N1
1
11
13
20
21
10 0K_04
*100 K_04
D03
C764
C76 5
C 766
C76 7
0.1 U_16 V_ 04
*1U_ 10V_0 6
1 0U_1 0V_08
*10U_ 10V_0 8
U4 1
5
9
LINLIN+
RINRIN+
SD #
GAIN0
GAIN1
PVD D
PVD D
VD D
L OUT+
L OUT-
6
15
16
4
SI DE_LO +
8
SI DE_LO -
SIDE_R O+
SIDE_R O-
L46
L45
FCM1608 K-12 1T0 6
FCM1608 K-12 1T0 6
Z2 929
Z2 930
R OUTGND
GND
GND
BY PASS
GND
EXPO SED PAD
NC
AU DG
18
SI DE_RO +
SIDE_L O+
SIDE_L O-
L44
L43
FCM1608 K-12 1T0 6
FCM1608 K-12 1T0 6
Z2 931
Z2 932
14
SI DE_RO -
10
Z2 317
J_SPK1
R OUT+
TPA60 17A2PWPR
12
1
2
3
4
CON4
C772
0.4 7U_1 0V_04
AUD G
AUD G
B - 30 Mini WLAN/ TMP/ TPA6017A2
*1 2P_04
D03 3 /4
1.5 VSWL AN
3V
:
:
:
:
REAR CHANNEL 2W
27 FRONT-R
2 7 SI DE-R
*1 2P_04
PP
*SLB963 5TT
889 10- 520 4
D03
For WLAN Device
35
23
25
31
33
*1 0K_04
LPCPD# inactive to LRST# inactive 32~96us
TZ2 501
G ND6
G ND7
G ND8
G ND9
GND 10
GN D2
GN D3
GN D4
SUS _S T#
1 6 SU S_ST#
KEY
21
27
29
R4 42
C37 3 C37 5
4
G ND5
T h er m a l P ad
B.Schematic Diagrams
1 9 PCIE_CL K_WA N#
1 9 PCIE_ CL K_ WA N
16, 28 LPC_ FR AME#
1 2,1 5,1 6,2 0,2 8 PLTRST#
15 ,28 LPC_ SIRQ
3V
VDD1
VDD2
VDD3
21
PC LK _TPM
3 VS
2
6
8
10
12
14
16
3. 3V_0
1. 5V_0
UI M_PWR
UI M_DATA
UIM_CL K
UI M_R ESET
UIM_VPP
WAKE#
BT_ DATA
BT_ CHCL K
L AD0
L AD1
L AD2
L AD3
1
19
JMI NI1
16, 26, 32
U3 1
26
23
20
17
LPC_ AD0
LPC_ AD1
LPC_ AD2
LPC_ AD3
4
16 ,28
16 ,28
16 ,28
16 ,28
MINI CARD for WAN& DEBUG CARD
VDD3
12 ,17 ,18 ,20 ..2 3,2 7,3 0,3 1,4 3 5VS
6,1 2,1 3,1 5.. 17, 20, 24, 26, 30. .32 ,40 ,41 ,43 3 V
7. .9, 12 ,13 ,15 ..2 8,3 0,3 2,3 9,4 1,4 3 3VS
11, 13, 15, 17, 32, 41, 43 1. 5VS
Schematic Diagrams
Daughter CONN
VIN
PHONE JACK BOARD
SWITCH BOARD
16
J ADJ 1
1
28
27
27
VDD5
CIR _ RX
CIR _ RX
L IN E- R
L IN E- L
L INE- R
L INE- L
SPDIF- OUT
2 0, 2 7 S PDIF- OUT
27
27
MIC 1 _ R
MIC 1 _ L
MIC1 _ R
MIC1 _ L
2 8 L ED_ SC ROL L #
2 8 L ED _ CA P#
2 8 L ED_ NU M#
1 5 SA TA L ED
2 5 CA R D_ PWR EN#
24 , 3 1 ,4 3 ,4 5
1 2 ,1 7 , 18 , 2 0 ..2 3 , 2 7, 29 ,3 1 ,4 3
3 V 6 ,1 2,1 3, 15 ..1 7, 20, 24 ,2 6,29, 31, 32 ,4 0,4 1, 43
3VS
3 VS 7 .. 9,1 2, 13, 15 .. 29, 32 ,39,4 1, 43
5V
5V
4 ,1 7 ,2 4 , 31 , 3 9 ..4 1 , 4 3. .4 5
871 51 -18 07
AU DG
Sheet 30 of 47
Daughter CONN
CLICK BOARD
5 VS
R 112
R 11 1
1 0K_0 4 1 0K_ 04
J_ TP1
1
1 2
2 3
3 4
4
8 520 1- 040 5
TP_ DA TA
TP _ CL K
C18 6
C1 85
TP_ DA TA 28
TP_ CL K 2 8
C1 84
H 44
H 7_ 0D3 _7
.1U _1 6V_0 4
4 7P_0 4
47 P_0 4
HOTKEY BOARD
GND
5VS
H 43
H 7_ 0D2 _7
R2 03
R2 02
*10 K_ 04
*10 K_04
H 40
H 7_0 D3 _7
H3 7
H7 _0 D3_ 7
H3 0
H7 _0 D3_ 7
H2 7
H7 _0D 3_ 7
GN D
GND
GND
H 48
H3 9
H 7_0 D2 _7 SU -27 AS
GN D
H 22
SU- 27 AS
H 34
SU- 27 AS
H29
H33
H3 2
H3 8
H3 1
H7_ 0D 3_7 H7_ 0D 3_7 H7 _0D 3_7 H7 _0D 3_ 7 H7 _0D 3_ 7
GND
H 35
SU- 27 AS
GND
GND
GND
H3 6
SU- 27 AS
GND
H42
H8_ 0D 3_7
GND
D03
(? ? ? )
H2
H1
H3
H4
J _KEY1
28
28
HOTKEY 1 #
HOTKEY 2 #
GND
1
2
3
4
8 520 1- 040 5
HOT KEY1 #
HOT KEY2 #
GN D
GN D
GN D
GN D
GN D
GN D
C15 8D 158 N C 15 8D1 58 N C 158 D1 58N C 158 D1 58N
H 24
H 26
H 21
H 16
H 18
H 19
H 25
H13
H5
H 45
H46
H2 3
H 7_0 D3 _7 H 7_0 D3 _7 H 7_0 D3 _7 H 7_0D3 _7 H 7_ 0D3 _7 H 8_ 0D3 _7 C 31 5D1 11 C31 5D1 11 C31 5D1 11 SQ-3 1G SQ- 31G SU- 27 AS
H9
H1 0_ 0D4 _0
H51
H 52
H 53
H 54
C15 8D 158 N C 15 8D1 58 N C 158 D1 58N C 158 D1 58N
USB BOARD
GN D
GN D
GN D
GND
GND
GND
GND
GND
GND
GND
GND
GND
GN D
D03
FJ_ USB4
15
15
US B_ P0 US B_ P0 +
15
15
US B_ P2 US B_ P2 +
U SB_ P0 U SB_ P0 +
U SB_ P2 U SB_ P2 +
M1
C-MARK1
M2
C -MARK1
M3
C -MAR K1
M4
C -MAR K1
M5
C-MARK1
M6
C -MARK1
M7
C -MAR K1
M8
C -MAR K1
H6
H 11
H 17
H 41
H 47
H 49
H7
H 50
H 28
H 15
H 14
H 10
C 315 D1 11 C 315 D1 11 C 315 D1 11 C 315D1 11 C 31 5D1 11 C 31 5D1 11
C 315 D1 11 C 315 D1 11 C 31 5D1 11 H 10 _0D 4_ 0H 10 _0D 4_ 0H 10 _0D 4_ 0
5V
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
GN D
USB _ P1 USB _ P1 +
USB _ P3 USB _ P3 +
US B_ P1 - 1 5
US B_ P1 + 1 5
GN D
GN D
GND
GND
GND
GN D
GN D
GND
H8
GND
H20
GND
GND
H12
C13 0D1 30 C13 0D 130 HOLE3_4
US B_ P3 - 1 5
US B_ P3 + 1 5
88 107 -200 0
Daughter CONN B - 31
B.Schematic Diagrams
JD_ S ENSE
AMP_ MUTE
HP_ SENS E
HEA DPHON E- R
HEA DPHON E- L
2 7 JD_ S EN SE
2 7 AMP_ MUTE
2 7 HP_ SENS E
2 7 HEA DPH ON E- R
2 7 HEA DPH ON E- L
3V
3 VS
5V S
3V
J_ SW 1
1
2
3
4
5
6
7
8
LED_SCR OLL#
9
LED_CAP#
10
LED_NUM#
11
SATALED
12
C ARD_ PWREN #
13
Z3
00
1
14
T 2 0M IL
15
85 20 1-1 505
PWRS#
LID_ SW#
W EB_AP#
W EB_EMAI L#
W EB_WW W#
4 0 PW R S#
2 4, 2 8 L ID _ SW #
2 8 W EB _ AP#
2 8 W EB _ EMA IL #
2 8 W EB _ WW W #
J_AU DIO1
V DD 5
5VS
VI N
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
V IN 2 0 ,2 4 , 3 9. .4 2 , 44 , 4 5
VDD 5
Schematic Diagrams
SATA HDD/ CCD/ BT/ PC BEEP
CCD
L 47
H CB2012KF-121T30_0 8
Z3118
Bluetooth
Q2 3
S
8
1
5V_CC D
48 mil
D
3 V_ BT
5V
G
J_ CCD 1
85 205 -05 00
1
2
3
4
5
AO340 9
R 194
330K_04
C 344
1U_ 6. 3V_04
Z312 1
C 347
R195
10U _10 V_ 08
D
68K_1%_04
R18 2
10K_04
6
7
8
BT_ON#
N. C
N. C
882 66- 0800
S
5
L42
HC B2012KF-12 1T30_0 8
From H8 default HI
3V
3 V_BT
C31 5 C30 7
R180
VDD5
. 1U_ 16V_04
.1U _16 V_04
D03
100K_04
Z3101
3
Z3102
2
U17A
GM3 58S8R
+
-
R 260
R263
1 0K_04
10 0K_04
Normal : 0
Z3103
1
Active : 1
C
1.37 K 1%_06
.1 U_16 V_04
JRT1
Shutdo wn_st b_ power 45
D 19
R25 7
C44 0
100K_04
.1U _16 V_04
F01 J2E
Z310 4
VD D3
24,28 BT_ EN
R18 1
*10 0K_04
BT_EN
Q 20
2 N7002W
G
S
Thermistor---> NTC
D
1
2
ACES-852 04- 2P
100 K_04
470 K_04
R25 8
8
design value --->
depends on the
temperature
C 441
D
R2 59
R 256
4
Sheet 31 of 47
SATA HDD/ CCD/
BT/ PC BEEP
C31 1
B T _E N#
A
Q36
0 _04
R26 2
G
A
S
R2 61
Z3105
C4 43
2N7002 W
100K_04
.1U _16V_ 04
D 20
*F01 J2E
C
B.Schematic Diagrams
VDD3 BT_EN#
JBT1
+3 .3v
GN D
USBUSB+
DETECT#
1
2
3
4
5
USB_P5U SB_P5+
BT_DET#
15 USB_P515 USB_P5+
28 BT_D ET#
J_C CD1
1
Q27
2N7002 W
G
28 CCD_EN
USB_P415 USB_P4USB_P4+
15 USB_P4+
28 C CD_ DET#
R18 7
C 291
C3 29
. 1U_1 6V_04
R183
10K_0 4
VDD3
1 0U_ 10V_08
100 K_04
H8 _RST#
H8 _RST# 28
PC BEEP
SATA HDD CON
J_ SATA1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Z3106
Z3107
C48 0
C47 9
. 1U _10V_ X7R _04
. 1U _10V_ X7R _04
SA TA _RX #2
SA TA _RX 2
Z3108
Z3109
C47 8
C47 6
. 1U _10V_ X7R _04
. 1U _10V_ X7R _04
SA TA _TX# 2
SA TA _TX2
1 6 ICH SPK
I CHSPK
SA TA _RX# 2 15
SA TA _RX2 15
2 8 K BC_ BEEP
BEEP
C240
1U _6. 3V_04
C247
1U _6. 3V_04
BEEP 2 7
KBC _BEEP
SA TA _TX #2 15
SA TA _TX 2 1 5
60MIL
5VS
C46 2
C463
4. 7U_ 10 V_08
.1U _16 V_04
C4 77
+
10 0U_ 6.3 V_ B2
J_SATA2
15 SA TA_ RX 1
15 SA TA _R X# 1
15 SA TA_ TX# 1
1 5 SA TA_TX1
SA TA_RX 1 C 451
SA TA_RX #1 C 450
. 1U_ 10V_X7R_04
. 1U_ 10V_X7R_04
SA TA_TX# 1 C 447
SA TA_TX1
C 446
. 1U_ 10V_X7R_04
. 1U_ 10V_X7R_04
5VS
C444
C 445
C4 42
+
C53
.1 U_16 V_04
100 U_6 .3V_ B2
10U_10V_0 8
10U_ 10V_ 08
B - 32 SATA HDD/ CCD/ BT/ PC BEEP
20
18
16
14
12
10
8
6
4
2
20
19
18
17
15
16
14
13
12
11
10
9
8
7
6
5
4
3
2
1
SQPOFZ-20S2
19
17
15
13
11
9
7
5
3
1
C459
C458
. 1U_ 10V_ X7R _04 SA TA_ TX0
. 1U_ 10V_ X7R _04 SA TA_ TX#0
C457
C456
. 1U_ 10V_ X7R _04 SA TA_ R X# 0
. 1U_ 10V_ X7R _04 SA TA_ R X0
SA TA _ TX0 15
SA TA _ TX# 0 1 5
SA TA _ RX #0 15
SA TA _ RX 0 1 5
VDD3
3V
3VS
VDD 3 16, 21, 24, 28,40,42 ,43 ,4 5
3V 6, 12, 13,15 ..17, 20, 24, 26, 29, 30,32 ,40 ,41 ,4 3
3VS 7. .9, 12, 13, 15 ..30,3 2, 39, 41, 43
VDD5
5V
5VS
VDD 5 24, 30, 43, 45
5V 4, 17, 24,30 ,39 .. 41, 43. .45
5VS 12, 17 ,18 ,20.. 23, 27, 29, 30 ,43
10U _10 V_08
Schematic Diagrams
New Card/ MDC/ TV/ Robson
3V
NEW CARD
C371
.1U_16V_04
5
3V
1 .5VS
3VS
3V
1. 5VS
C370
C37 7
.1U_16V_0 4
.1 U_1 6V_04
.1U _16 V_ 04
3VS
2
3V
U9
17
2
12
10, 16, 28 ,43 SUSB#
3V
SCLK
AC
D9
*BAV99
19
15 O C#1 0
A
R 217
R 219
3V
AC
D10
*BAV99
A
AUXOUT
3 .3VI N
3.3 VOUT
1 .5VI N
1.5 VOUT
SYSR ST#
SHD N#
STBY #
PERST#
O C#
C PPE#
CPU SB#
RCL KEN
*10 K_04
10 K_04
4
5
13
14
C
SDATA
AUXIN
NC
NC
NC
NC
P223 1NF E2
GND
EGND
NC
15
NC_ 3. 3VAUX
3
NC_ 3. 3V
36mils
48mils
NC_ 1. 5V
48mils
11
8
10
9
16 ,27 SY NC
16 SD ATI1
16,27 AC_ RESET#
SY NC
SD ATI1 R3 91
AC _RESET#
C 263
C2 62
.1U _16 V_ 04
. 1U_ 16V_ 04
. 1U_ 16V_0 4
GN D
R ESERVED
Azalia_ SD O
R ESERVED
GN D
3.3 V Ma in/a ux
Azalia_ SY NC
GND
Azalia_ SD I
GND
Azalia_ RST# Azalia _BCLK
2
4
6
8
10
12
J_ NEW1
12
14
15
10
9
NC_ RST#
Z3207
1 6,2 6, 29 PE_ WAKE#
19 NEWC AR D_C LKREQ#
3VS
19 PCI E_CL K_ NEWCARD
19 PC IE_CL K_NEWCAR D#
Z3 210
7
21
R2 20
16
*10K_ 04
DE L
16,2 7 SDATO
C26 1
*100 K_04
NC_ CPUSB#
18
15 PE1_RX_ NEW
15 PE1_RX_ NEW#
15 PE1_ TX_ NEW
15 PE1_ TX_ NEW#
3V
0 _04
MDC_ VCC R61 3
L 68
Z3 203
Z3 20 1
FCM1 608K-12 1T0 6
NEWCARD _CL KR EQ#
R1 72
10K_ 04
J_M DC1
3V
12
11
3V
2
1
MDC
13
17
4
11
16
19
18
22
21
25
24
C 268 . 1U_10V_ X7R _04
C 267 . 1U_10V_ X7R _04
3
2
1 5 USB_P10+
1 5 USB_P10-
D0 3
J_MDC1
SD ATO
R171
*10 0K_04
Z320 6
ENE P2231NF E2 pin1,8,9,10,20 has
internally pulled high (110~330K
Ohm)
1
3
5
7
22 _04
Z32 04 9
11
R1 73
R63 5
R63 4
7. .9, 12, 16 ,18 ,19 SDATA
7. .9, 12, 16 ,18 ,19 SCLK
0_ 04
0_ 04
8
7
R38 4
0 _04 BIT_CL K
BIT_CLK
+3.3 V
+3.3 V
+1.5 V
+1.5 V
PERST#
C PPE#
C PU SB#
W AKE#
C LKREQ#
R EFCL K+
R EFCL KPETp 0
PETn 0
PERp 0 RESER VED
PERn 0 RESER VED
U SB_ D+
U SB_ D-
SMB_ DATA
SMB_ CLK
GND
GND
GND
GND
5
6
Sheet 32 of 47
New Card/ mDC/
TV/ Robson
Z320 8
Z320 9
1
20
23
26
13 080 1-1
D 03 3 /4
Z320 5
+3.3 VAU X
16 ,27
PIN GND 1~4 =G ND
C56 2 C56 1
8 80 1 8 -1 2 0 0
.1U _16 V_04
*22P_04
JTC1
TV TUNER
J RCA1
1
C ABL E_TV
2
3
R F_HRS_ UFL-R -SMT
TV-GND
L5 3
1
2
3
4
FR -00 5D
HCB4 532 KF- 800 T60
C 380
ROBSON CARD
.1 U_1 6V_04
JMI NI -ROBSON 1
TV-GND
1
3
5
16,26 ,29 PE_W AKE#
TV- GND
3VS
R 162
1 0K_04
RO BSON _C LK REQ#
TV CARD
JMI NI- TV1
1
3
5
16 ,2 6,29 PE_ WAKE#
3 VS
3V
R17 9
R63 3
1 0K_0 4
*1 0K_0 4
D03
7
11
13
9
15
WAKE#
BT_D ATA
BT_C HCL K
CL KR EQ#
REFCL KREFCL K+
GN D0
GN D1
3 .3V_ 0
1 .5V_ 0
U IM_ PW R
U IM_ DATA
UI M_C LK
UIM_RESET
UI M_VPP
GND 5
2
6
8
10
12
14
16
Z32 24
Z32 25
Z32 26
Z32 27
Z32 28
1. 5VS
15
15
15
15
PE6_ RX_TV#
PE6_ RX_TV
PE6_ TX_TV#
PE6_ TX_TV
PE6 _ RX_ TV#C 269 . 1U_10V_ X7R _04
PE6 _ RX_ TV C 260 . 1U_10V_ X7R _04
PE6 _ TX _TV #
PE6 _ TX _TV
35
23
25
31
33
17
19
37
39
41
43
45
47
49
51
GN D2
GN D3
GN D4
GN D11
PETn0
PETp0
PERn0
PERp0
NC 3
NC 4
NC 6
NC 7
NC 8
NC 9
NC 10
NC 11
NC 12
NC 13
889 10- 520 4
GND 6
GND 7
GND 8
GND 9
G ND1 0
W_D ISABL E#
PER SET#
NC(SMB_CL K)
NC (SMB_D ATA)
NC(USB_ D-)
NC( USB_D+)
3.3 VAU X
1 .5V_ 1
1 .5V_ 2
3 .3V_ 1
NC(LED_ WWAN# )
LED _WLAN #
N C(L ED _WPAN# )
L 92
FCM1 608 K-12 1T0 6
L 93
*FCM1608 K-121T0 6
C 534
3V
.1U _16 V_04
1 0U_ 10V_ 08
4
. 1U_16V_0 4
10U _10 V_08
28 RO BS ON _D ET#
1 5 PE5 _R X_ ROBSO N#
1 5 PE5_R X_ ROBSON
15 PE5_ TX_ ROBS ON #
1 5 PE5 _TX_ R OB SON
18
26
34
40
50
20
22
30
32
36
38
24
28
48
52
42
44
46
RO BSON_ DET#
PE5_ RX _R OB SON#C1 90 .1 U_1 0V_X7R_0 4
PE5_ RX _R OB SON C1 92 .1 U_1 0V_X7R_0 4
PE5_ TX_ ROBSON#
PE5_ TX_ ROBSON
Z323 0
Z323 1
Z323 2
BU F_ PLT_ RST# 15 ,2 5,2 6
R17 6
R17 5
TV_ 3V
D03
3 .3 V_ 0
1 .5 V_ 0
U IM_PWR
UIM_ DATA
U IM_ CLK
UIM_RESET
U IM_ VPP
GND 5
2
6
8
10
12
14
16
3VS
Z3 219
Z3 220
Z3 221
Z3 222
Z3 223
1 .5VS
C32 1
C32 4
C 323 C 325
. 1U_ 16V_ 04
10 U_1 0V_08
.1 U_1 6V_04
10U _10 V_ 08
4
KEY
3 VS
TV_EN
0_0 4 USB_P90_0 4 USB_P9+
CLKREQ#
REFCL KREFCL K+
GN D0
GN D1
3VS
C5 31 C5 35
KEY
21
27
29
C53 0
19 PC IE_ CL K _R OB SON#
1 9 PCIE_ CLK_ ROBS ON
D0 3 3 /3
TV_ 3V
5A POWER PLAN
7
11
13
9
15
WAKE#
BT_ DATA
BT_ CHCL K
USB_ P9- 15
USB_ P9+ 15
1 .5 V
1.5 V 4 ,5, 7.. 9, 40, 43
1 .5 VS
1.5 VS 11 ,13 ,1 5,1 7,2 9, 41, 43
21
27
29
GN D2
GN D3
GN D4
35
23
25
31
33
GN D11
PETn0
PETp0
PERn0
PERp0
17
19
37
39
41
43
45
47
49
51
GND 6
GND 7
GND 8
GND 9
GND1 0
W_D ISABLE#
PER SET#
NC (SMB_C LK)
NC (SMB_D ATA)
NC(USB_D-)
NC(USB_D+)
NC 3
NC 4
NC 6
NC 7
3.3 VAU X
1 .5 V_ 1
NC 8
1 .5 V_ 2
NC 9
3 .3 V_ 1
NC 10
NC 11
NC (LED_WWAN# )
NC 12
L ED _WL AN #
N C(L ED_WPAN# )
NC 13
889 10 -52 04
18
26
34
40
50
20
22
30
32
36
38
24
28
48
52
42
44
46
ROBSON _EN
R35 2
R35 3
0_ 04 USB_P11 0_ 04 USB_P11 +
BU F_ PL T_ RST# 15 ,25 ,26
SC LK 7 .. 9,1 2,1 6,1 8, 19
SD ATA 7 ..9 ,12 ,16,1 8,1 9
U SB_ P1 1- 1 5
U SB_ P1 1+ 15
3 VS
1 .5VS
3 VS
1. 5VS
TV_ 3V
D03
5 VS
5VS 12,1 7,1 8, 20. .23 ,2 7,2 9.. 31, 43
3 VS
3VS 7..9 ,1 2,1 3,15.. 30 ,39,41 ,4 3
3V
3V
6,1 2,1 3,1 5. .17 ,20,24 ,2 6,29.. 31, 40 ,41 ,43
New Card/ MDC/ TV/ Robson B - 33
B.Schematic Diagrams
6
Z3 229 20
1
16 PCI RST#
C
4
3
C3 78
U8
74AHC 1G0 8GW
1
16 PCI RST#
Schematic Diagrams
18
AJ AUDIO4
1
J AD J1
Audio Board
LINE-R_A
5
4
3
6
2
1
Z3306
Z3312
AJADJ1
LINE-L_A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
VDD5_A
CIR_RX_A
LINE-R_A
LINE-L_A
SPDIF-OUT_A
MIC1_R_A
MIC1_L_A
B.Schematic Diagrams
LINE_SENSE_A
HCB2012KF-121T30_08
AL7
J D_SENSE_A
AMP_MUTE_A
HP_SENSE_R
MSPKR_A
MSPKL_A
AL6
HCB2012KF-121T30_08
Z3307
AC7
2SJ -S870-010
AC8
330P_50V_X7R_04
AJ AUDIO3
5
4
3
6
2
1
Z3309
Z3310
Z3311
FCM1608K- 121T06
4 BLUE
330P_50V_X7R_04
A_AGND
SPDIF- OUT_A AL5
LINE IN
(SURR)
Z3305
SPDIF
OUT
2SJ-S870-010
AC6
3 BLACK
680P_04
GND_A
AJ AUDIO2
A_AGND GND_A
Sheet 33 of 47
Audio Board
MIC1_R_A
MIC_SENSE_A
FCM1608K- 121T06
AL4
5
4
3
6
2
1
Z3304
Z3313
MIC1_L_A
AL3
Z3303
FCM1608K- 121T06
AC5
MIC IN
(CENTER)
2SJ-S870-010
AC4
680P_04 680P_04
2
PINK
A_AGND
AJ AUDIO1
5
4
3
6
2
1
HP_SENSE_A
AMP_MUTE_A
MSPKR_A
AL2
HCB2012KF- 121T30_08
Z3301
MSPKL_A
AL1
HCB2012KF- 121T30_08
Z3302
SPEAKER OUT
(FRONT)
2SJ-S870-010
AR4
AR5
AC3
AC1
AC2
1 GREEN
680P_04 680P_04 .1U_16V_04
LI NE_SENSE_A
AR3
JD_SENSE_A
10K_04
1K_04
MIC_SENSE_A
AR2
20K_04
HP_SENSE_A
AR1
39.2K_1%_04
1K_04
HP_SENSE_R
5
4
A_AGND
3
1
2
6
SOLDER SIDE VIEW
(Audio Board)
AU1
CIR_ RX_ A
AH1
AH3
H6_0D2_3 H6_0D2_3
AH2
C48D48N
AH4
C48D48N
VDD5_A
BR3
100_08
Z3308
GND_A
AC9
.1U_16V_04
GND_A
4.7U_10V_08
GND_A
C.IR
IRM-V038/TR1
AC10
GND_A
B - 34 Audio Board
O
G
V
Schematic Diagrams
Card Reader Board
VC C_C ARD _B
BJ_CR 1
P6
P13
P12
P21
P22
P23
VCC _MS
VSS_SD
VSS_SD
VSS_MS
VSS_MS
CD _SD
WP_SD
CLK_SD
CLK_MS
C MD _SD
BS_MS
DAT0_SD
DAT0_MS
DAT1_SD
DAT1_MS
DAT2_SD
DAT2_MS
DAT3_SD
DAT3_MS
GN D
GN D
I NS_MS
MD R 019H -05- A
P1
P11
P7
P14
P4
P20
SD _CD #_B
SD _WP_B
P9
P18
P10
P19
P2
P17
P3
P15
MS/SD_D 0_B
MS/SD_D 1_B
MS/SD_D 2_B
MS/SD_D 3_B
C LK_SD _B
MS_BS/ SD _CMD_B
MS_CD #_B
Sheet 34 of 47
Card Reader Board
P16
GND _B
VC C_C ARD _B
BJ1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
88028-2010
SD_C D#_B
SD_WP_B
C LK_SD_B
MS_BS/SD_C MD _B
MS_C D#_B
BH 1
BH4
BH 2
H 6_0D2_3 H 6_0D2_3 H7_0D 2_8
MS/ SD_D 0_B
MS/ SD_D 1_B
MS/ SD_D 2_B
MS/ SD_D 3_B
C AR D _PWR EN#_B
BH 3
GND _B
GND _B
H OLE3_4
GN D_B
GND _B
GN D_B
Card Reader Board B - 35
B.Schematic Diagrams
P5
P8
VDD _SD
Schematic Diagrams
Click Board
V C C 5_C
VC C 5_C
V CN2
V CN1
10MIL
1
2
3
4
1
2
3
4
85201-0405
B.Schematic Diagrams
TP A D D A TA_C
TP A D C LK _C
VC 4
.1U _16V_X7R _06
Sheet 35 of 47
Click Board
12
11
10
9
8
7
6
5
4
3
2
1
12
11
10
9
8
7
6
5
4
3
2
1
10K _04
TP A D D A TA_C
TP A D C LK _C
10MIL
V R4
SW _L
*0_04
SW _R
V C2
V C1
120P _06 120P _06
plan
GND_C
V C C 5_C
V C C 5_C
V R1
V R5
10K _04
10K _04
V S W E B1
V SW E B 2
1
3
2
4
SW _R
H C H STS -05-A
GND_C
C H2
CH4
H 6_0D 2_3 H 6_0D 2_3
G N D _C
GN D _C
CH1
CH3
C 48D 48N
C 48D 48N
1
3
2
4
H C H STS -05-A
GND_C
(? )
B - 36 Click Board
V R2
10K _04
10MIL
8 71 52 -1 2 07
GND_C
V R3
S W _L
VC 3
120P_06
Schematic Diagrams
Hotkey Board
DWEB1
1
3
2
4
H OT KEY1 # _D
H CH STS-05-A
GND_D
DJ_KEY1
1
2
3
4
85202-0405
HO T KEY1 # _D
HO T KEY2 # _D
DSWEB1
1
3
2
4
H OT KEY2 # _D
GND_D
Sheet 36 of 47
Hotkey Board
SPI_TOOL1
2
1
4
3
6
5
8
7
10
9
SXUAZ- 10S2-B
Z3601
Z3602
Z3603
Z3604
Z3605
PL ACE T OP SID E
SPI_TOOL2
Z3606
Z3607
Z3608
Z3609
Z3610
(Hotkey Board)
DH 1
D H2
H6_0D2_3 H 6_0D 2_3
D H3
C 48D48N
GND _D
GN D_D
2
1
4
3
6
5
8
7
10
9
SBH Z- 10S1-B
PL ACE B OTT OM SI DE
SPI FLASH TOOL
Hotkey Board B - 37
B.Schematic Diagrams
H CH STS-05-A
GND_D
Schematic Diagrams
Switch Board
3VS_E
VIN _E
3V_E
ER 7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
PWR S _1
LID_S W #_1
W EB 0#_1
W EB 1#_1
W EB 2#_1
3VS _E
SC R OLLOC K#_1
CAP SLOCK#_1
NUMLOC K#_1
HDD_LED#_1
CR _LED#_1
Z3706
20MIL
Z 3707
220_08
ED 5
C
A
GND_E
EJSW1
HT- 150NB-D T
ER 1
220_08
Z 3701
A
ED 1
C
SC RO LL OC K# _ 1
ED 2
C
CA P SL OC K# _ 1
ED 3
C
N UM L OC K# _1
ED 10
C
H DD_ L ED # _1
BW-150U YG-C T
ER 2
220_08
Z 3702
ER 3
220_08
Z 3703
A
BW-150U YG-C T
A
BW-150U YG-C T
ER 5
Z 3705
2 2 0_ 0 8
A
85201-1505
B.Schematic Diagrams
GND_E
BW-150U YG-C T
C R_LED #_1
ER4
22 0 _ 0 8
Z 3704
A
ED 4
C
BW- 150UY G- CT
GND_E
Sheet 37 of 47
Switch Board
3V_E
ER 6
2 . 7K _ 04
VIN _E
EU 1
EC1
1000P_50V_04
1
6
2
VS
PR G
GN D
Q
GN D
GN D
LID _SW # _ 1
3
4
5
TLE 4917DS
ESW1
1
3
P W R S_1
2
4
EC 2
H CH STS-05-A
.1U _50V_Y 5V_06
GND_E
GND_E
GND_E
ESWEB1
E SW E B2
1
3
2
4
W E B0 # _ 1
1
3
2
4
W E B 1# _ 1
H CH STS-05-A
HC H STS-05-A
GND_E
GND_E
E SW E B3
1
3
2
4
H CH STS-05-A
GND_E
(Switch Board)
EH1
EH 3
EH 5
EH 7
H6_0D 2_3 H6_0D 2_3 H 6_0D 2_3 H 6_0D2_3
B - 38 Switch Board
GN D_E
GN D_E
EH2
C48D 48N
EH 4
EH 6
C48D 48N C 48D 48N
GN D_E
GND _E
W E B 2# _ 1
Schematic Diagrams
USB Board
60 mil
60 mil
EMI sol ution,when placement
near to USB Port?
EMI so lution,whe n placement
near t o USB Port ?
FJ _U SB2
FL 5
3
USBP2 _ F
2
3
FC 7
4
5
Z3 81 0
. 1U _1 6V_ 0 4
. .
4
USBN 0 _F
2
Z3 80 9
Z3 81 1
Z3 81 2
1
8
CM-4M3216 -18 1J T
FL3
7
8
60 mil
U SBVC C1
6
7
. .
USBN 2 _F
5
6
FJ _USB3
VC C 0
GN D
USBVC C 2
GND 1
FL2
D ATA 0D ATA 0+
GN D
GND 2
GN D
GND 3
FL6
GND 0
VC C 1
D ATA 1D ATA 1+
GN D
U SBN 4_F
4
U SBP4 _F
3
U SBN 6_F
2
U SBP6 _F
GND 4
GND 1
1
2
Z3 80 3
3
FC 13
4
5
. 1U _16V_ 0 4
Z3 80 4
5
Z3 80 5
6
6
7
Z3 806
1
8
C M-4 M321 6-1 81 JT
60 mil
U SBVCC 2
FL4
FC9
3
10 U_ 10V_ 08
VI N
VOUT
G ND
RT97 01 -C PL
USBVC C 1
FC 2
4
FC1
FC 8
FC 6
10 U_ 1 0V_08
2
GN D
G N D2
GN D
G N D3
GN D
G N D4
GN D0
VC C 1
D ATA1D ATA1+
GN D1
C 107 92 -1 08 0 3-00 D
Sheet 38 of 47
USB Board
GND_F
5VS_ F
1
5
G N D1
100U_ 6. 3 V_B
FU 1
VOUT
D ATA0+
. 1U _16V_ 0 4
GND_F
VI N
GN D
D ATA0-
FC 14
+ FC 11
. 1U _1 6V_ 0 4
10 0U _6.3 V_ B
4
VC C 0
H C B20 12 KF- 121T30 _ 08
FC 10
5 VS_F
7
8
GND_F
C 10 792-1 0803-00D
HC B2012 KF-12 1T3 0_ 08
+ FC12
Z3 80 1
6 0 mil Z3 80 2
H CB201 2 KF-1 21T30 _0 8
. 1U _1 6V _04
1 0U _1 0V_ 08
. 1 U_16V_0 4
3
FU 2
VI N
VO UT
VI N
VO UT
GND
1
USB VCC 2
5
2
FC 3
FC4
FC 5
. 1U _1 6V_0 4
10U _1 0V_0 8
.1 U_ 16 V_04
RT97 01- CPL
GND_F
GND_F
GND_F
GND_F
5 VS_ F
(? )
FJ _U SB1
FH 2
FH 3
FH1
H 6 _0 D2 _3 H 6_ 0D 2_ 3 H8 _0 D 2_ 8
FH4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
8721 6-20 00
FH 5
C5 9D 59 N C 59 D5 9 N
U SBN0 _F
U SBP0_ F
USBN 2_F
U SBP2_ F
GN D_ F
GND _F
USBN 4_F
USBP 4_ F
USBN 6_F
USBP 6_ F
GN D _F
GND_F
GND_F
USB Board B - 39
B.Schematic Diagrams
USBP0 _ F
1
60 mil Z3 80 8
. .
Z3 80 7
H CB2 012 KF-1 21 T3 0_08
. .
FL 1
USBVC C 1
Schematic Diagrams
Power CPU_VTT
ISL6314CR POWER CKT
5V
5V
5V
V6 314
PR 207
PR4 8
PR20 8
2 .2_06
R3
2. 2_0 6
PC43
6X 6 QFN
Sheet 39 of 47
Power CPU_VTT
5
6
7
8
4
BSC 059N0 3S
22
Z3903
PR 205 2. 2_ 06 Z3 907
PC153. 1U _2 5V_X7R_06
V1 .1
PJ11
Z39 01
23
24
21
PL8
ISEN
Z3904
PHASE
PR1 98
PC 14 9
PC1 50
20K_1%_04
. 1U_ 16 V_04
. 1U _2 5V_X7R_06
Z39 10
14
PR 74
75K_ 1%_0 4
PC 35
10N F_5 0V_0 4
9
4
PQ45
I SENNO
PR1 03
C
16
15
25A1
0. 82U 1 3*13 *6. 7
2
Z39 02
PQ46
PC1 59
2. 2_ 08
4
BSC 04 2N03S
C PU_VTT
20 mm
PD 22
9
A
ISEN+
ISEN-
Z3919
1 _0 6
19
5
6
7
8
BOOT
UG ATE
PHASE
LG ATE
15U_25V_6X4.5
*4. 7U _25V_X5R_08
9
PQ44
1 U_16V_ 06
PR206
PVCC
+ PC157
. 1U _50V_06
1
2
3
18
PGO OD
EN
VID 7
VID 6
VID 5
VID 4
VID 3
VID 2
VID 1
VID 0
1
2
3
C PUVTT_VI D7
C PUVTT_VI D6
C PUVTT_VI D5
C PUVTT_VI D4
C PUVTT_VI D3
C PUVTT_VI D2
C PUVTT_VI D1
C PUVTT_VI D0
4 CPU VTT_ VID 4
4 CPU VTT_ VID 3
4 CPU VTT_ VID 2
1
17
32
25
26
27
28
29
30
31
VIN
PC 42
*10K
PC1 52
F M 58 22
+
PC5 0
PC 162
+
5 60U
PC17 1
+
5 60 U
PC168
. 1U _16V_04
PC1 69
. 01U _5 0V_X7R _04
*330U
1000P_50 V_04
BSC042N0 3S
PHASE
OC SET
13
Z3911
PR 194
2K_1 %_04
ISEN
V1. 1
NC
20
PR66
5V
100_04
4
CPU_VTT_FB
4
CPU_VTT_FB-
12
PC145
*0. 01 U_5 0V_ 04 1 1
PR61
PC1 47
100_04
*0. 1U _16V_0 4*0. 1U _16 V_0 4
VDI FF
Z39 17
10
PR57 249_ 04 Z3 90 6 PC28 8 20 P_50 V_04
PR5 6
VSEN
DVC
8
Z3912
PR 181
RG ND
22K_ 04Z3913 PC14 0
820 P_5 0V_04
PR 18 5
2K_ 04
PC144
Z39 08
Z3909
FB
5
4
V6314
FS_VCC
3
SS_VCC
COMP
Z3918
7
Z3914
REF
PC 139 22 P_50V_04
PC 141 10 00 P_50 V_04 PR179 20K_04Z3916
PC 13 81000P_50V_0 4
FS
APA
6
Z3915
PR 20 4
2K_04
*2K_0 4 2K_ 04
SS
SY S3V
D 03
PR 18 2
R235
2 2K_ 04
PR183
PC142
82K_ 04 100K_ 04
0. 01U _50V_04
BOTTOM PAD
CONNECT TO GND
Through 8 VIAs
PR1 22
PR12 0
10 0K_ 04
100 K_04
1.1V EN
D
3VS
PQ13
2N7 00 2W
Z39 21 G
PC 154
S
0.1U_16V_X7R_0 4
PR 248
D
10K_04
V6314
PJ3
V6314
*12K_04 FS_VC C
PR 49
*82K_04 SS_VC C
41 1. 1VPWG D
PR129
*0_04
PR126
*0_04
Z3 920
G
PQ14
2N 70 02W
*O PEN _4 0mil
S
28 VTTPW R_ON
PR5 0
D0 3
1.L/DCR=R9*C16
2.Vdroop=Io*DCR*R9/R8
3.100uA*R10=Ioc*DCR*R9/R8
4.Vapa=100uA*R11
20,2 4,30, 40 ..4 2, 44 ,45
4, 17, 24,3 0,3 1, 40 ,41 ,4 3. .45
VIN
5V
44,45 SYS3V
7.. 9, 12, 13 ,15.. 30,32, 41, 43 3VS
4, 5,1 5, 18,44
B - 40 Power CPU_VTT
PR77
PR1 87
PR 52 3K_04
GND
PR 51
1 00 K_04
2
OFS
9
PR 78
PR7 5
PR 72
PR67
PR6 4
PR 60
*2. 2K_04 2 .2 K_04 *2. 2K_04 *2. 2K_ 04 *2.2K_04 *2. 2K_04 2 .2K_04 *2 .2K_04
CPUVTT_VI D7
CPUVTT_VI D6
CPUVTT_VI D5
CPUVTT_VI D4
CPUVTT_VI D3
CPUVTT_VI D2
CPUVTT_VI D1
CPUVTT_VI D0
33
B.Schematic Diagrams
1. 1V EN
VC C
.1 U_16V_ 04
*. 1U _16V_04
4 4 VTT_PWR OK
Z3905
U15
ISL6314C RZ
5
6
7
8
1U_1 6V_06
PC1 55
1
2
3
PC 14 3
2
PC151
1
1K_ 04
CPU_ VTT
PR203
PR1 99
PR 19 6
PR19 3
PR1 91
PR 18 9
*2K_ 04 *2K_0 4 *2K_0 4 *2K_ 04 2K_0 4
Schematic Diagrams
Power 1.5V, 0.75VS, 12V
1.5V,0.75VSM
VIN
5V
V1 .5
PR217
1M_04
10_06
A
3V
PR 232
BST
6
8
Z401 4
9
Rb
Z401 9
10
PC1 96
PR225
10_06
10K_1%_04
CO MP
Z40 12
5
PC183
PC182
PR21 5
PC 192
PC186
1U_ 10V_06
*0.0 68 U_10V_0 4
0_0 6
100 0P_5 0V_X7R_ 04
1U _10V_06
VSSA
LX
4
1A
14
15
Z40 10
*O PEN _3mm
PR231
PC191
PC 193
20K_ 1%_0 4
4. 7U_ 6. 3V_X5R_06
10U _10 V_08
12
13
V1.5
PC1 87
PC188
10U_10V_ 08
1U_10V_06
1
11
DL
2 1 Z4011
22
Z4001
19
Z4002
D0 3
3/ 3
V1.5
PJ1 5
PL11
9
VSSA
VTT
VTT
VDDP1
20
VDD P2
VDD P2
EN/ PSV
PGN D1
PGN D1
PGN D2
VTTEN
4
25 A1
0.6UH
9
PD26
PC2 03
+
FM5822
PQ6 0
1 U_ 10V_ 06
BSC042N 03S BSC 042N0 3S
PC2 05
+
4 70U
PQ58
2
1.5V
20mm
4
5V
PC 195
PC2 04
+
4 70U
PC 201
.1 U_1 6V_0 4
*330U
PC2 02
. 01U _50V_X7R_ 04
Sheet 40 of 47
Power 1.5V,
0.75VS, 12V
PR 134
0 _0 6
VSSA
18
16
17
SC486
PR 237
5V
1. 5VEN
2 20K_1%_04
D
VI N2
G
PC1 97
PQ56
2N 7002W
PC1 74
. 1U_16V_ 04
1 0U_25 V_ 12
S
4 3 DD _ON #
1 2V
PR213
VTTEN
PC18 4
V IN
Error output 5
PU 5
Erro r
Vo ut
PQ17
AO34 09
S
D
VDD 3
DD _ON #
PD8
A
3
FM0540 -N
C
SD
4
G
VI N2
PR13 2
PR221
10K_04
28
GND
VI N
.1 U_16V_0 4
SN S
0.5A
1
2
6
Vo T
LP2951CDR 2G
Z4006
10 0K_04
Z4004
PR 133
Z4 005
2 0K_1 %_ 04
PW R_SW #
D0 3
PQ2 0
2 N70 02 W
D
PQ 52
2N7002W
D
G
G
PJ5
*OPEN_40mil
PQ19
2N7002W
PQ18
2N 70 02W
G
PC17 7
D03
10 U_25V_1 2
DD _ON 28, 43
S
0_ 04
G
FM0540 -N
C
S
D
PR 214
*0_04
S
43 DD_ON#
PR 218
VIN1
PD9
A
P R2 1293 1K _1 % _04 P R2 1110 0K _1 % _04
41, 43 SU SB
8
100K_04
VA
FB
2 20K_1%_04
7
PR 219
D
5V
S
1
VTTS
IL IM
4
BSC 059 N03S
PR 234
4 .9 9K_1%_04
VCC A
VIN
+ PC200
1 5U_ 25V_ 6X4 .5
*4.7 U_2 5V_X5R _08
9
PQ59
Z40 03
2 3 Z4008
PC 78
. 1U_ 50 V_06
5
6
7
8
Z40 17
PC77
PR 235
0 _0 6
DH
*0.1U_16V_04
PJ1 4
. 1U_25 V_ X7 R_0 6
FB
REF
PC18 5
PR223
16
2 4 Z4007
PC 181
PR22 0
. 1U_10 V_ X7 R_0 4100K_04
30 PWRS#
20, 24, 30 ,39 ,41,42, 44, 45
45
4 ,17 ,24,30, 31, 39 ,41 ,43.. 45
4 ,5, 7. .9, 43
VI N
VI N1
5V
1.5 V
7 .. 9
44
6,1 2, 13, 15..1 7, 20, 24,26,29.. 32 ,41 ,43
16,21,24,28, 31, 42,43,45
0. 75V
12 V
3V
VDD3
Power 1.5V, 0.75VS, 12V B - 41
B.Schematic Diagrams
Z401 6
Z401 5
1.5V_ PW RGD
Z4009
PR 236
0 _0 6
TO N
1
2
2
Z401 3
C
1U _10V_06
PR 222 10 _06
2
100K_ 04
1. 5V_PW RGD
A
PC18 9
1U _10 V_06
7
5
6
7
8
PC190
200_1 %_04
PGD
1
2
3
PR216
D03
VDD QS
5
6
7
8
3
1
2
3
Z401 8
1
2
3
10_ 06
C
PR226
Ra
0 .75V
PR224
PD25
FM05 40 -N
PU6
Schematic Diagrams
Power 1.8VS, 1.1VS
5V
<N AME>
A
1.8VS
PC66
PC 67
PD 6
4.7U_25V_X5R_08
FM0540-N
PR91
5V
680K_04
PR105
EN_1.8VS
1
2
C
. 1U_50V_06
15K_1%_04
*0_04
G
Z4105
8
Z4101
AO 4932
0. 22U_16V_X7R _04
Sheet 41 of 47
Power 1.8VS, 1.1VS
FB
DL
PAD
*330P_50V_04
0. 1U_50V_06
1
2
PL9
2.5UH_6.8*7.3*3.5
1
2
Z4102
Z4104
5
6
14
15
N. C
N.C
VC C
PC52
V1. 8
3A
3
Z410 3
17
2
1.8VS
10mm
PQ48B
3
4
PJ12
1
PC 172
PC 173
150U_4V_B2
0.1U_16V_04
AO4932
PC58
4
9
BST
VOU T
G ND
Z4106
LX
PGD
RT N
10
8
Z4107
PU1
SC412A
1U _10V_06
5
11
I LIM
13
10K_0 4 1.8V_PWR GD
N.C
PR95
3V
EN
N .C
D 03
12
6
G
PJ1
*OPEN_40mil
7
PQ6
2N7002W
S
3VS
PR92
PR93
PC47
0_04
37. 4.K_1%_04 2 0P_50V_04
PC46
PR94
0. 1U_16V_X7R _04
24.9K_1%_06
PR123
PC 72
21.5K_1%_04
13K_1%_04
20P_50V_04
PR249
FB
2
VC C
3
DL
PAD
4
Z4112
PR121
0. 1U_16V_X7R_04
24.9K_1%_06
Z411 3
4
9
9
1
4
FM5822
PC 178
+
PQ51
PQ 50
PC73
BSC 042N03S
BSC042N03S
1U _10V_06
11,13,15,17, 29, 32, 43 1. 5VS
20, 24,30,39,40,42,44,45 VIN
4,1 7,24, 30, 31, 39, 40,43..45 5V
6, 12, 13, 15..1 7,20, 24, 26, 29. .32,40,43 3V
7.. 9,12, 13, 15. .30,32,39,43 3VS
5,13 1. 8VS
10. .13,17,19,43 1. 1VS
43 1. 8V_PWRG D
PC179
+
560U
17
2
20mm
PD23
PWM frequency 200KHZ at 4A
load; 260KHZ at 20A load
B - 42 Power 1.8VS, 1.1VS
25A
0.82U 13*13*6.7
C
BST
PJ13
PL10
Z4109
5
6
7
8
1
A
VOU T
V1.10
0.1U_50V_06
LX
90 .9K_1%_04
PC74
2
PQ49
BSC 059N03S
15U_25V_6X4.5
1
2
3
9
D H 16
PGD
10
N. C
I LIM
11
8
5V
4
VIN
+ PC 170
PC 59
0.1U_50V_06
*4. 7U_25V_X5R _08
1
2
3
Z4114
D 03
PR124
PC70
PC 76
5
6
7
8
Z4110
15
13
39 1.1VPW GD
PU3
SC412A
1
2
3
C
PQ16
E2N3904
EN
G ND
10K_04 B
12
RT N
PR244
10K_04
5
1. 5VS
PR 125
14
D
*0_04
100K_04
3V
Z4111
0. 1U_16V_X7R_04
N.C
PR131
FM0540-N
N .C
40,43 SUSB
5V PR130
5. 36K_1%_04
Z4108
PC75
PQ 15
2N7002W
*OPEN_40mil G
PD 24
PR128
N.C
PJ 4
D0 3
3/ 3
EN_1.1VS
5
6
7
8
9
470K_04
6
PR127
D0 3
7
5V
C
1.1VS
1
A
5V
S
B.Schematic Diagrams
100K_04
S
PR90
D
5V
D H 16
PC 55
7
D
PQ48A
SU SB PR89
PC45
PQ 5
2N7002W
PC 180
+
560U
PC175
PC 176
0.01U_50V_X7R_04
0.1U _16V_04
330U _2. 5V_D 3
1.1VS
Schematic Diagrams
Power AC_In, Charge
PR5
10 K_1%_0 4
200 K_1%_0 4
BAT
Z42039
0 _04
PQ1 0B
SP8K10 SFD5TB
Z4 235
1
5
6
PR2 10
0 _04
PR117
BAT
PR11 6
20 m_ 32 16
+
V_ BAT
PC1 63
. 1U_ 50V_0 6
PC6 8
.1U _25 V_X7 R_0 6
Z4218
Sheet 42 of 47
Power AC_In,
Charge
PR16 7
PC63
PC62
.1U_50 V_06
. 1U_50V_06
PC 60
PD7
PC69
FM0 540 -N
1U _25 V_08
C
AZ423 4
100 K_1%_0 4
.1U_5 0V_06
Z420 4
PC64
.1 U_1 6V_04
VA
Z4205
Z4226
Z4207
Z4201
Z4216
Z4217
SGN D5
PR11 2
32
31
30
29
28
27
26
25
1K_1 %_04
0 _06
Z4239
PC56
PR11 3
10 .2K_ 1%_04
SG ND5
SG ND5
SY S5 V
PC5 1
*22P_50 V_04
SG ND5
PR1 07
PR1 02
22 00P_5 0V_X7R_ 04
PR109
0_ 04
1 K_1%_0 4
PC5 3
10K_1%_0 4
1 00P_ 50V_04
. 1U_ 16 V_ 04
PR1 04
TOTAL
POWER
ADJ
C TL1
Z42 33
Z42 32
Z42 14
P R1 10 3 9.2 K_ 1% _0 4
MB39A1 32
. 1U_5 0V_06
P C 57
PR106
3. 9K_1 %_04
T RER MAL PA D
PC61
PC16 7
.1U _50V_06
.1U_50V_0 6
SGND5
SGND5
PR 98
4 5.3 K_ 1% _0 4
. 1U_ 50V_0 6
24
23
22
21
20
19
18
17
33
Z 423 7
PC8
.1U _50V_ 06
PC16 6
VI N
CTL 1
GN D
VREF
RT
CS
ADJ 3
BATT
SGN D
Z 42 03
Z 420 2
PC 11
.1U _50 V_06
VC C
-IN C1
+INC 1
AC IN
AC OK
-IN E3
AD J 1
C OMP1
CT L2
CB
O UT -1
LX
VB
O UT -2
P GND
CE LLS
PC4
1
2
3
4
5
6
7
8
VA
-I NE 1
OUT C1
O UT C 2
+I NC2
-IN C2
A DJ 2
CO MP 2
COM P 3
PU2
9
10
11
12
13
14
Z 42138
5
16
VI N
CHARGE
CURRENT
ADJ
SGN D5
Z42 31
Z423PR1
6 01
D03
3/3
PR1 11
10 0K_04
PC 48
22K_1%_0 4
2 200 P_ 50V_ X7R _04
PC 49
PR9 6
22K_1 %_04
1000P_50 V_X7 R_04
PR 97
93 1_1%_ 04
Z424 0
D
CTL1
0.125V/1A
PR 100
0.5V/1A
PR 99
0_04
28 TOTAL_C UR
PR1 08
Z4 229
100K_04
G
S
D
SYS5V
2N7002W
0_04
Z421 9
JBATT1
PJ2
*OPEN_4 0mil
S
2 8 CHG_ EN
28 CH G_C URSEN
SGN D5
4 0mi l
PQ 7
G
PQ9
2N 700 2W
SGN D5
Z4220
D03
28 SMC_ BA T
28 SMD_ BA T
2 8 BA T_DET
40m il
8 mil
R239
R240
R241
VDD3
1 00_ 04
1 00_ 04
1 00_ 04
Z4221
Z4222
Z4223
C 427
C4 28
C4 26
3 0P_0 4
30 P_04
3 0P_04
1
2
3
4
5
6
7
8
GND
GND
G ND1
G ND2
CO N8_BATT
PR88
BAT
PQ11
DTA114 EU A
E
C
Z42 25
PR11 9
30 K_ 1%_04
BAT1 _VOLT 28
10 K_04
UD Z16B
A
B
Z423 0
PC44
*0. 1U_ 16V_0 4
C
PQ4
Z4 224
D
C
EDTD11 4EK
SYS5V
G
PQ8
2N700 2W
PR11 8
PC71
6. 04K_1%_04
.1 U_16 V_04
16 ,21,24 ,2 8,3 1,4 0,4 3, 45 VDD3
2 0, 24, 30, 39. .41 ,4 4,4 5 VI N
S
VA
B
AC /BATL# 2 0,2 8
PD5
Power AC_In, Charge B - 43
B.Schematic Diagrams
PR11 4
Z421 2
2
10K_08
T otal Pow er 210W
1 5UF M 25V
. 1U_ 50V_06
C harg e Vo lta ge 1 6.8V
D 03
3 /3
PL1
4 .7 UH 5 .5 A 6. 8*7.3 *3.5
1
2
Z4211
C harg e Cu rre nt 3 .2A
P C6 5
PC 1
.1U _50V_06
1 0m_32 16
4 .7U _25 V _X 5R_ 08
PC 120
.1U_5 0V_06
PR3
Z421 3
0_ 04
PC 164 *4 .7 U_2 5V _X 5R_ 08
PR 2
PC12 4
3
2
1
4
PQ10A
SP8K1 0SFD5TB
2
1
7
P C5 4
H CB4532KF-80 0T60
P C1 61 4 .7U _25 V _X 5R_ 08
H CB4532KF-80 0T60
PL3
P C1 60 * 4 .7U _25 V_ X 5R_0 8
PL2
PR1
D03
1 0m_32 16 3/3
PR20 9
4
Z420 8
1
2
3
4
AC IN_ CON
P IN GN D1 ~5 =GN D
VA
VI N
Z4 215
8
J AC1
3
2
1
4
Z 42 10
VA
PQ12
ME48 25 8
3
7
2
6
1
5
4
PQ4 7
4
ME4 825
1
5
2
6
3
7
8
3
2
1
4
P C1 65 4 .7U _25 V_ X 5R_ 08
8
7
6
5
PQ29
ME48 25
8
7
6
5
PQ1
ME48 25
8
7
6
PR11 5
5
PQ30
13 0K_1%_ 04 ME48 25
Z 42 06
AC IN & CHARGER
Schematic Diagrams
Power Switch, ICH_1.1VS
SYS15V
VDD5
PR240
1M_04
3A
PQ 65
AO 4468
8
7
3
6
2
5
1
4
PQ64
AO4468
8
7
3
6
2
5
1
4
SYS15 V
VDD 5
5VS
3A
PJ17
Power Plane
PR164
1M_04
SU SB
40, 41 SU SB
4A
SYS5V
5V
4A
PR 158
Power Plane
1 0K_04
*OPEN_40mil
D D_ON#
D D_ON# 4 0
D
PQ27
2N7002W
PC111
28,4 0 DD _ON
G D D_ ON#
DD _ON
S
PR 150
1 00K_04
PJ8
*OPEN_40mil
PQ22
2 N7002W
G
10 00P_50V_X7R_04
S
10U_10V_08
.1U _10V_X7R _04
1000P_50V_X7R_0 4
Z4305
PR163
100K_04
D
D
PC 207
PQ66
2N7002W
G
SU SB
PC109
PC 100
. 1U_10V_X7R_04
S
D 03
PC 110
VDD 5
Sheet 43 of 47
Power Switch,
ICH_1.1VS
3A
Power Plane
PR242
100K_04
Z4308
D
PC 211
G
10 ,16, 28, 32
VDD 3
PR241
1M_04
PQ5 3
2N 7002W
G
SU SB#
PQ69
AO4468
8
7
3
6
2
5
1
4
SYS15 V
SUSB
PR227
100K_04
10U_10V_08
.1U _10V_X7R _04
2200P_50V_X7R_0 4
3A
3V
3A
Power Plane
EN_15V
PC209
S
SU SB
PC210
PC 212
PQ72
2N7002W
PR2 28
100K_04
3VS
3A
D
PR243
1M_04
PQ 71
AO 4468
8
7
3
6
2
5
1
4
D
VDD3
S
SYS15V
PQ70
2N7002W
G D D_ ON#
S
22 00P_50V_X7R_04
VD D5
SYS15V
1.5V
PR159
1M_04
3A
PQ 26
AO 4468
8
7
3
6
2
5
1
4
1. 5VS
3A
PR2 30
Power Plane
*100K_04
EN_VC CA_1.1VS
D
PC 103
PC 101
PQ24
2N7002W
PR160
100K_04
PQ5 4
10U_10V_08
.1U _10V_X7R _04
.01U_50V_X7R_04
41
G
1. 8V_PW RGD
*2N 7002W
S
G
SU SB
PC102
D
Z4310
S
V1.5
D03
PJ18
0 .5A
5V
PC213
*OPEN_40mil
PR 233
1M_04
2.5A
PQ57
AO4468
8
7
3
6
2
5
1
4
*0 _08
1.5V
2.5A
VC CA_1.1VS
2.5A
Power Plane
Z4309
D
PC 198
SU SB
PR229
0_04
EN_VCCA_ 1. 1VS
PC 194
PQ5 5
2N7 002W
G
PC199
10U_10V_08
.1U _10V_X7R _04
*.03 3U _16V_X7R_ 04
5V
PR239
100K_04
PR245
100K_04
D
1.1VS
PQ73
SUSB
G
5
9
7
PU7
VI N
VI N
PO K
8
EN
1
GND
PC 218
2N7002W
S
PR 238
SY S15V
PC2 19
PC220
0.1U _16V_04
10U_10V_08
1U _10V_06
VCN TL
6
VOUT
4
VOUT
3
VFB
2
2.5A
PC214
82P_50V_04
PR 246
APE8953
PR247
0.1U_16V_X7R_04
19.6K_1%_06
S
B.Schematic Diagrams
D0 3
17 I CH_1. 1VS
24, 30,31,45 VDD 5
16, 21, 24,28, 31, 40,42,45 VDD 3
39,44,45 SYS3V
6,12, 13,15 .. 17,20,24, 26 ,29.. 32,40,41 3V
7. .9,12,13, 15. .30, 32, 39,41 3VS
4, 17,24,30, 31 ,39.. 41,44,45 5V
12, 17, 18,20.. 23,27,29. .31 5VS
24,45 SYS15V
11, 13,15,17, 29,32,41 1. 5VS
4,5,7. .9,40 1. 5V
1 0,11, 13 VC CA_1.1VS
10. .13, 17, 19,41 1. 1VS
B - 44 Power Switch, ICH_1.1VS
IC H_1.1V PJ 19
IC H_1.1VS
*OPEN_3mm
1
2
D03
8.2K_1 %_04
PC215
PC216
PC217
10U_10V_08
10U_10V_ 08
0. 1U _16 V_04
Schematic Diagrams
Power VCORE
5V
5V
PC1 18
PD 18
2 .2U_ 16V_06
C
6.1 9K_1%_0 4 Z444 718
32
25
26
VD RP
PR34
33
27
28
CS3N
Z4410
PR176
PR 31
100 _04
IN
OD
2
5
6
7
8
1
2
3
A
1
5
OCP ~ 100A
Work F=210Khz
PR 58
PR55
PR53
PR46
*2 K_ 04
*2K_04
2K_0 4
2 K_ 04
PJ21
*O PEN_ 40mil
2
2
A
1
2
3
CS3
CS3N
VIN
FM054 0-N
1
PR19
2 .2_ 06 Z443 2
3 phase
option
Z444 4
2. 2_06
2
3
PC9
PC1 22
BSC05 9N03 S
PQ39
BSC042 N03S
PL6
U 14
DRVH
PR20
IN
OD
SWN
DRVL
7
1 0k_ 06
Z440 4
5
NC P5 359D R2G
PC 24
1 5U_2 5V_6X4 .5
2
1 _06 Z4 424 4
4
Z44 20
4
PD20
0. 82U 13*13 *6 .7
PR17 4
4. 7_0 8
PR1 4 PR13
1U_1 6V_06
PQ3 8
POC/MSID USE
A
F M 582 2
BSC04 2N03 S
PC1 33
+
D 03
5V
+ PC12 5
PQ34
Z442PR17
8
3
8
1
2
3
VCC
5
6
7
8
9
0.2 2U_1 6V_06
C
PR6 2
330 U_2 .5V_D3
4700 P_ 50V_04
6
*2K_0 4 *2 K_ 04
PC18
+
56 0U
0_ 04
5
6
7
8
9
5
6
7
8
9
PR43
PR65
*2K_04
1
2
3
6
PR44
2 .2_0 6
PR26 *0 _04
PR71
PC12 9
+
5 60U
0 _04
PC 128
Z4 440 4
2K_04
+
PC12
*4 .7U_ 25V_X5R_0 8 .1U_ 50V_Y5 V_ 06
Place
close to
hottest
MOSFET
H _VID0
H _VID1
H _VID2
H _VID3
H _VID4
H _VID5
H _VID6
H _VID7
PR 73
PC1 30
PR1 7 PR16
PD4
1
2
3
PR18 0
0. 82U 13*13 *6 .7
PR12
4. 7_0 8
A
PC2 2
1
2
3
*680 _04 *68 0_04
4
BSC 042N 03S
C
PR18 4
680 _04
PL4
PD3
4
Z44 19
PQ35
1
PR186
680_ 04
7
SWN
BSC05 9N03 S
PQ32
BSC042 N03S
DRVL
1U_1 6V_06
5V
RTH 1
10 0K_06
B ST
PR 188
1 0k_ 06
Z440 3
1
2
3
PR6
NC P5 359D R2G
PC 10
15 U_25 V_ 6X4 .5
5
6
7
8
9
DRVH
P GND
PR1 90
68 0_0 4 6 80_ 04
+ PC11 6
1 _06 Z4 423 4
5
6
7
8
9
C
2
3
Z442PR16
7
9
8
12 V 2 .2U_ 16V_06
PJ20
PC2
PQ28
5
6
7
8
9
2. 2_06
Z444 3
0.2 2U_1 6V_06
P GN D
PR10
CPU_ VTT
*OPEN_4 0mil
1
C
41
12
Z4 446
11
Z4414
0_ 04
2 7K_1%_0 4
0_ 04
Sheet 44 of 47
Power VCORE
. 1U_ 50V_Y5 V_ 06
2 .2_ 06 Z443 1
U 11
F M5 822
12K_04
330 U_2 .5V_D3
CS2
CS2N
PR7
1
Z4 439 4
7. 5K_04
BOTTOM PAD
CONNECT TO
GND Through
4 VIAs
PC17
+
56 0U
PC 119
PR11
2 .2_0 6
PR85
PR84
PR45
4700 P_ 50V_04 0 _04
PD1
38
NTC
PC15 8
+
5 60U
FM0540 -N
5V
VR_HO T
PC1 56
+
PC30
VIN
PC38
PR37
PL7
PD2 1 PR70
4. 7_0 8
4
BSC04 2N03 S
* 0.1 U_16 V_ 04
1U_1 6V_06
PR19 2
4
Z44 18
0. 82U 13*13 *6.7
PR8 0 PR79
PC7
7 .5K_1 %_ 04
>300us FILTER
PR195
5
6
7
8
9
5
12 V
Z4 452
PR 41 3 30_ 04
*680_ 04 68 0_04
7
SWN
CS4N
40
+ PC14 6
15 U_25 V_ 6X4 .5
BSC05 9N03 S
PQ 41
BSC0 42N0 3S
DRVL
PQ4 0
VCC
PC2 1
PR 197
1 0k_ 06
Z440 2
Z4413
Z4412
PR42
D0 3
PC3 3
1 _06 Z4 422 4
PR25
NC P5 359D R2G
B ST
VR_ HOT
AGN D
R OS C
VSN
PR 39
100 _04
PC13 4
+
PC19
+
PC13 5
0 _04
0_ 04
5 60U
56 0U
330 U_2 .5V_D3
4700 P_ 50V_04
CS4
CS4N
PR6 9
H_ PROCHOT#
2K_04
4,15
C
VR_HO T
B
1 30_0 4
PR68
PQ2
E
2N 3904
SYS3V
PR8 7
PR 86
1 00K_04
100 K_ 04
5V
D
EN
PC41
Z4 456
Z44 58
PR172 49.9 K_ 1%_04 VR_VFB
G
9. 1K_1%_04
*0. 1u_0 4
PC127
B
PQ4 2
2 N700 2W
150 P_ 50V_0 4
PQ
E37
2N39 04
Z445 5
VR_C OMP
PC1 36 33 NF_X7R _50V_0 4
PR17 7
4 ,1 2 ,1 5, 16 , 28
PW RGD_ PS
39
VTT_ PW ROK
PR2 02
0_0 4
PR2 01
*0 _04
Z4457
D
C
Z4 459
PC 137
PR1 78
.1U_ 16V_0 4
1 K_ 1%_04
PQ 3
2N 700 2W
S
PR175
PJ1 0
*OPEN _40mil
G
S
V1. 1
Z442PR32
6
PC3
VSP
IM ON
I LIM
VSS_SENSE
IMON
IN
OD
DAC
14
330 U_2 .5V_D3
PQ43
8
*4.7 U_25 V_ X5R_ 08
Z445 3 PC37
Z4 454 36
4 .7NF_X7R_5 0V_04
13
Z44 48
PR40 0_04
4 I MON
2
3
2 .2U_ 16V_06
10
4
2. 2_06
Z444 1
PC 14
PR631 K_ 1%_04 PC32 .47 U_16 V_ 06
CS4
CSSU M
VC C_SENSE
6
C
Z4411
1K_1 %_ 04
4
PC34
U2
DRVH
A
G4
CS4N
CS4
VD FB
56 0U
*4 .7U_ 25V_X5 R_08 . 1U_ 50V_Y5 V_ 06
0.2 2U_1 6V_06
1
Z4 438 4
PR591 K_ 1%_04 PC31 .47 U_16 V_ 06
CS3
PR35 620_ 04 20
5 60U
0_ 04
CS1
CS1N
F M5 822
1K_0 4
RTH 2
10 K_ 06
22 P_ 50V_04
PR 22 6 20_0 4 Z4 451
19
+
1
2
3
34
V CC
G3
CS3N
CS3
VFB
+
PC20
PC 15
1U_1 6V_06
5V
Z44 49
VC ORE
A
FM0540 -N
PR18
2 .2_ 06 Z443 0
PR17 1
2 .2_0 6
VCC
Z445 0 PR 23 6 20_0 4
PR36
+
PC13 2
PC 13
47 00P_50 V_ 040 _04
VIN
CS2N
Z4408
PR541 K_ 1%_04 PC29 .47 U_16 V_ 06
CS2
COMP
VC ORE
PC1 31
2.2 U_16 V_ 06
Z4409
B ST
31
23
24
PC23
Place close
to inductor
PD 19
A
PR24
PC126
12 V
OS-CON
0. 82U 13*13 *6 .7
PR 15
4.7 _08
5
6
7
8
9
C
VR_VFB 17
PR 33
*10 0K_04
CS1N
Z4405
5
6
7
8
9
PR21 *1 00K_04
5V
BSC04 2N03 S
Z4407
Z4406
PR471 K_ 1%_04 PC27 .47 U_16 V_ 06
CS1
G2
CS2N
CS2
PQ3 3
1U_1 6V_06 5V
6X 6 QFN
0.8V~1.55V/125A
PL5
PD2
PR2 7 PR28
P GND
Z444 5
PC26
PR 38 1 0_0 4 Z446
PC116 1 200P_5 0V_04 PR293 .3K_04
VR_CO MP16
150 0P_50 V_ 04
PR30
1K_1 %_ 04
PC25
4 7P_50 V_ 04
NC P5 392MNR2G
29
30
21
22
4
6
PSI
U3
DRVON
G1
CS1N
CS1
BSC05 9N03 S
PQ 36
BSC0 42N0 3S
4
Z44 17
D03
4 ,5, 15, 18, 39 CPU_VTT
2 0,24 ,30 ,39 ..4 2,45 VIN
4,1 7,2 4,30 ,31 ,39 ..4 1,43 ,45 5 V
5 VCORE
40 12 V
39 ,45 SYS3V
33K_1%_0 4
Power VCORE B - 45
B.Schematic Diagrams
0_ 04
VR _RDY
EN ABLE
VI D0
VI D1
VI D2
VI D3
VI D4
VI D5
VI D6
VI D7
PSI
DIFFOUT
PC 123
1 0k_ 06
Z440 1
5
DRVL
NC P5 359D R2G
F M5 822
39
1
2
3
4
5
6
7
8
9
37
15
EN
35
.1 U_16 V_ 04
12 VM ON
*0.1 U_16 V_ 04
PR8
7
SWN
C
IN
OD
5
6
7
8
9
2
3
2. 2_06
Z444 2
1
2
3
PR9
1
2
3
2 K_ 04
4. 7U_1 0V_08
. 1U_ 16V_04
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
H_VID7
H_ PSI #
PR25 0
+ PC 117
15 U_25 V_ 6X4. 5
9
PQ31
1 _06 Z4 421 4
1
2
3
C
PR82
PC14 8
PC40
Z442PR4
5
1
2
3
Z44 16
PC3 6
Z441 5
*680 _04
8
DRVH
5
6
7
8
9
1
VCC
P GND
PR83
1K_0 4
0.2 2U_1 6V_06
U1
B ST
Z4 437 4
FM0540 -N
PR76
PC39
4 H_VID0
4 H_VID1
4 H_VID2
4 H_VID3
4 H_VID4
4 H_VID5
4 H_VID6
4 H_VID7
4 H_PSI#
PC6
PC 121
PR17 0
2 .2_0 6
PR81
1 8K_04
VRM_PWRG D
*4 .7U_ 25V_X5 R_08 . 1U_ 50V_Y5 V_ 06
PC 5
C PU _VTT
PD 27
16
VIN
FM0540 -N
PR16 8 2 .2_ 06 Z442 9
1
12 V
VIN
A
CPU _VTT
A
NCP5392 Intel VRD11.1 POWE R CKT
Schematic Diagrams
Power VDD3, VDD5
VI N
VDD3,VDD5
PC93
PR14 6
VIN 1
6-0 6-00 540 -02 1
1 0_0 4
A
PD1 4
PC9 8
PD 15
PC95
PR154
FM0 540 -N
4. 7U _6. 3V_X5R_ 06
FM054 0- N
.1 U_1 0V_X7R_ 04
*1M_04
PC 112
Z4 509
23
2
15
TG2
SW1
SW2
14
Z450 2
13
Z450 1
4
PC107
+ PC1 06
.1 U_1 0V_X7R_ 04
.1 U_10V_X7R_04
150U_6 .3 V_V
25m ohm_ NEC
8
1 0_0 4
PR13 8
1 0_0 4
20
BG1
BG2
17
Z4 515
27
SENSE2+
SENSE1-
SEN SE2 -
7
PC83
Z4 525
Z45 14
2
EXTVCC
11
MO DE/PLL IN
+ PC11 4
10 _04
PR 151
10 _04
PC115
150 U_6.3 V_ V
25m ohm _NEC
. 1U_10V_ X7R _04
*0_04
PR147
47 K_04
PR 145
PC8 8
63. 4K_1 %_06
*100P_5 0V_0 4
1 00P_50V_ 04
VFB2
4
Z45 07
FREQ/ PLLFL TR
9
3 .32K_1%_ 06
I LI M
25
PR136
SGND4
PR 152
7A
SGND 4
10
Z4 512
10K_ 04
L DO5 V
PR14 0
Z4 506
5
Z450 4
5V
22 0P_5 0V_0 4
Z4517
PC9 2
T K /S S 1
PR13 5
24
ITH2
PGO OD
RUN2
20 K_ 1%_0 6
Z4 511
VFB1
T K / SS 2
3
12
0_ 04
FM582 2
VDD3
PJ 9
*OPEN_5mm
0 _06
PC9 0
Z45 13
PR13 7
ITH1
PR 157
Z450 5
22 0P_5 0V_0 4
PR14 2
L DO5 V
10 00P_50V_ X7R _04
1
PC80
22 0P_50 V_04
RU N1
11 0K_1%_ 06
47K_0 4
6
*22 P_50 V_ 04
PR 14 1
SG ND4
SYS3V
7A
PC96
1 00 0P_50 V_X7R_0 4
28
Z45 16
26
PR14 3
PD 17
PQ6 8
AO4 468
Z450 3
8
SENSE1+
PC 84
PC8 6
8
4
LGATE2
3
2
1
A
2
PR13 9
LGATE1
4
FM582 2
PL13
PR1 66
2.5 UH_ 6. 8*7. 3*3. 5 8 m_ 25
PQ 63
AO 44 68
1
7
6
5
PD1 6
PC10 8
PQ6 7
AO4 468
2
PL12
4. 7UH _6. 8*7. 3*3. 5
Z4 523
C
7A
PC1 13
*10 00 P_ 50V_ X7R _04
Z4528
A
PR16 2
8m_2 5
5
6
7
SYS5V
C
7A
PJ7
*OPEN_ 5mm
8
1
2
3
VD D5
PR16 5
*10_06
5
6
7
19
V IN
INT V CC
TG 1
.1 U_1 0V_X7R_ 04
1
2
3
22
B OOS T 2
Z4 508
18
21
4
PC97
3
2
1
PQ 62
AO44 68
Z451 8
BO OS T 1
.1 U_1 0V_X7R_ 04
7
6
5
8
1
Sheet 45 of 47
Power VDD3, VDD5
PR1 61
*1 0_06
.1 U_5 0V_Y 5V_0 6 15 U_2 5V_6 X4. 5
C
C
2
PC8 5
PG ND
16
PR 144
20K_1 %_04
PU 4
LTC3 85 0
P IN 29 = SGN D4
SGND 4
SGN D4
EN_ 5V
EN _3V
SGND 4
PQ 23
2 N70 02W
G
D
D
4 0mi l
40 mi l
8mi l
PQ2 1
2 N70 02W
G
SGND 4
PC99
1000 P_50 V_X7 R_0 4
EN _3V
PC79
1000 P_50 V_X7 R_0 4
EN _5V
PR1 49
TK/SS2
SY S5V
*0_0 4
S
SGN D4
SGN D4
PR153
Z4 521
Z452 2
PR14 8
PC91
PC8 1
PR156
*0_04
.0 22U_1 6V_X7R_ 04
.0 1U _50V_ X7 R_04
*1 0K_04
0_0 4
LDO5 V
LGATE1
PC 82
. 01 U_5 0V_X7R_ 04
Z45 C
20
SGND 4
A
SYS5V
PD 10 FM054 0- N
A
SG ND4
S
B.Schematic Diagrams
Z4 510
PC 105
*1 000 P_ 50 V_X7 R_0 4
Z4 529
+ PC2 06
PC104
1 5U_ 25V_ 6X4 .5 . 1U_ 50 V_ Y5V_ 06
Z 45 24
PC208
+
L DO5 V
1
1
A
. 1U _25 V_X7 R_0 6
SGND4
C
PD 11 FM054 0- N
SYS10 V
PC 87
2 20 0P_50 V_X7 R_0 4
PC 89
. 01 U_5 0V_X7R_ 04
Z45 C
19
A
PR15 5
PJ6
*10 0K_04
*OPEN_4 0mil
C
PD 13 FM054 0- N
SYS15 V
PC 94
2 20 0P_50 V_X7 R_0 4
D0 3
3 9, 44 SYS3V
2 0,2 4, 30, 39. .4 2,4 4 VIN
1 6, 21, 24, 28,31 ,4 0,4 2,4 3 VDD3
24 ,3 0,3 1,4 3 VDD5
2 4,4 3 SYS15 V
4 ,17,24 ,3 0,3 1, 39. .41 ,43,4 4 5V
40 VI N1
PN C1
SGN D4
B - 46 Power VDD3, VDD5
A
PD 12 FM054 0- N
Shu td own_ stb _po wer 31
*NC _04
Schematic Diagrams
Power Delivery Chart
E
R
O
C
V
LP2 95 1CDR2 G
Int el 13 66 CPU
NCP53 9 2M NR2G
T
T
V
_
U
P
C
LTC3 85 0
ISL6 3 14 CR
VIN
)
A
8
2
l
a
t
o
T
(
M
M
I
D
_
V
=
V
5
.
1
19 V
+/- 5%
VDD5
+ /-5 %
VDD3
+ /- 5%
12 V
+/- 5%
14 5 A
CPU_VTTD
23 A
CPU_VTTA
5A
V_DIMM
1.5V
6A
V_1P8 _ PLL
1.8V
2A
V
5
.
1
D DR3 D IM M s
SC4 8 6
DDR _VTT
0.75 V 1A
V_DIMM
1.5V
25 A
1
P
1
_
A
C
C
V
=
S
V
1
.
1
SI48 00 BDY
L
L
P
_
8
P
1
_
V
L
C
_
8
P
1
_
V
L
C
_
9
P
0
_
V
5
P
1
_
A
C
C
V
=
S
V
5
.
1
*08 0 5 0 Ohm
e mpt y
/2 , em pt y
S
V
1
.
1
08 05 0 Ohm
M a x I dle P ow er: 15 .1 W
TDP: 30 .5 W
I nte l I OH 3 6S/ 24 S
VC CA_1 P1
1.1V
75 0mA
V_1P8 _ PLL
1.8V
75 0mA
V_1P8 _ CL
1.8V
50 0mA
V_0P9 _ CL
0.9V
25 0mA
VC CA_1 P5
1.5V
75 0mA
V_1P1
1.1V
20 A
V_1P1 _ QPI
1.1V
3A
V_1P1 _ PE
1.1V
3A
1.2V
14 mA
1.5V
0.9 7A
1.5V
0.7 4A
Sheet 46 of 47
Power Delivery
Chart
0 80 5 0 O hm
I nt e l IC H10
SI48 00BDY
S
V
5
V
5
SI4800BDY
SI4800 BDY
VCC1_5
1.5V
V_1P5_ FILTER
1.5 V
V_1P05 _ICH
1.0 5V
1.05 V
1.3 1A
VCC3
3.3V
3.3V
0.5 8A
VCCSUS3_3
3.3V
3.3V
0.7 A
5VREF 5V
5V
6mA
5V_REF_SUS 5V
5V
10 mA
VCCRTC 3 .3V
3.3V
6uA
C
C
V
C
T
R
H
C
I
_
5
0
3
5
P
1S D S D
_V D V D
V3 V 5 V
SI4800BDY
R
E
T
L
I
F
_
5
P
1
_
V
S
V
1S
.V
13
V
3
SC412A
5
_
1
C
C
V
S
V
5
.
1
SI4 80 0BDY
CPU_VTTD 1 .2V
BAT T ERY
S
V
3
EC I TE85 12
3
D
D
V
3VS
3.3V
KBC_AVDD
3.3V
S
V
3
AZALIA
S
V
5
AME8 804AEEY
DVDD
3.3V
0 .3A
AVDD
4.8V
0 .1A
X 16 P CIE M XM 3 .0
3. 3V S(3 VRU N) 1.0A
5V S(5 VRU N)
2.5A
VIN (PW R _SR C) 10A
Power Delivery Chart B - 47
B.Schematic Diagrams
)
A
2
.
2
l
a
t
o
T
(
L
L
P
_
8
P
1
_
V
=
S
V
8
.
1
V
8
.
1
SC4 1 2A
TDP: 13 0W
VC ORE
Schematic Diagrams
Power Sequence Diagram
11
D900F V0.0 BOOT BLOCK DIAGRAM
IOH_CLPWROK
13-1
7a
PLLDET_3V(COREPLLPWRDET)
1
PWR_SW#
Power Bottom
13-3 H_PWRGD_IOH(COREPWRGOOD)
B.Schematic Diagrams
VDD3/VDD5
VR
LTC3850
3V
3
5V
3
12V
3
LP2951CDR2G
EC
Sheet 47 of 47
Power Sequence
Diagram
DRAM VR
ITE8512E
SC486
DELAY
DD_ON
75 ms
PWR_BTN#
4a
RSMRST#
4b
SUSC#
5a
SUSB#
5b
MXM_PWR_EN
M XM3. 0
MXM_PRESNT#
Tylersberg
16
17
H_CPURST#
15
PLTRST_DLY#(CORERST#)
14 PLTRST#(VCCPWRGD)
IOH_CSI_RST
2
DD_ON
MXM_PWR_EN
7b
NORTH BRIDGE
1.5V
3
0.75VS
6
Other
P latf orm
Devices
SOUTH BRIDGE
MXM_PRESNT# 7b
13-2
H_PWRGD
Processor
Bloomfield
7a
11
ICH10R
IOH_CLPWROK
MXM_PRESNT# 7b
14
PCIRST#
Oth er P CI
Devi ces
(NEW Car d)
VCORE_ON
9
VTT_PWRGD
9
NCP5392MNR2G
VCORE
11
VRM_PWRGD
12
PWROKICH
VCORE VR
12-1 CK_PWRGD
10
CV193
11
6
VRM_PWRGD->ICH_VRM_PWRGD
PM_PWROK
3VS
14
G690L293T73
5b
1.1VS
ISL6314CR
8
VTT_PWRGD
B - 48 Power Sequence Diagram
PLTRST#
6
1.1V EN
1.5VS
6
1.8VS
6
3.3VS
6
5VS
15
Delay 2ms
11
SUSB#
ICH_VRM_PWRGD
6
SC412A
8
CPU_VTT
Clock Generator
13-1
2N3904
Delay
MOSFET
PLTRST_DLY#(CORERST#)
PLLDET_3V(COREPLLPWRDET)
H_PWRGD_IOH(COREPWRGOOD)
13-3
Follow Design Guide