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AMD Athlon™ Processor x86 Code Optimization Table 29. VectorPath Integer Instructions (Continued) 22007E/0—November 1999 Table 30. VectorPath MMX™ Instructions Instruction Mnemonic Instruction Mnemonic STI MOVD mmreg, mreg32 STOSB mem8, AL MOVD mreg32, mmreg STOSW mem16, AX STOSD mem32, EAX Table 31. VectorPath MMX™ Extensions STR mreg16 STR mem16 SYSCALL SYSENTER SYSEXIT SYSRET VERR mreg16 Instruction Mnemonic MASKMOVQ mmreg1, mmreg2 PEXTRW reg32, mmreg, imm8 PINSRW mmreg, reg32, imm8 PINSRW mmreg, mem16, imm8 PMOVMSKB reg32, mmreg SFENCE VERR mem16 VERW mreg16 VERW mem16 WBINVD WRMSR XADD mreg8, reg8 XADD mem8, reg8 XADD mreg16/32, reg16/32 XADD mem16/32, reg16/32 XCHG reg8, mreg8 XCHG reg8, mem8 XCHG reg16/32, mreg16/32 XCHG reg16/32, mem16/32 XCHG EAX, ECX XCHG EAX, EDX XCHG EAX, EBX XCHG EAX, ESP XCHG EAX, EBP XCHG EAX, ESI XCHG EAX, EDI XLAT 234 VectorPath Instructions
