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Download Maxim DS5001FP Specifications
Transcript
DS5002FP Secure Microprocessor Chip AC CHARACTERISTICS—EXPANDED BUS MODE TIMING SPECIFICATIONS (VCC = 5V ±10%, TA = 0°C to +70°C.) (Figure 1 and Figure 2) # PARAMETER SYMBOL CONDITIONS 1 Oscillator Frequency 1 / tCLK 2 ALE Pulse Width tALPW 3 Address Valid to ALE Low tAVALL 4 Address Hold After ALE Low tAVAAV 14 RD Pulse Width tRDPW 15 WR Pulse Width tWRPW 12MHz tRDLDV 16 RD Low to Valid Data In 16MHz 17 Data Hold after RD High tRDHDV 18 Data Float after RD High tRDHDZ 12MHz 19 ALE Low to Valid Data In tALLVD 16MHz 12MHz 20 Valid Address to Valid Data In tAVDV 16MHz 21 ALE Low to RD or WR Low tALLRDL Address Valid to RD or WR 22 tAVRDL Low 23 Data Valid to WR Going Low tDVWRL 12MHz tDVWRH 24 Data Valid to WR High 16MHz 25 Data Valid after WR High tWRHDV 26 RD Low to Address Float tRDLAZ 27 RD or WR High to ALE High tRDHALH Figure 1. Expanded Data Memory Read Cycle 4 of 25 MIN 1.0 2tCLK - 40 tCLK - 40 tCLK - 35 6tCLK - 100 6tCLK - 100 MAX 16 5tCLK - 165 5tCLK - 105 0 3tCLK - 50 2tCLK - 70 8tCLK - 150 8tCLK - 90 9tCLK - 165 9tCLK - 105 3tCLK + 50 UNITS MHz ns ns ns ns ns ns ns ns ns ns ns 4tCLK - 130 ns tCLK - 60 7tCLK - 150 7tCLK - 90 tCLK-50 ns tCLK - 40 ns 0 tCLK + 50 ns ns ns
