Download Microsoft SP5100/S Specifications

Table of Contents
1 Introduction ................................................................................................................ 7
1.1 About This Manual........................................................................................................................ 7
1.2 AMD SP5100 Block Diagram....................................................................................................... 8
1.3 Register Reference Information .................................................................................................... 9
2 ACPI/SMBUS Controller (bus-0, dev-20, fun-0)................................................ 10
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
2.11
2.12
2.13
2.14
2.15
2.16
2.17
2.18
2.19
2.20
2.21
2.22
2.23
2.24
2.25
2.26
2.27
2.28
2.29
2.30
2.31
2.32
2.33
2.34
2.35
2.36
Enabling Legacy Interrupt ........................................................................................................... 10
Unblocked SMI Command Port .................................................................................................. 10
WakeIO Base Address ................................................................................................................ 10
C-State and VID/FID Change ..................................................................................................... 10
Enable C1e Stutter Timer and Limit Link Disconnect to < 20 ms ............................................. 13
MTC1e and FID VID Setting ...................................................................................................... 14
C1e Exit on Assertion of IDLE Exit# (for A15 Only) ................................................................ 14
Support for Entering C1e on HALT# Message (for A15 Only) .................................................. 14
Enabling Non-Posted Memory Write .......................................................................................... 15
Therm Trip Settings .................................................................................................................... 15
Sx State Settings .......................................................................................................................... 15
Output Drive Strength Settings ................................................................................................... 16
SUS_STAT# Enhancement ......................................................................................................... 16
Interrupt Routing/Filtering .......................................................................................................... 16
IO Trap Settings .......................................................................................................................... 17
Enabling ACPI Registers ............................................................................................................ 17
Legacy DMA Prefetch Enhancement .......................................................................................... 18
USB Set BM_STS ....................................................................................................................... 18
Enabling Spread Spectrum .......................................................................................................... 18
PCIe Native Mode ..................................................................................................................... 19
Hardware Monitor ....................................................................................................................... 19
Cir Interrupt Config..................................................................................................................... 20
SMBUS PCI Config .................................................................................................................... 20
IMC Access Control .................................................................................................................... 20
CPU Reset ................................................................................................................................... 21
Disabling Legacy USB Fast SMI# .............................................................................................. 21
SMBUS1 Programming Sequence .............................................................................................. 21
ACPI System Clock Setting ........................................................................................................ 23
Integrated Pull-up and Pull-down Settings .................................................................................. 23
Revision ID ................................................................................................................................. 23
Alternate Pin for 14 MHz Clock Input ........................................................................................ 24
Gevent5 as GPIO ......................................................................................................................... 24
SMBUS Block Write Filtering .................................................................................................... 25
SMBUS Sequence ....................................................................................................................... 25
Software Clock Throttle Period................................................................................................... 25
Unconditional Shutdown ............................................................................................................. 26
 2012 Advanced Micro Devices, Inc.
AMD SP5100 Register Programming Requirements
TOC
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