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Download Masterclock TCDS Series Datasheet
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[AK4646] 6. Sampling Rate: • PLL Slave Mode (LRCK pin): 7.35kHz ∼ 48kHz • PLL Slave Mode (BICK pin): 7.35kHz ∼ 48kHz • PLL Slave Mode (MCKI pin): 8kHz, 11.025kHz, 12kHz, 16kHz, 22.05kHz, 24kHz, 32kHz, 44.1kHz, 48kHz • PLL Master Mode: 8kHz, 11.025kHz, 12kHz, 16kHz, 22.05kHz, 24kHz, 32kHz, 44.1kHz, 48kHz • EXT Slave Mode: 7.35kHz ∼ 48kHz (256fs), 7.35kHz ∼ 26kHz (512fs), 7.35kHz ∼ 13kHz (1024fs) 7. μP I/F: 3-wire Serial 8. Master/Slave mode 9. Audio Interface Format: MSB First, 2’s compliment • ADC: 16bit MSB justified, I2S • DAC: 16bit MSB justified, 16bit LSB justified, 16-24bit I2S 10. Ta = −30 ∼ 85°C 11. Power Supply: • AVDD: 2.2 ∼ 3.6V (typ. 3.3V) • DVDD: 1.6 ∼ 3.6V (typ. 3.3V) • SVDD: 2.2 ∼ 4.0 V (typ. 3.3V) 12. Power supply Current: 19mA 13. Package: 32pin QFN, 5mm x 5mm, 0.5mm pitch (AK4646EN) 32pin QFN, 4mm x 4mm, 0.4mm pitch (AK4646EZ) 14. Pin/Register Compatible with AK4642EN/AK4643EN (AK4646EN) ■ Block Diagram AVDD AVSS VCOM DVDD DVSS PMMP MPWR CCLK CDTIO PMADL or PMADR RIN1 PDN MIC-Amp LIN2 External MIC Control Register PMADL LIN1 Internal MIC CSN MIC Power Supply A/D HPF PMADR PMADCL or PMADCR or PMDAC RIN2 BICK HPF LRCK LPF SDTO Stereo Separation Audio I/F SDTI 5 Band EQ PMLO LOUT ALC Line Out ROUT PMDAC D/A DATT DEM SMUTE PMSPK MCKO PMPLL SPP Speaker SPN PLL MCKI VCOC PMBP SVDD SVSS MIN Figure 1. Block Diagram MS0557-E-06 2011/06 -2-
