Download Microcontroller Prototyping System - Using Cortex-M3

Table of Contents
1
INTRODUCTION .................................................................................................................. 1
1.1
Purpose of this application note.................................................................................................................................... 1
1.2
Overview of the hardware platform............................................................................................................................. 1
2
GETTING STARTED............................................................................................................ 3
2.1
Switch settings ................................................................................................................................................................ 3
2.2
Software download to MPS........................................................................................................................................... 3
2.3
FPGA Image download to MPS.................................................................................................................................... 3
2.4
Clock control of MPS..................................................................................................................................................... 4
2.5
Rebuilding the DUT FPGA ........................................................................................................................................... 4
3
ARCHITECTURE ................................................................................................................. 5
3.1
Block Diagram................................................................................................................................................................ 5
3.2
Clock architecture........................................................................................................................................................ 10
3.3
Interrupt architecture ................................................................................................................................................. 13
3.4
Debug architecture....................................................................................................................................................... 13
3.5
Processor Implementation Architecture. ................................................................................................................... 13
4
4.1
5
HARDWARE DESCRIPTION ............................................................................................. 14
Top Level ...................................................................................................................................................................... 15
PROGRAMMER’S MODEL................................................................................................ 16
5.1
Memory map ................................................................................................................................................................ 16
5.2
CPU FPGA specific registers ...................................................................................................................................... 17
5.3
Customer DUT FPGA Specific Registers .................................................................................................................. 19
5.4
Boot operation .............................................................................................................................................................. 25
6
RTL..................................................................................................................................... 26
6.1
Directory structure ...................................................................................................................................................... 26
6.2
The fpga_dut Directory ............................................................................................................................................... 27
6.3
The peripherals Directory........................................................................................................................................... 27
iv
Copyright © 2009 ARM Limited. All rights reserved.
Application Note 218
ARM DAI0218A