Download Service Manual Model 6400 Cardridge Tape Drive

Service Manual
Model 6400
Cartridge Tape Drive
BFC 8015B
.111
. Four
,D BaSlc
Proprietary Information
The information contained herein is proprietary to and considered a
trade secret of Basic Four Corporation.
All rights reserved. No part of this publication may be reproduced,
recorded or stored in a retrieval system, or transmitted, in any form or
by any means, whether electronic, mechanical, photographical', or
otherwise, without prior written permission of Basic Four Corporation.
All specifications are subject to change without notice.
Basic Four and1~and MAl are registered trademarks of Management
Assistance Inc.
Copyright 1979 © by Basic Four Corporation.
Reprinted August, 1979
Revised June, 1980
BFC 8015B
Printed in the United States of America
Basic Four Corporation/A Management Assistance Inc. Company
14101 Myford Road, Tustin, California 92680 (714) 731-5100
TABLE OF CONTENTS
Page
CHAPTER 1
INTRODUCTION
1.1
1.2
1.3
1.3.1
1.3.1.1
1.3.1.2
1.3.1.3
1.3.1.4
General Description
....
...
Purpose . . . . . .
...
.•.
Physical Description
. . . . . .
Tape Drive Transport
..
...
Magnetic Head Assembly
. . .
Switch/Sensor Assembly . . . . . . .
Heat Sink Assembly . . . . . . . . .
..
Tape Cleaner . . . . . .
1.3.2
1.4
Magnetic Tape Cartridge . .
MTCD Specifications . . . . .
CHAPTER 2
INSTALLATION AND OPERATION
2.1
2.1.1
2.2
2.2.1
Unpacking/Packing Procedure .
Transport . . . . . . . .
Preinsta11ation Checks . . . . . .
Installing a Transport . . .
2.3
2.4
2.4.1
System Installation . . . .
System Initialization Procedures
BASS Pro gram . . . . . . . . .
CHAPTER 3
MAINTENANCE
3.1
3.1.1
3.2
3.3
3.3.1
3.3.2
Corrective Maintenance . .
General Philosophy . . .
Troubleshooting Procedures
Functional Description . .
Power Supply . . . . . .
Transport . . . . . . . .
3.3.3
3.3.3.1
3.3.3.2
3.4
3.4.1
3.4.2
Sub-Functions of the Transport . . .
Tape Motion Control . . . • . .
Read/Write Operations . . . . . .
Electrical Adjustments . . . . . . . .
Gain Adjustment (Data Board)
. .
Servo Power Adjustment (Servo Board)
3.4.3
3.4.4
3.4.5
.
.
.
.
.
.
· . . . . . . .. . 1-1
. . . . . . . . 1- 2
· . . . . . . . . 1-2
1-2
· . . . . . . . . 1-3
· .
.-
.
. . . 1-3
· . . . . . . . . 1-3
...
1-3
.............
. ..
....... .
.
.
.
.
.
1-4
1-7
· . 2-1
. . . 2-1
. 2-2
..
· . . . . . . . . 2- 2
· . 2-4
· . 2-5
· . 2-5
. . . . . . .
. . . . . .
..
...
. . . . . . .
.
. .
. . . . . . . 3-1
3-1
. . . . . 3-1
. ..
. . 3-1
. . . . . . . 3-2
. . . . . . . 3-2
.
...
..........
. ........
..
0.....
..
...
0
0
00
0
•
•
0
•
3-3
3-3
3-4
3-5
3-5
3-5
Interface PCB One-Shot Periods . . . . . . . . . . . . . 3-6
Servo PCB Pot Setup .
3-6
Data Adjustment and Check Procedure . . . . . . . . . . . 3-7
0
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
iii
TABLE OF CONTENTS (continued)
Page
CHAPTER 3
MAINTENANCE
3.5
3.5.1
3.5.2
3.5.3
Preventive Maintenance .
Magnetic Head Cleaning
Tape Cleaner Cleaning
Motor Capstan Cleaning
CHAPTER 4
REMOVAL/REPLACEMENT PROCEDURE
4.1
4.2
4.2.1
4.2.2
Spare Parts List . . . . . . . . . . .
Removal/Replacement Procedure . . . .
PCB Cartridge Transport Power Supply
Transport . . . . . . . . . . . . .
CHAPTER 5
REFERENCE DATA
5.1
Purpose
APPENDIX A
Magnetic Tape Cartridge Controller
lV
.
.
.
.
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.
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.
.
.
.
.
. . .
.
.
.
...
.
.
.
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.
. ... . . .
.
. . .
. . .
.
. . ... .
............. ............
3-7
3-7
3-8
3-8
4-1
4-1
4-2
4-2
5-1
LIST OF ILLUSTRATIONS
Figure
Page
1-1
Magnetic Tape Cartridge Drive (MTCD) . . . . . . . . . . . . . . 1-1
1-5
1-8
Cartridge Diagram .
Cartridge Dimensions
File Protect Switch
Tape Configuration .
2-2
Converting From 110V to 220V
1-6
1-7
.
.
.
.
.
.
•
.
.
•
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. . . . . . .
. . . . . . .
. . . . . . .
..
..•
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•
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..
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. • . .
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. . . .
. . . .
~
~
~
.
1-7
1-8
1-9
1-9
. 2-3
LIST OF TABLES
Page
Table
1-1
2-1
4-1
Specifications . . . • . . .
Sense Switch Settings (CPU)
Spare Parts .• . . . • . . .
· . .. .. .. .. .. .. .. .. .. . . .. .. .. . .
• •
·. ..............
1-7
2-5
4-1
v
CHAPTER 1
INTRODUCTION
1.1
GENERAL DESCRIPTION
The Model 6400 Magnetic Tape Cartridge Drive (MTCD) records at 6400 bpi with a
9.2 megabyte tape cartridge.
The recording format
1S
four track serial, with a
data transfer rate in both the read and write mode of 192,000 bits per second.
integral tape cleaner is provided.
located in the CPU card cage.
.Track selection is performed by the Controller
The MTCD provides backup data storage capability
and an economical means of off-line storage of selected data (see Figure 1-1).
Figure 1-1.
An
Magnetic Tape Cartridge Drive (MTCD)
1-1
1.2
PURPOSE
This Service Manual is the primary source of information for first level maintenance.
It contains the necessary information to repair and maintain the MTCD.
This manual
contains both physical and functional descriptions, installation/operations,
maintenance procedures, and equipment supplied.
This information shall enable a Service Engineer to identify, isolate, and repair
the MTCD.
1.3
PHYSICAL DESCRIPTION
The MTCD is packaged as a single unit and is directly connected to the CPU main
frame and placed on top of the cabinet.
The MTCD is made up of a cabinet, power
supply, tape drive, and a ANSI magnetic tape cartridge.
The Cabinet contains a standard ac to dc power supply (refer to Chapter 2,
Preinstallation Checks, for 115 volts ac to 230 volts ac conversion).
A transparent
window is provided for visual inspection of the cartridge during normal operation.
The opening for the tape cartridge is directly below the window.
1.3.1
TAPE DRIVE TRANSPORT
The Tape Drive Transport, hereafter referred to as Transport, will record and
reproduce data onto and from Magnetic Tape Cartridges.
The Transport consists of
three subassemblies; Magnetic Head Assembly, Switch/Sensor Assembly, and Heat Sink
Assembly.
The Transport also contains a tape cleaner, capstan drive motor
tachometer and houses the PCBs.
1-2
1.3.1.1
Magnetic Head Assembly
The Magnetic Head Assembly consists of a closed magnetic circuit.
This circuit
IS
built of laminated high permeability metal with wound coils for inducing and
detecting flux reversals.
It is constructed as a dual gap with erase head
(read-while-write-while-erase).
Control signals are received from the Controller
located in the CPU card cage via an interface cable which enables it to write or
erase as required.
1.3.1.2
Sw.itch/Sensor Assembly
The Switch/Sensor Assembly contains circuitry to sense Beginning of Tape (BOT),
End of Tape (EOT), Load Point (LP) and Early Warning (EW).
This enables automatic
tape positioning after cartridge insertion, power on, or a rewind operation.
It
further contains the File Protect and Cartridge-In-Place switches.
1.3.1.3
Heat Sink Assembly
The Heat Sink Assembly contains the drive motor/tachometer, power transistor
circuits, and a two piece heat sink.
It is designed as a plug-in-module and
IS
center of gravity mounted.
The MTCD must be mounted in a horizontal position
only. This prevents dust and residue from falling
into the Transport which could result in lost data.
1.3.1.4
Tape Cleaner
The Tape Cleaner removes foreign material and loose oxide particles as the tape
passes the Tape Cleaner.
1-3
1.3.2
MAGNETIC TAPE CARTRIDGE
The Magnetic Tape Cartridge Assembly is shown in Figure 1-5.
Each Magnetic Tape
Cartridge Assembly is a single assembly consisting of a supply reel (to left),
take up reel (to right), a magnetic tape, file protect and belt guides.
DIRECTION OF FORWARD
TAPE MOTION
LIGHT SENSING
DRIVE MOTOR
FIXED TAPE GUIDES (2)
RUBBER COVERED
DRIVE ROLLER
TAPE PATH (OXIDE OUT)
BELT CAPSTAN
FILE PROTECT
TAPE SHOWN IN
BOT POSITION
TAKE-UP HUB
SUPPLY HUB
BELT GUIDE ROLLERS (2)
FLAT DRIVE BELT
Figure 1-5.
1-4
Cartridge Diagram
The Cartridge dimensions are shown ln Figure 1-6.
p::=q-rn SE'E NOTE 1
O.I25R
o
,0.218
6. 00
- -;.-
o
~
~ I
1.531
~2.813
I "
·~tl
(2)
:.t
-A·,
NOTE:
==~:d
-13[3
CI )FEATURES REOUIREO TO PR'EVEN!;;.tr
.
INSERTING CARTRIDGE 1P.!?ROPERlY
C2'~\lERSHALL NOT EXTEND BEYOND
(ALL Slots EXCEPT AT NOTCHESi
Figure 1-6.
BASE
TOLE.RANCE EXCEPT AS
NOTED! 0.005, LO.S"
DIMENSIONS IN ~NaiES
Cartridge Dimensions
The Cartridge is to be mounted in one position only and has asymmetrical features
to prevent improper installation.
The Cartridge contains optical elements to
enable photo-electrical detection of tape position holes.
The cartridge has a
sensing area on the front surface which senses when the cartridge is in position to
read or write (see Figure 1-7 for dimensions).
1-5
I,
MAX1MUM HEIGHT OF
FILE PROTECT PLUG
•
CARiRIOGE-IN-
I
POSITION SENSING
.
I.
J..
~l
•500
~I
. AREA
.
I
WRITE
2.140-.......~
PROHIBITED
Figure 1-7.
WRITE
PERMITTED
File Protect Switch
Tape guides are employed to guide the tape while in motion.
The file protect
cam of the cartridge is an operator rotatable switch (see Figure 1-5) which
prevents writing or erasing when in the SAFE position (see Figure 1-7).
The magnetic tape length between Load Point (LP) and Early Warning (EW) shall be
300+10-0 feet.
The tape position holes for Beginning of Tape (BOT), Load Point (LP)
Early Warning (EW), and End of Tape (EOT) are shown in Figure 1-8.
RVM
FWM
CJ·----:---:--:'~=--D
LOAD
POIN 7
t.-\RLY
WAR NIN
71t.AC.Jt!.
. LcCATIOA)S
o
o
~,0:?
~
I~"
/
/
/
~~ ___._, '/j-
r-
BOT"----AREA
3 6~ 6.0'
(i)
J-
39 II
REACHED
-
1---. [OT-
4---1
FROM Rwl) OR
.~/'i;1----.--- --- .......
RECO~D/\ELf
AREA
LOADI NG
Figure 1-8.
1-6
Tape Configuration
--J-=~ .....
'?__~
~~
The presence of a spurious tape signal, after a tape has been erased, will not
exceed 10 percent of the average base to peak read signal under test.
wound on the reel with the magnetic coating out.
The tape
1S
During forward operation it will
wind clockwise and unwind counterclockwise as viewed through the transparent door.
1.4 MTCD SPECIFICATIONS
Table 1-1 summarizes the general operation and performance of the MTCD.
This table
provides a reference source of general data for the Service Engineer.
TABLE 1-1.
SPECIFICATIONS
Parameters
Characteristics
PHYSICAL
Height
6.0 inches (15.2 cm)
Width
13.5 inches (34.3 cm)
Depth
12.0 inches (30.5 cm)
Weight
18.8 pounds (8.5 kg)
AC POWER REQUIREMENTS
Voltage
115/230 VAC
Current
1.5/.75A
Power
172 VA
Frequency
60/50 Hz, 1 phase
Heat Output
586.5 Btu/hr
DC POWER REQUIREMENTS
Voltage
+24 VDC ± 15%
-24 VDC ± 15%
+5 VDC + 5% - 3%
Current (Amperes)
+24 VDC: 1.8 typ; 3.4 max.
-24 VDC: 1.9 typ; 3.5 max.
+5 VDC: 1.4 typ; 2.6 max.
Drive Power Dissipation
18.5 Watts Typical Without Motion
57.4 Watts Typical With Motion
68.9 Watts With 10% Ramp Duty Cycle
TABLE 1-1.
SPECIFICATIONS (continued)
Parameters
Characteristics
~~'------------------------------------r--------------------------------------------------1
ENVIRONMENTAL REQUIREMENTS
Temperature
Humidity
40% to 60% RH non-condensing
Altitude
o to
10,000 feet
MAGNETIC TAPE
Read to Write Gap Spacing
.300 + .005 inch
Write to Erase Gap Spacing
.300 ± .010 inch
Write Gap to EDT/BOT Optical C/L
2.50 ± .04 inch
Erase Track Width
.032 + .005 inch
Write Track Width
.028 ± .002 inch
Read Track Width
.010 ± .002 inch
Tape Motion
Steady State
Bit Period Definitions
ANSI Standard
Speed
Range
Nominal
Speed
(ips)
Low
High
30
90
Nominal Bit Nominal Data
Period
Transfer
(microseconds)
Rate
5.208
1.74
192,000 bps
ANSI Standard #X3B5/75-43
GENERAL
Cartridge
ANSI x 3.55 - 1977 300' or 450' tape length
Recording Density
6400 bpi, MFM, or other high density codes
Recording Mode
4-Track Serial
Head Type
Dual Gap, Read-While-Write with Separate
Erase
Tape Cleaner
Integral
1-8
TABLE 1-1.
SPECIFICATIONS (continued)
Parameters
Characteristics
GENERAL
Operating Speeds
30 lpS Write, Bidirectional Read
90 lpS Bidirectional Search and Rewind
Transfer Rate
192,000 Bits/Sec.
Start/Stop Time
At 30 ips: 0.30/0.41 inches
At 90 ips: 2.97/3.42 inches
+39,:0 (Drive only, -+79,:0 cartridge inclusive)
Instantaneous Speed Variation
-
Long Term Speed Variation
-
Data Reliability
Less than 1 Error in 10 8 Bits
Interface Signal Levels
Standard TTL Levels
+29,:0 (Drive only, ±3% cartridge inclusive)
Logic 1
Logic 0
= 0.0
=
to +0.4 VDC
+2.4 to +5.0 VDC
1-9
CHAPTER 2
INSTALLATION AND OPERATION
INSTALLATION
2.1
UNPACKING/PACKING PROCEDURE
The MTCD is shipped as part of a system.
Instructions for unpacking/packing as a
part of a system are found in the system manual.
This manual will cover procedures
for the MTCD only.
2.1.1
TRANSPORT
The shipping container provides protection against moisture, dust, and contact
damage.
If the MTCD is not to be installed, but placed in storage, it should be
opened and checked for damage, then repacked.
Use the following procedure for
unpacking/packing the MTCD.
1.
Upon receipt of the shipping container, examine for damage, report any
damage to the carrier before opening.
2.
If no damage is noted, and the MTCD is not to be placed in storage, cut
the packing tape on the top center of the container and open the outer
container.
CAUTION
Use care when cutting the tapes to open the container.
Too deep of a cut may damage cabinet or transparent
door on the cabinet.
3. Cut packing tape on inner container, open container and lift out the MTCD
or Transport.
4.
Examine for damage, noting any dents, cracks, or missing parts per shippin,
list. If any are found, they should be reported to the Marketing Office
or Dealer immediately.
2-1
Use care in removing the Transport. The Heat Sink
and Pins are exposed. Mechanical damage can result
if bent or broken.
2.2
5.
All containers and packing material, especially preformed containers, must
be saved. These are to be reused if the assembly is returned to the factory.
6.
Packing is the reverse of the above procedure, using the saved container
and packing material. Add packing tape to replace the cut tape in the
unpacking procedure.
PREINSTALLATION CHECKS
The first part of this section will explain the procedure to install a Transport
in the cabinet.
2.2.1
INSTALLING A TRANSPORT
First, remove the top cover.
stick-together clamps.
In newer models, the top cover is held in place by
Remove the transparent window, then lift up on the front
of the top cover and it will snap loose.
In older models, the cover is screwed
down, remove the screws and then lift off the cover.
This will expose the inner
parts of the MTCD .
When installing the Transport, proceed as follows:
o
2-2
If unit is still plugged in:
1.
Set ON/OFF switch on rear of lower cover to OFF.
2.
Remove ac power plug from ac outlet.
o
Remove cables from PCB (Cartridge Tape Drive Power Supply) located at Jl
and J3.
o
Lift out the PCB (Cartridge Tape Drive Power Supply) and set aside.
o
Place Transport in lower cover.
VENDOR VERSION
BFC VERSION
PI
Ale
INPUT
PI
TI
1
Slit
5
II~-=-----I
ILK
6'U1
&.:..:..=:.....,.~_~ II)--':'~----I 7
2
·WH'T
~
____
~~_JII'~&-
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~
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L -_ _ _ _ _ _~~-JII;~~------~
~~-~~~~I~~-----~
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'ro.::..--< III.......~-----"i
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3
r=~---+H>~~lIr~-----4
2
100
lOOV~ (~,
_005"-00(,, .. ooT
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ILK
(Q~'
.005,>-001'.) -007 ~ - 0 0 8
<-008
PI
TI
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e'"
.t,It
I
INPUT
PI
TI
ILK
5
6fU1
6R.N
WMT
WMT
2
..,
WMT
3
WMT
•
5
•
•
~
~
7
:J
II~V.
eo
en!)
-001 .\'
II~V.
-ooa
~ INPUT
PI
ILK
-A.t
INPUT
SlK
6~N
6'U1
WHT
WMT
en!)
-001 (-oo~
2
I
I
WIoIT
/I(e CN;'MP'
2
4
'3
SWI
Z Z81 "SLle:
\
3
WKT
5
1I"" FILTe,.
LFI
TI
PI
7
~
3
•
,
7
nov. .(REF)
2
b
noV.
(RU)
-002
-o~
-002 ( -o~
Figure 2-2.
r
Converting From lOOV to 220V
2-3
Clean heads carefully. Spray type head cleaners
are not recommended as they may contaminate the
drive motor lubricant. Cleaning the head with
hard metal objects will result in permanent head
damage.
The Tape Cleaner may be cleaned with a folded sheet of paper.
Insert the folded
paper into the open slit and move the paper up/down twice.
Install the transparent window, and insert a cartridge.
window and observe tape motion.
Look through the transparent
Tape should move forward approximately one second
and then reverse to BOT.
1.
Grasp the tape cartridge firmly with one hand and pull it from the opening.
2.
Place the tape cartridge in the opening and push forward till the stopping
point is felt and an audible sound is heard.
3.
Verify tape motion, if none; insure the ac power cord is connected, power
is on, and the fuse is not blown. If the fuse is blown or the tape still
does not move, refer to Chapter 4 of this manual.
4.
If the tape
operation.
1S
in motion and stops at BOT, the MTCD
1S
ready for normal
NOTE
If the tape was on the left reel (take-up),
automatic rewind will take place till the tape
has moved to the right reel (supply) and BOT.
2.3
SYSTEM INSTALLATION
The MTCD is part of a system, therefore the System Installation and Preinstallation
Checks are one and the same .
2-4
2.4
SYSTEM INITIALIZATION PROCEDURES
2.4.1
BASS PROGRAM
1.
Install a tape cartridge (scratch tape) in the Transport.
2.
Perform an alternate load from disc (refer to Table 2-1).
TABLE 2-1
1
Switches
2
3
SENSE SWITCH SETTINGS (CPU)
4
Function
0
0
0
0
Fixed Media Load
0
0
1
0
Fixed Media Alternate Load
1*
1*
0
1
Tape Cartridge System Load**
1
1
1
1
Tape Cartridge Alternate Load
1
0
0
1
VDT Boot
0
1
0
1
Disc Load
0
1
1
1
Disc Alternate Load
'--'
*Test SW on front panel (CPU) may be used instead of SS3
**Not allowed in present operating system.
3.
Press and release LOAD switch on processor front panel.
4.
VDT displays the PROPRIETARY MESSAGE, then:
MAKE ENTRY TO OVERRIDE DEFAULT
5.
Within 10 seconds, press carriage return (CR)
6.
VDT displays:
ENTER PROGRAM NAME
7.
Type BBIITC, then press carrlage return (CR)
8.
VDT displays:
ENTER PROGRAM NAME (*MTC OR BASS)
9.
Type BASS, then press carriage return (CR)
2-
10.
VDT displays:
BASIC FOUR ALL PURPOSE SERVICE SYSTEM
SYSTEM DATE IS: XX/XX/XX
DO YOU WANT TO CHANGE IT?
(Y/N)
11.
Type N, then press carriage return (CR)
12.
VDT displays:
SYSTEM TIME IS: XX:XX
DO YOU WANT TO CHANGE IT?
(Y/N)
13.
Type N, then press carriage return (CR)
14.
VDT displays:
1.
2.
3.
4.
B/4 SERVICE SYSTEM
INSPECTION CYCLE
BURN-IN CYCLE
DISPLAY/PRINT PREVIOUS TEST RESULTS
ENTER YOUR SELECTION (CR
= END)
15.
Type 1, then press carriage return (CR)
16.
VDT displays:
WOULD YOU LIKE TO HAVE DESCRIPTIONS OF SELECTED
BASS PROGRAMS? (Y/N):
17.
Type N, then press carriage return (CR)
18.
VDT displays a listing of all BASS tests followed by:
SELECT NUMBER(S):
19.
Type 15 (write test) or 16 (read test), then press carriage return (CR)
20.
VDT displays:
SELECTED ENTRIES: 15
ENTER ONE OF THE FOLLOWING:
R = REVIEW, CR = EXECUTE):
21.
Press carriage return (CR)
22.
VDT displays:
(A
=
ADD, D
=
DELETE,
DO YOU WANT TO LOG ERRORS TO THE ERROR FILE?
23.
2-6
Type Y, then press carriage return (CR)
(Y/N)
24.
VDT displays:
DO YOU WISH TO RESET ERROR FILE?
25.
Type Y, then press carriage return (CR)
26.
VDT displays:
(YIN):
%Mll
DESCRIPTION OF TEST
ENTER TAPE CARTRIDGE UNIT TO TEST (C0 - C3):
C~,
27.
Type
then press carriage return (CR)
28.
VDT displays:
HOW MANY ERRORS TO BE DISPLAYED ON VDT?
29.
Type 10, then carriage return (CR)
30.
At the completion of the test (approximately 10 minutes) the VDT shall
display:
DO YOU WANT TO TEST ANYMORE TAPE CARTRIDGE UNITS?
31.
(YIN):
Type N, then press carriage return (CR)
2-7
CHAPTER 3
MAINTENANCE
CORRECTIVE MAINTENANCE
3.1
3.1.1
GENERAL PHILOSOPHY
This chapter contains information which will aid the Service Engineer in
troubleshooting the MTCD.
3.2
TROUBLESHOOTING PROCEDURES
A typical sequence used to isolate the trouble to a replaceable module or PCB
1S as follows:
3.3
•
Collect information about the malfunction.
•
Examine the unit to see if power is applied.
•
Examine for a blown ac line fuse.
•
Decide if the malfunction is in the MTCD or the Controller.
•
If the MTCD is bad, switch OFF power and open the cabinet.
•
Examine for loose connectors or broken W1res.
•
Examine for broken or burned parts.
•
If the malfunction 1S located, correct it.
FUNCTIONAL DESCRIPTION
The MTCD functions within a system as a backup read and write memory device.
record mode is four track serial.
The
Data and control signals are received via an
interface (I/O) cable connecting the MTCD to the CPU.
systems of the MTCD are the Power Supply and Transport.
The two major functional
The Transport contains
two sub-functions, they are; Tape Motion Control and Read/Write Operations.
3-1
3.3.1
POWER SUPPLY
The Power Supply is an open frame, multi-output power supply which supplies the
Transport with its required dc voltages.
Tap changes on the Transformer (Tl) give
the following ranges over a frequency range of 47 to 63 hertz (see Figure 2-2).
100
110
lIS
120
+
+
±
±
10%
10%
10%
10%
200
220
230
240
VAC
VAC
VAC
VAC
±
±
±
+
10%
10%
10%
10%
VAC
VAC
VAC
VAC
The Power Supply outputs the following voltages, including a regulated S.O volts dc
±O.lV.
Measure voltage at TP4 on PCB.
Adjust RS for correct level.
±SV @ 2.6A
+24V @ 1.SA, with 3.SA surge up to 80 milliseconds
-24V @ 1.SA, with 3.SA surge up to 80 milliseconds
A crowbar overvoltage circuit is provided on the +S volts output.
The crowbar
trips above 6.5 volts dc.
3.3.2
TRANSPORT
The Transport is made up of three assemblies and five PCBs dividing the Transport
into two sub-functions.
Read/Write Operations.
3-2
The two sub-functions are; Tape Motion Control and
The assemblies and PCBs are:
Assemblies
Printed Circuit Boards
Magnetic Head
Switch/Sensor
Heat Sink
Interconnect Board
Data Circuit Board
Interface Board
Encoder/Decoder Board
Servo Board
3.3.3
SUB-FUNCTIONS OF THE TRANSPORT
A functional description of the assemblies and PCBs that make up the Transport are
best explained in the following sub-function descriptions.
3.3.3.1
Tape Motion Control
The Switch/Sensor Assembly, located on top of the drive, is used to determine the
state of the tape cartridge and the position of the tape.
The two microswitches in
the Switch/Sensor Assembly are used to originate the Cartridge-In-Place (CIP) and
File Protect (FIP) signals.
CIP goes true whenever a cartridge is completely engagE
The FIP signal will be true only when the File Protect Indicator Arrow on the
cartridge points toward the SAFE position.
This will disable the write operation.
Upper Tape Hole (UTH) and Lower Tape Hole (LTH) signals are derived from two photo
sensors.
These signals go true whenever an upper or lower tape hole has passed
the sensors.
These signals are sent directly to the Interface Board which utilizes the tape
to control tape position.
hole~
The tape cannot run forward beyond the second EOT hole
reverse past the second set of BOT holes.
3-3
OJ
3.3.3.2
Read/Write Operations
The Data Board contains a read envelope threshold detection comparator
network to assure valid read data and to discriminate against non valid
data. This network disables the Data Detected signal unless the read
envelope exceeds a certain predetermined voltage. This voltage is 60
millivolts during normal read operations; 200 millivolts during a read
after write operation (Write enable (WEN) true enables the 200 millivolts
threshold); 500 millivolts during a high speed search (High Speed (HSP-)
true enables the 500 millivolts threshold). The Read envelope threshold
detector is used to produce the Data Detected (DAD) signal.
After the selected track on the read heads have been determined, the Read
Data is input to a read amplifier, which amplifies the data to approximately
250 millivolts, and filtered by a low pass network. This MFM data, plus the
Data Detected signal, is sent to the Encoder/Decoder Board via a line driver.
The Read Data decoding stages of the Encoder/Decoder Board include a
desnake circuit (which eliminates data dropouts during periods of no
transition), a phase lock servo, a timing pulse generator (consisting of
four one-shots whose pulse widths are controlled by the servo output), and
a data acquisition circuit (which strips the preamble and a Read Data Strobe
generator.
The timing pulse generator (four one-shots) produce four sampling pulses
of variable width. Each pulse is timed by the phase lock servo to equal
one quarter of the bit cell. This division helps in the detection of the
mid bit transition which is peculiar to "one" data bits of the MFM code.
Depending on the data pattern, two of the sampling pulses (EO-A and EI-A)
which represent 0 and I data bits are applied to the data acquisition
network.
This.network develops the ~RZ ~ata. The Read Data Strobe is developed by
a fllp-flop/nand gate comblnatlon that automatically eliminates the
all-ones read preamble by disabling the Read Data Strobe during its
occurrence.
3-4
3.4
ELECTRICAL ADJUSTMENTS (For information only.
3.4.1
Not a field adjustment.)
GAIN ADJUSTMENT (DATA BOARD)
Adjust for a 1.9 volts dc positive and negative read envelope output on the lowest
output signal track using the following procedure.
1.
Using an external DEI 302030 Data Pattern Generator or its equivalent,
write an "all ones" test pattern on all tracks in MFM format. (Data
transfer rate is 192 kilohertz at 30 inches per second.) (Other data
sources may be used and none is required in drives having Codec Boards.)
2.
Read back each data track while alternately monitoring the positive or
negative read envelopes on the Interconnect Board. Test points are
J500-20 (positive envelope) and J500-3 (negative envelope) on the
Interconnect Board. Determine track exhibiting lowest amplitude read
envelopes.
3.
Adjust pot R5l3 on the Data Board for 1.9 volts dc in the read reverse
pass just after writing the track with the lowest amplitude.
4.
Recheck all data tracks. Positive and negative read envelopes of each
track should measure within ±0.05 volt dc of each other.
3.4.2
SERVO POWER ADJUSTMENT (SERVO BOARD)
Generally not required, unless a ±15 volts regulator has failed.
If failed, use the following procedure:
1.
Connect VOM or DVM reference lead to diode VR700, cathode.
2.
Attach VOM or DVM test lead to Pin 4 of operational amplifier U705.
Record -15 volts dc voltage to three figure accuracy (XX.XXX).
3.
Attach VOM or DVM test lead to Pin 7 of the operational amplifier U705.
4.
Adjust R765 until +15 volts dc is within ±5 volts in positive direction
of the reading obtained at Pin 4 of U705.
3-5
3.4.3 INTERFACE PCB ONE-SHOT PERIODS
LOCATION
PERIOD
U623 Pin 10
.9
+
.1 msec
U623 Pin 6
22
+
5 usec
U6l7 Pin 6
650
+
100 msec
U6l7 Pin 10
650
+
100 msec
U6l4 Pin 3
30
+
4 msec
U6l5 Pin 3
90
+
15 msec
3.4.4 SERVO PCB POT SETUP
3-6
1.
Adjust R76l for a voltage of 0.0 ± 0.1 volt at BALAS test point.
2.
Set forward speed with R764.
3.
Adjust R762 for a ramp time of 23 ± 0.5 milliseconds.
4.
Insure any loss of voltage that will result in loss of tape motion.
Set reverse speed with R763.
3.4.5 DATA ADJUSTMENT AND CHECK PROCEDURE
1.
Write all "ones" pattern (192 kilohertz at 30 inches per second) on track
Unit select, track 0, forward, and write enable are required.
2.
Attach scope probe to R535 on lead near R537 on board 301,061.
3.
In the Read Only Mode, adjust R5l3, refer to 301,061 until the signal
(approximately a sine wave in appearance) 1S 1.8 volts peak-to-peak.
4.
Check inter-record gap voltage amplitudes after gain adjustment. Voltage
shall not exceed 350 millivolts. All four tracks must be checked.
5.
Check DAD signal to insure true level only during data.
a.
Attach scope trigger on forward command at P3, Pin 22 of PCBA 301,094.
Observe DAD on U23, Pin 3 on PCBA 301,094. Place second (2nd) channel
lead to R535 on LEAD NEAR RS37 on PCBA 301,061 for data burst
correlation.
b.
Operate drive in READ AFTER WRITE MODE and write at least 20
consecutive data blocks for check. All four tracks must be checked.
NOTE
First 100 microseconds after Forward Command may
generate DAD spikes not of consequence.
3.5
PREVENTIVE MAINTENANCE
Preventive Maintenance which should be done by the Service Engineer is limited to
cleaning as needed, and observing safety procedures while making repairs.
Cleaning
shall be done if the Transport is replaced.
3.5.1
MAGNETIC HEAD CLEANING
The Magnetic Head should be cleaned daily if the Transport is in regular use.
Dirty heads may cause data dropouts during read and write operations.
Use a
non-residue, non-corrosive cleaning agent, such as DuPont Freon TF, and a lint
free cloth to clean the head assembly.
Be sure to wipe up any excess and allow
the heads to dry prior to operating the Transport.
3-7
Spray type head cleaners are not recommended because
overspray may contaminate the motor bearings. Also,
never clean the head with hard metal objects. This
will result in permanent head damage.
3.5.2
TAPE CLEANER CLEANING
The Tape Cleaner removes loose tape oxide and other foreign material from the tape
before it contacts the head.
This foreign material accumulates in and around the
tape cleaner and must be removed to ensure that the Tape Cleaner will continue to
work effectively.
The Tape Cleaner should be cleaned on the same schedule as the
head.
To clean, insert a folded sheet of paper in the bottom of the cleaning slot of the
cleaner.
Slide the paper up, lifting the foreign material from the cleaner.
A
soft brush may be used to remove the foreign material from the area around the tape
cleaner and head assembly.
Do not use metal objects to clean the Tape Cleaner.
If the Tape Cleaner should become scratched, it
could scratch the tape surface, resulting in lost data.
3.5.3 MOTOR CAPSTAN CLEANING
The Capstan is composed of hard polyurethane and must be cleaned after foreign
material has built up.
Clean, using Freon and a lint free cloth.
schedule should be the same as for the head.
Be careful not to permit cleaning solvent to drip
into the drive motor bearings as it will result in
a failed component.
3-8
The cleaning
CHAPTER 4
REMOVAL/REPLACEMENT PROCEDURE
4.1
SPARE PARTS LIST
TABLE 4-1.
4.2
SPARE PARTS
BFC MM
Vendor
160189
MDX-04.000
FUSE, 4A-MDX SB
5
160190
MDA-12.000
FUSE, 12A MDA
5
610010
B903030
PCB, CART TAPE CONTROLLER
1
610020
NB903040
PCB, CART TAPE POWER SUPPLY
1
610710
900960-002
CABLE, CARTRIDGE TAPE
1
611000
902761-001
TAPE DRIVE TRANSPORT
1
617010
345002
FAN, COOLING
1
617020
100321
SWITCH, TOGGLE
1
617030
180007-001
TRANSFORMER
0
737020
181003
RFI, FILTER
1
Description
Quantity
REMOVAL/REPLACEMENT PROCEDURE
This section explains the procedure to remove the major (spared) assemblies and
install their replacements.
Before removing any assembly, the following steps
shall be followed:
•
Remove Magnetic Cartridge
•
Set power switch to OFF position
•
Unplug the ac power cord from its source
4-1
4.2.1
PCB CARTRIDGE TRANSPORT POWER SUPPLY
This PCB is removed in the following manner:
•
Complete steps in Section 4.2.
•
Lift off the top cover of the ~rrCD (older models have screws holding them
in place of the (3M) stick-tight connections). These screws must be
removed to remove the top cover.
•
•
Locate the PCB.
•
•
Disconnect the cable at Jl.
Lift up on the PCB till the connectors J2 and J3 can be seen.
Disconnect the cables at J2 and J3.
•
Remove the PCB.
•
To install a new PCB, repeat the above in reverse order.
•
Verify the regulated +5 volts is within tolerance (refer to Section 3.3.1).
4.2.2
TRANSPORT
To remove the Transport, first complete the steps ln Section 4.2, then do the
following procedure.
•
Remove the screws located on the bottom of the MTCD.
•
Lift off the top cover.
•
Disconnect the PCB Cartridge Tape Drive power supply and remove per
Section 4.2.1.
•
Lift the Transport up and to your left, placing on right side of MTCD.
•
Disconnect cable at P702 of Servo PCB.
•
Disconnect the I/O cable at P3 of Encoder/Decoder PCB.
•
Lift the Transport up and set to one side.
•
To install the Transport repeat the above in reverse order, connecting
cables as required. Place top cover in place and tighten all screws
loosened or removed.
,
4-2
CHAPTER 5
REFERENCE DATA
5.1
PURPOSE
This section contains Logic Diagrams, Schematics, and drawings used in the MTCD
and is intended to be used ONLY by Service Engineers as a troubleshooting aid.
5-1
Tape Motion
Description
Name
Signal
FWD-
Forward
When troe. causes the tape to move in a forward direction.
REV-
Reverse
When true. causes the tape to move in a reverse direction.
HSP-
High Speed
When true, causes the tape to move at high speed in the direction
selected by either FWD- or REVTape motion will proceed until the command signals go false or:
RWD-
a.
In forward where an EOT hole is en counted whereupon motion
will stop.
b.
In reverse where a set of BOT holes is encountered whereupon
motion wlll stop.
c.
Both directions are commanded Simultaneously whereupOn the
tape wlll stop.
d.
Rewind command is received which will overrule other motion
commands.
e.
Internal Ready signal is not troe whereupon motion will stop.
f.
In High Speed. motion will drop to low speed when the upper
"load point" hole is sensed in reverse or the upper "early
warning".. hole is sensed in forward .
When true. causes the tape to be positioned to beginning of tape at
high speed. The Tape Drive must be selected to start a Rewind
sequence. but may be unselected after the sequence is started.
Rewind
Beginning of tape is defined as between the two innermost (toward
the Qliddle of the tape) set of upper and lower holes located at the
"head end" of the tape. This location is r~commended for unloading
the cartridge as the data recording a'rea is completely protected.
Rewind will "overrule" all other motion signals. Successive
Rewind commands will not cause the tape to be "run off".
Rewind will stop if the internal Ready signal is false.
An automatic Rewind sequence is executed when a cartridge is
installed in the Tape Drive or when. power is applied when a
cartridge is installed.
Input Data
Signal
Name
WEN-
Wrlte Enable
WDA-/
WDA+
Wrlte Data
Delcrlptlon
,
When tnae. enable I the writing and eraBlng functions for the lelected
track. The wrlting and eraling proce8lel occur only if the cartrldge
I. In the unprotected .tate (not lafe). Thil Ilgnal il internally latched
aDd 91111 remain .et unlell relet by:
-Revene or Hlgh Speed commands
-Internal Ready Ilgnal, not true.
W111 modulate the wrlte head to produce a recorded waveform on
tape when WEN- II true and the cartridge is In the unprotected
state (not .afe).
In WDA+ (unactuated) ltate, the tape wlll be erased in the ANSI
!alhion. The WDA- ltate 91111 cause the opPosite polarity to be recorded. Therefore. if no erase head is used, eraSing can be done
by usmg the write head.
5-2
The minimum clock period for data input Ihould not allow the resultant number of flux reversal from exceeding 3200 per lnch
(1260 nux reverBal/cm) and the rile and fall times should not be
creater than 0.5 microseconds.
Output Status Signal s
Signal
Name
Description
SLD-
Drive Selected
Will be true when the Tape Drive has received its proper unit
address.
RDY-
Drive Ready
Will be true when a cartridge is installed, the sensor lamp is drawing current, and the +5 VDC is applied to the Tape Drive.
BSY-
Drive Busy
Will be true when the Tape Drive is in an automatic rewind sequence
(I.e. when a cartridge is first installed in the Tape Drive), or when
the Tape Drive is executing a rewind, forward, or reverse command.
This signal will go true when the command is received and will remain true until the motion has stopped (i. e. 30 milliseconds after
low speed motion has been commanded to stop and 80 milliseconds
after 90 ips operation has been commanded to stop).
In the case of receipt of a non-executed or illegal command, (FWD
at EOT or REV at BOT), this signal will not be true, iDdicating the
command is rejected.
FW-
Flag
Will be set and latched when an automatic sequence to position the
cartridge to BOT has been executed, or a rewind has been completed. This signal is reset by subsequent receipt of a FWD command.
WND-
Write Enabled
Will be true when a write enable condition is latched withln the
Tape Drive.
FUP-
File Unprotected
Will be true when a cartridge is installed and it is in the unprotected
state (1. e. can be written on).
LPS-
lpad Point Sensed
Will be set and latched when the upper load point hole (the warning
of beginning of tape) is passed in the reverse direction. This signal
will be inte~lly reset when the load point hole is subsequently
passed in the forward direction. When this signal is true, high
speed will be disabled. Reverse tape motion is allowed to proceed
until the BOT holes are encountered where the Tape Drive will stop
and accept only forward commands.
EWS-
Early Warning Sensed
Win be set and latched when the upper early warning hole (the
warning at end of tape) is passed in the forward direction. This
signal will be Internally reset when the early warning holes is subsequently passed in the reverse direction. When this signal is true,
high speed is disabled. Forward tape motion is allowed to proceed
until the EOT hole is encountered where the Tape Drive will stop
and accept only reverse commands.
Output Data •
Signal
RDA
Name
Read Data
Description
This lignal is a repUca of the WDA data written onto the tape. The
RDA line is latched and its initlal state is Dot preset, thus, initlally
the RDA line may be high or low. Conditions can occur wherein single
transitions can occur during erased portion.&.. 9f the tape. These can
set the RDA line in the opposite state.
The read signal is always available in dual gap drives, and is always
avallable when WEN has been set for single gap drives.
The threshold levels are internally set as a function of the mode of
operation.
· NOT ETape- Drives with Encoder/Decoder circuit
board assemblies have interface signals the same as
serial Tape Drives equipped with interface circuit
board assemblies. except the WDA and RDA signals
Input Data For Drives With an Encoder/Decoder Circuit Board Assembly
Signal
WDE-
Description
Name
Write Data Enable
A control line to the Tape Drive which separately allows enabling
of the write function (the sending of write data strobes and the
writing of data on tape). The \\'EN function is still required and
will enable both writing and eraSing. WEN causes the write
circuits to become active and tape to be erased. after the tape
is up to speed and other conditions met, the WDE will cause the
Tape Drive to send the first data strobe and shall commence to
record flux transitions on the tape.
A 11 data which is to be written on the tape must be sent to the
Tape Drive (all preambles. postambles. and check characters)
and that data is recorded in Manchester form, phase encoded.
\\,NZ-
Write Non-Return Zero
Data
During the write data strobe period the state of the input write
data line is sensed as follows:
WNZ
WNZ
= Low = 1.
~
and
High = 0
The state of WNZ is only examined during the write data strobe
period. The WNZ signal must be steady 0.5 ",sec prior to the
the Write data strobe true period (WDS = Low).
Table 3-10. Ouput Data For Drives With an Encoder/Decoder Circuit Board Assembly
Description
Signal
Name
DAD-
Data Detected
Wlli be false except when data has been detected. Data detected
requires the receipt of at least 12 zeros and a one following without
a period of 2.5 bit times without data being received. Data detected
can be used to sense the presence of the block of data. This signal
will strip the preamble from the read data signal and is used to
enable the other data output signals.
RNZ-
Read Non-Return to
Zero Data
During read data strobe period if RNZ is low (true) then the data is
a one, if high then the data is zero.
RDS-
Read Data Strobe
Will be low for 0.3 :1:50% ",sec indicating that RNZ can be sampled
during this period.
Read data in the forward direction will have preamble removed and
will stay true for all of the postamble and for approximately 2.5 bit
times after postamble has passed. (Therefore, CRCC and postamble
must be stripped in forward direction and the CRCe and preamble
must be removed in the reverse direction.) To first set read data,
12 zeros must be sensed. A drop-out will shut off circuit if it exists
for>2.5 bit times (50 ",sec) am circuit will stay off for 13 bit times
(~290 ",sec).
The read data threshold levels are internally set to three different
levels depending on the write and motion commands. Read only
threshold or-curs when running at low speed without writing. Write
threshold OCl-un when writing. Search threshold occurs when running
at high speed.
WDS-
5-4
Write Data Strobe
The write data strobe is generated within the encoder/decoder module
and is sent out to indicate when the Tape Drive is taking data. The
low or true strobe period is 5.2 :1:5% ",sec.
APPENDIX A
MAGNETIC TAPE CARTRIDGE CONTROLLER
TABLE OF CONTENTS
Page
APPENDIX A
MAGNETIC TAPE CARTRIDGE CONTROLLER
SECTION I
INTRODUCTION
AI.I
AI.2
AI.2.1
AI.2.1.1
AI.2.1.2
AI.3
AI.3.1
AI.4
General Description . . .
Physical Description . .
Firmware Description .
Control Structure . .
Command Sequencing .
Physical Requirements . .
General Specifications
. · . . . . . . . ..
..
. · . . . . . . . ..
..
. · . . . ..
......
.
. ..
.....
. . . .
.
...
. . .
. . . . . .
Options . . . . . . . . . . . . . . . .
..
SECTION 2
INSTALLATION
A2.1
General Description . . . . . . . . . . . . . . . . . . . . A2-1
SECTION 3
MAINTENANCE
A3.1
A3.1.1
A3.1.2
A3.1.3
A3.2
General Description . . . . . .
............
Microprocessor Logic
. . ..
........
Computer Interface Logic
. . . . . . . . . . . . . .
Magnetic Tape (MTCD) Interface Logic . . . .
. .
Functional Parameters . . . . . . . . .
. . . .
SECTION 4
RECOMMENDED SPARE PARTS/GLOSSARY
A4.1
A4.2
Recommended Spare Parts List . . . . . . . . . . . . . . . A4-1
Glossary of Mnemonics . . . . . . . . . . .
. A4-1
. ..
SECTION S
REFERENCE DATA
AS.I
Reference Data
.
.
.
.
.
.
.
.
.
.
.
.
.
.
A1-1
A1-1
A1- 7
Al- 7
AI-8
AI-IO
AI-IO
AI-12
A3-1
A3-2
A3-4
A3-S
A3-6
. . . . . . . . . . . . . . . . . . . . . . AS-I
iii
LIST OF ILLUSTRATIONS
Page
Figure
Al-l
Al-2
A3-1
Magnetic Tape Cartridge/Controller Interface Cabling
. AI-I
Controller PCB . . . . . . . . . . . . . . . . . . . . . . AI-2
Cartridge Tape Controller Block Diagram. . . . . . . . . . A3-1
LIST OF TABLES
Table
Al-I
AI-2
Al-3
A4-1
iv
Tape Unit Interface Signal List
...
. .
Computer Interface Signal List . . . .
. . .
General Specifications
...... .
. .
Spare Parts . . . . . . . . . . . . . . . . . . .
. . .. . . AI- 3
. ..
AI-4
. . . . . AI-II
. . .
. . A.4-1
SECTION I
INTRODUCTION
AI.I
GENERAL DESCRIPTION
The Magnetic Tape Cartridge Controller is a standard size Basic Four printed circu:
board (PCB).
This PCB is located in the card cage (CPU Backplane) of the CPU.
Fo:
a typical system interconnection diagram, see Figure AI-I.
900960-002
TAPE
CNTRL
~-.r-I903030
TAPE DRIVE
Figure AI-I.
AI.2
CPU CARD CAGE
Magnetic Tape Cartridge/Controller Interface Cabling
PHYSICAL DESCRIPTION
The Magnetic Tape Cartridge Controller, hereafter referred to as the Controller, i:
a single PCB plugged directly into the card cage of a processor system.
A single
interface cable (part number 900960-002) connects the Tape Drive and CPU Backplane
For drawing of the Controller PCB, see Figure AI-2.
Al-l
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The Tape Unit Interface Signal List
TABLE AI-I.
1S
contained in Table AI-I.
TAPE UNIT INTERFACE SIGNAL LIST
Pin
Signal
22
SLD-
Drive
Selected
4
RDY-
Drive
Ready
6
WND-
Drive
Write Enabled
8
FLG-
Drive
Flag
10
LPS-
Drive
Load Point Sensed
12
FUP-
Drive
File
14
BSY-
Drive
Busy
16
EWS-
Drive
Early Warning Sensed
18
RWD-
Controller
Rewind
20
REV-
Controller
Reverse
22
FWD-
Controller
Forward
24
HSP-
Controller
High Speed
26
WEN-
Controller
Write Enable
28
SLl-
Controller
Unit Select 2
30
SL2-
Controller
Unit Select 21
32
SL4-
Controller
Unit Select 22
34
SLG-
Controller
Select Gate
36
RNZ-
Drive
Read NRZ Data
38
RDS-
Drive
Read Data Strobe
40
DAD-
Drive
Data Selected
42
WDE-
Controller
Write Data Enabled
44
WNZ-
Controller
Write NRZ Data
46
TR2-
Controller
Track Select 2
48
WDS-
Drive
Write Data Strobe
50
TRl-
Controller
0
Track Select 2
From
Conunents
Unprotect~d
0
1
The MTCD pin-to-pin listing of the interface cable is shown in Figure 2-4.
Al-3
The Computer Interface Signal List 1S contained 1n Table
TABLE
Al~2.
Signal Name
Al-4
Al~2.
COMPUTER INTERFACE SIGNAL LIST
Type
A Pin
B Pin
B-44
Master Reset
TTL Input
A-6
Clock Phase 1
TTL Input
A-6
Clock Phase 2
TTL Input
B-22
I/O Control Reg 1
TTL Input
B-3l
I/O
Reg 2
TTL Input
I/O Control Reg 3
TTL Input
B-6l
Output Data Bit 0
TTL Output Bus
B-39
Output Data Bit 1
TTL Output Bus
B-lO
Output Data Bit 2
TTL Output Bus
Output Data Bit 3
TTL Output Bus
B-58
Output Data Bit 4
TTL Output Bus
B-37
Output Data Bit 5
TTL Output Bus
Output Data Bit 6
TTL Output Bus
Output Data Bit 7
TTL Output Bus
Input Data Bit 0
TTL Input Bus
Input Dat'a Bit 1
TTL Input Bus
Input Data Bit 2
TTL Input Bus
Input Data Bit 3
TTL Input Bus
A-62
Input Data Bit 4
TTL Input Bus
A-32
Input Data Bit,S
TTL Input Bus
Input Data Bit 6
TTL Input Bus
Input Data Bit 7
TTL Input Bus
B-60
Priority In
TTL Input
B-54
Priority Out
TTL Output
Contro,~"
A-3l
A-26
I
A-lO
I
B-26
A-58
B-32
A-60
B-62
B-59
A-6l
A-55
TABLE Al-2.
COMPUTER INTERFACE SIGNAL LIST (continued)
Signal Name
Type
A Pin
Select In
TTL Input
Select Out
TTL Output
A-52
External Interrupt
Request
TTL Output
A-38
+5 Volts DC
Power
B Pin
B-52
B-1
B-2
B-64
B-65
Ground
Return
A-I
B-19
A-2
B-35
A-13
B-36
A-14
B-56
A-18
A-33
A-34
A-56
A-64
A-65
Memory Address Bit a
TTL Output Bus
B-5l
Memory Address Bit 1
TTL Output Bus
B-53
Memory Address Bit 2
TTL Output Bus
B-55
Memory Address Bit 3
TTL Output Bus
A-50
Memory Address Bit 4
TTL Output Bus
A-53
Memory Address Bit 5
TTL Output Bus
A-54
Memory Address Bit 6
TTL Output Bus
A-IS
Memory Address Bit 7
TTL Output Bus
A-9
Al-~
TABLE AI-2.
COMPUTER INTERFACE SIGNAL LIST (continued)
Signal Name
Type
A Pin
B Pin
;
Al-6
Memory Address Bit 8
TTL Output Bus
Memory Address Bit 9
TTL Output Bus
A-II
Memory Address Bit 10
TTL Output Bus
A-12
Memory Address Bit 11
TTL Output Bus
B-13
Memory Address Bit 12
TTL Output Bus
B-7
Memory Address Bit 13
TTL Output Bus
B-18
Memory Address Bit 14
TTL Output Bus
B-9
Memory Address Bit 15
TTL Output Bus
B-47
Memory Address Bit 16
TTL Output Bus
B-33
Memory Address Bit 17
TTL Output Bus
B-4l
Memory Data Bit 0
TTL I/O Bus
B-34
Memory Data Bit 1
TTL I/O Bus
Memory Data Bit 2
TTL I/O Bus
B-43
Memory Data Bit 3
TTL I/O Bus
B-28
Memory Data Bit 4
TTL I/O Bus
Memory Data Bit 5
TTL I/O Bus
B-30
Memory Data Bit 6
TTL I/d Bus
B-40
Memory Data Bit 7
TTL I/O Bus
B-27
DMA Acknowledge
TTL Input
A-57
DMA Request
TTL Output
A-44
DMA Memory Address
Bit 15
TTL Output Bus
B-57
Read Enable
TTL Output Bus
B-23
RTXX-
TTL Input
B-20
Transmitted DMA
Acknowledge
TTL Output
B-48
High Speed DMA
TTL Output Bus
B-14
A-35
A-36
A-24
Al.2.l
FIRMWARE DESCRIPTION
The firmware is divided into two portions:
1.
The Control Structure - includes power-on-sequencing, initialization,
"Executive" idle loop and all paths in and out of the "Executive".
2.
Command Sequencing - routine which realizes the Controller commands.
Al.2.l.l
•
Control Structure
INIT - this routine begins at address 000 6' A Controller Reset (caused by
I/O bus signal RESET - being asserted or ~y software issuing a Reset Control
operation) forces firmware to begin executing at INIT as soon as the reset
condition is removed. INIT performs the Controller Initialization.
First, Controller status is set to FF, then all used ROM locations are
added together (Modulo 256) and compared with an expected sum stored in
ROM location KSUM. If the two sums are the same, then the Read/Write
memory is tested. Each memory location is tested to verify that the
following patterns can be written and read from it: 00, FF, AA, 55, and
XY (XY is the 8 LSB of the memory location's address). If these tests
also succeed, the firmware sets the Controller status to 00 and proceeds
to START.
•
START - various Read/Write Memory locations are set to O. The Z80 interrupt
mode is set to 1. The Z80 stack pointer is set to CFF
(the top of Read/
16
Write Memory). The Z80 HI register pair is cleared ana the "Executive"
idle loop, EXEC, is entered.
•
EXEC - this routine provides the main control structure of the operational
firmware. When entered via "START", EXEC has nothing to do, so it loops
(testing several internal and external flags) looking for things to do.
One flag may be set by the Controller's I/O bus hardware, Command Received.
(This flag is included as bits 5 of Input Port 27 ,) Two internally-create l
16
situations, caused by previously issued commands, are also tested as follows
1.
When processing a Rewind command, the firmware merely initiates the
Rewind, sets an internal flag to indicate the unit is rewinding and
returns to EXEC (up to four units may be rewinding simultaneously).
EXEC, then, will test the status of a rewinding unit until it reaches
Beginning of Tape (BOT), at which point an interrupt will be initiated
for that unit.
2.
Most Controller interrupts are processed through subroutine "SUINT".
As described in the discussion of that routine, interrupts may be
disabled by the executing software. If so, the Controller firmware
will set a flag indicating an interrupt is "queued" and will return
to EXEC. EXEC will monitor the two interrupt enable flags (Attention
and Command Complete, bits 6 and 7 of Input Port 27 16 ), When an
interrupt is re-enabled and a corresponding interrupt is queued, EXEC
"unqueues" the interrupt and branches to "SEXIN" which performs the
interrupt of the CPU.
Al-7
•
ECMDD - when a command is received, EXEC branches to this routine. This
routine first sets the Controller's main status to "Busy" (by writing an
8016 to Output Port 2016)' then reads the command byte from Input Port 2016'
The four most significant bits (comprising the CMD field) are then used to
branch, thru a table, to the routine which is coded to perform that command.
•
SQINT - this subroutine is called by most routines at the completion of
their normal operation or to abnormally abort a command. Two types of
interrupts are defined in the product speCification, Attention and Command
Complete (which are essentially non-data-transfer and data-trans fer-interrupt
Each may be selectively enabled or disabled by software. For each interrupt
request, SQINT tests the associated enable/disable bit in Input Port 27
16
(bit 6 for Attention, bit 7 for Command Complete). If enable, control 1S
passed to "SEXIN". If disabled, an interrupt of the appropriate type is
queued and control is returned to the calling routing.
•
SEXIN - this subroutine, updates the Main and Auxiliary status bytes (and
makes the Controller "Not Busy"). The interrupt requests flip-flop input
to the CPU, it is then set by simply writing to Output Port 25 , and is
16
reset by the CPU acknowledging the interrupt. Control is then returned to
the calling routine.
•
EIPL, EIPLI - these routines initiate and control the firmware sequencing
through the IPL sequence.
Al.2.l.2
Command Sequencing
Non-Data-Transfer Commands
The following routines are used to perform the set of non-data-transfer commands
defined for the Controller.
They include certain subroutines which deal with the tape unit control and status
lines.
These routines are used by most of the major command-performing firmware
routines.
Al-8
•
EILL - an illegal command status is posted, then control is passed to SQINT.
•
ECLRI - any queued interrupts are removed from the queues. The status of
the tape unit whose number is coded in the command is placed into the main
and auxiliary status bytes. The Controller is made "Not Busy", and control
is passed to EXEC.
•
EREW - (Rewind). The last used track for the desired track is selected,
then the unit's status is tested. If the unit is not ready, an abnormal
termination exit is taken. Otherwise, the Rewind line to the unit is
pulsed and control is returned to EXEC.
•
EUNLD - (Unload). Similar to Rewind, except that the tape unit "Unload"
control line is raised until the unit reaches End of Tape (EaT) (which 1S
signified by the unit becoming "Not Busy"). Control is then passed to sQn
•
ESP - all space commands cause control to be passed to this routine (Space
File and Record, Forward and Reverse). Subroutines SELU and SREADY are
called to select the unit and verify it is selected and ready. SBOT is
called to check for reverse motion requested with tape positioned at BOT.
Then routine SMOT is called to initiate tape motion. When tape is up to
speed, subroutine SDAD is called to wait until data from tape is detected
(i.e., the start of a record). Then, depending on forward or reverse
motion, ESPFWD or ESPREV is entered. These routines read the first data
bytes from tape and test for a value of 0. If 0, the record is a "File
Mark". Control is passed to EFM where tape motion is stopped, a File Mark
status is posted, and control is passed to SQINT.
If not a File Mark, control is passed to ESPI to wait for the record to pas
If the command is a Forward File or Reverse File command, then the firmware
loops to space over the next record until a File Mark is reached.
If a Forward Record or Reverse Record command, tape motion is stopped,
normal status is posted, and control is passed to SQINT.
Data Transfer Commands
The following routines perform the read, write, and data test command set of the
Controller.
•
EWRT - (Write, Write Gap, Write File Mark). All write-oriented commands
enter this routine. Write Gap and Write File Mark proceed similarly to the
space commands (see ESP above), except that: (1) the Tape Unit's Write Enab:
line is activated prior to initiating tape motion, (2) the INIT flip-flop
is toggled to r'eset the write bit counter and various control terms in the
tape unit interface logic and, (3) the last flip-flop is set in preparation
for initializing the write CRC generation chip. Then, based on the command
code, either EWG or EWRT2 is entered.
EWG (Write Gap) - this routine simply delays enough time for about 4
inches of tape to be erased. Tape is stopped, their SQINT is called.
EWRT2 (Write File Mark) - see the discussion of this routine below for
the Write command.
For Write Data, start up is different. The firmware must fetch the control
block from main-frame memory (using subroutine "SGETCB") to establish the
number of bytes to write and where the data buffer is in memory. Tape
motion is then initiated ("SMOT") and control is passed to "EWRT2".
•
EWRT2 (Write) - the write function can be broken down into three main
portions: (1) front of record, (2) body of record, and (3) end of record.
Front - this portion of firmware must write the preamble, initialize the CRe
generator, and write the Leader on tape.
•
ERSS, ETST, ERD - after write, these are anticlimactic.
Al-9
Subroutines
These routines are llsed by many of the above described routines.
•
SELU, SELUA - sets the track and unit numbers on the tape unit interfaces,
tllen asserts the select line, thereby "selecting" the desired unit.
•
SELUA - selects the track last used on the unit.
•
SELU - selects the track specified in the command.
•
SREADY - tests that the selected unit is selected, "Ready", and not Rewinding.
If not, a not ready exit is taken, posting an abnormal condition status and
calling SQINT.
•
SGETCB - fetches the 7 byte control block (CB) from main memory by reading
addresses 7016 - 76 16 . It then places. the address portio~s of the CB ~n
the DMA Address Reglster and returns wlth the byte count ln the DE reglster
pair, the 16 address LSBs in the HL pair and the Index bytes in Read/Write
Memory.
•
SMOT - starts tape motion, providing appropriate delays to ensure proper gap
size and proper head positioning before tape is written or read. SMOT tests
for forward or reverse tape motion, setting the appropriate control signal
to the selected tape unit. After SMOT commands the units to Move, it
samples the units BSY (busy) status to insure it goes busy - if not, tape
is either at physical EDT (forward motion) or BOT (reverse motion). If this
occurs, control is not returned to the calling routine, instead the status
is updated to reflect an "error" exit to "IERR3A".
•
SDAD - this routine simply tests the tape units Data Detected (DAD) which
is connected as bit 1.
•
SBOT - test for BOT. This routine aborts reverse motion commands issued
to a unit positioned at BOT and insures that the Load Point area of the
Tape is not used by any of the forward commands.
Al.3
PHYSICAL REQUIREMENTS
The Controller will be installed in the card cage of a standard Basic Four data
processing system.
All clearance and airflow provisions normal to the Basic Four
system will be observed.
Al.3.l
GENERAL SPECIFICATIONS
The general specifications including Electrical, Interface, and Environmental are
listed in Table Al-3.
AI-IO
TABLE AI-3.
GENERAL SPECIFICATIONS
Parameters
Characteristics
ELECTRICAL REQUIREMENTS
DC Voltage
+5 V + .25 V
DC Current
3.8A
INTERFACE REQUIREMENTS
Signal Levels
(Standard TTL)
0.0 to +0.4 V equals logic low
+2.4 to Vce equals logic high
Termination
All lines exceeding 2 feet will
terminate with 220 ohm pull up
resistors and 333 ohm pull down
resistors
ENVIRONMENTAL REQUIREMENTS
Operating Temperature
Operating Humidity
40% to 60% non-condensation
Operating Elevation
-500 to 7,000 feet above sea level
Storage and Shipping Altitude
-500 to 30,000 feet above sea level
AI-II
Al.4
OPTIONS
(This Page Left Intentionally Blank)
Al-12
SECTION 2
INSTALLATION
A2.l
GENERAL DESCRIPTION
The installation procedures are explained in the System Manual and the MTCD
installation.
They are therefore not repeated here.
A2-1
(This Page Left Intentionally Blank)
SECTION 3
MAINTENANCE
A3.1
GENERAL DESCRIPTION
Maintenance of the Controller is limited to replacement of the Controller itself.
This section will explain the Controller function only as an aid to the Service
Engineer in troubleshooting.
A Functional Block Diagram 1S shown 1n Figure A3-1.
.....
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,
.
n,,.1!
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z.,"It.'..~e
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Figure A3-1.
Cartridge Tape Controller Block Diagram
A3-1
The Controller is a complete link between the computer program and the tape unit.
The Controller performs command decoding, tape start/stop timing generation, tape
record formatting, tape position, status reporting, and interrupt control.
As such,
it is a combination of Controller/Formatter.
The Controller is designed around a Z80 MOS Microprocessor.
The three major
functional (logic) blocks begin with the microprocessor logic.
A3.l.l
MICROPROCESSOR LOGIC
Memory addressing and I/O ranges are limited by design to be sufficient for use in
this environment.
The Microcomputer is comprised of the Z80, clock generator,
buffers for Z80 address, and control line, memory bank, and I/O decoders.
The clock circuit divides the 5 megahertz CPU clock CPH2- by two, creating a
2.5 megahertz square wave clock.
functions on the board.
This clock is driven to most other clocked
The buffers increase the drive capability of the Z80
outputs to drive the multiple TTL loads on the Controller.
The memory bank
decoder 6L translates Z80 address bits 9, 10, and 11 into eight 512 byte bank select
lines.
Since address lines 12 thru 15 are not connected, the memory address space
consists of 4 kilobytes.
By convention, the firmware for the Controller places
this 4 kilobyte space in addresses 0000
16
thru OCFF
16
.
The address decoder is
enabled by the Z80 MREQ signal, creating unique "chip enable" outputs from the
decoder.
Tpese select lines are directly connected to PROM and RAM chip enable pins.
The two I/O decoders (6D, 8F) are similar in their implementation.
by the Z80
10 and address bit 5. They are selectively enabled by the WR (write)
and RD (read) control lines.
address bit 5
1S
They decode the three LSB address lines.
an enable, the decoders are active for
XXIXXyyy where X can be 0 or 1 and yyy is a 3 bit code.
A3-2
Both are enabled
Because
10 ports with addresses
So, for each yyy there are XXXX (16) possible occurrences.
By firmware conventions
the XXXX is always set to 0000, so the I/O decoders actually decode ports 2016 thru
27
16
Due to the timing relationship of the address lines and the 10-, RD-, and WR
.
control lines, the decoder outputs are "glitch-free" pulses.
This is important as
it allows the decoder outputs to be directly connected to the flip-flop clock and
clear pins.
The Read/Write Memory's (RWM) and Read Only Memory's are 256 x 4 bit and 512 x 8 biparts, respectively.
The two RWM chips are enabled together to provide a 256 byte
Read/Write Memory array (Note that 246 bytes of the "space" enable by MBK6- are
unused).
Each prom chip is uniquely enabled by one memory decode signal.
The
Controller has sockets for 6 ROM's, the seventh decode (MBK7-) is unused.
The
six sockets may not all be used, depending on the size of the firmware package.
Finally, the Data Bus Buffers created a high-fanout bidirectional bus from the I-TTl
load drive of the Z80.
(Note that the Read/Write Memories (which are very low-fanir
MOS parts) connect to the actual Z80 bus.)
All other parts are connected to the
high-fanout bus.
The following tasks are performed by microprocessor logic:
1.
Decode of all commands.
2.
Monitoring and posting tape unit status.
3.
Generation of all tape unit control signals and timing.
4.
Formatting of records written on tape.
5.
Byte-by-byte control of data transfers.
6.
Initiation of interrupts.
The detailed control for each of the Controller operations resides in read-onlymemory-resident firmware routines.
A minimal amount of Random Access Memory is
provided for scratch pad use by the firmware.
A3-3
A3.1.2
COMPUTER INTERFACE LOGIC
This is composed of two parts, Programmed I/O and Direct Memory Access (DMA).
Programmed I/O
The Programmed I/O logic is used to receive and latch commands from the Basic Four
CPU (hereafter called CPU).
It also holds and reports status to the CPU.
It
decodes and latches the Initial Program Load (IPL) bus cycle, and performs the
external interrupt function to the CPU.
The Programmed I/O logic does not operate on commands and status ln any way.
It
serves only as a holding function and provides the response time necessary to
participate ln the CPU bus cycles (which the Z80 cannot respond to directly).
The content of the command and status data bytes is controlled entirely by Z80
firmware.
·DMA
The DMA (Direct Memory Access) logic is again mostly passive.
An incrementing
address register holds the address in Basic Four computer memory.
established by Z80 firmware
accordin~
The address is
to the operation being performed (control
block fetching, data transfer, status transfers, etc.).
There is no direct
connection of the DMA logic to any Cartridge Tape Controller (CTC) function other
than the microprocessor.
Memory input and output data is also handled passively.
The DMA logic merely contains latches to hold the data.
by or received by the Z80 firmware.
Data is always provided
The DMA logic in no way assigns any significance
to either data or address.
The active portion of the DMA logic is the DMA control.
This logic participates
in all memory transfers, providing control signals, enabling address, and data is
in proper timing sequence for operation with a BFC memory module.
A3-4
Logic is included to allow the CTC to be placed in a DMA priority daisy chain; this
enables the CTC to perform byte interweaving of DMA operations with other controlle
equipped with this daisy chain logic.
Logic is included to decode bus cycles and perform the following bus operations:
1.
Command and main status transmission over I/O bus.
2.
Data, control, and auxiliary status input and output over DMA channel.
3.
External interrupts.
A3.l.3
MAGNETIC TAPE (MTCD) INTERFACE LOGIC
The MTCD interface hardware includes logic for performing byte data transfers with
the mlcroprocessor and converting them to serial data transfers with the MTCD.
The
microprocessor does not deal with the bit-to-bit timing details of the MTCD data
transfers.
A set of individually settable/resettable discrete latches is provided to supply
control signals to the MTCD.
these control lines.
The microprocessor firmware has direct control over
Thus, all the details of MTCD control timing and sequence
(i.e., the tape formatting/positioning functions) is resident in Z80 firmware.
The control logic in the MTCD interface is, therefore, mainly passive.
MTCD status is routed through a set of latches that allow the firmware to
read it.
The MTCD hardware does not react to MTCD status or status changes
there are minor exceptions to this which will be discussed in the detailed
description of the logic).
The data handling portion of the MTCD interface logic consists of the following
functions:
1.
A shift register for parallel-to-serial and serial-to-parallel conversion.
2.
Bit counters to define 8-bit byte increments of data.
A3-,
3.
CRC generation and checking logic.
4.
Logic to synchronize tape unit strobes and data to internal CTC timing.
5.
Z80 interrupt logic for read-after-write control and escape from tape unit
hang-up situations.
This functional block contains the line drivers and receivers, data buffer registers
and the decode logic necessary for the microprocessor to control the tape unit(s).
Hardware for read and write CRC calculations is included.
A3.2
FUNCTIONAL PARAMETERS
Data reliability of the Controller 1S subject to the limits of the
~ITCD.
Soft Error Rate (Recoverable Errors) 1S not more than one error 1n 10
transferred.
A3-6
8
bits of data
SECTION 4
RECOMMENDED SPARE PARTS/GLOSSARY
A4.l
RECOMMENDED SPARE PARTS LIST
TABLE A4.;.1.
A4.2
SPARE
PA~TS
Item
Number
BFC/HM
Number
Vendor
Part Number
1
B903030
610010
Controller, PCB
1
2
900960-002
610710
Cable
1
~
Description
Quantity
GLOSSARY OF MNEMONICS
MNEMONIC
AC
MEANING
Abnormal Condition. This bit amplifies the FP, CRC and EOT bits
When set in conjunction with'FP, AC indicates a write command
was issued to a File Protected Unit, the command is aborted.
When set in conjunction with EOT, AC indicates tape has reached
physical End of Tape (EOT). When set in conjunction with CRC,
AC indicates a data dropout has occurred during a Read or Write
Command. The last command has therefore reached an unpredictabl
conclusion.
"
AC will be set if the Not Ready, Device Busy, or Illegal Command
situations occur. These conditions are reflected in the
Auxiliary Status byte.
AC will also be set if a Read, Read Format, or Write Command is
issued with a DMA Byte count of 0 in the Control Block.
BF
Busy Flag. This bit allows the Controller to be run in an
interrupt-drive erivironment or a test flag environment. When
busy, the Controller will set the Busy Flag. If the Busy Flag
is set, the software should not issue any commands to the
Controller. The Controller will reset BF when it is again ready
to accept a new command.
NOTE:
BOT
The Controller can take up to 500 microseconds to set the
Busy Flag after a command has been received.
The tape in the cartridge
Tape (BOT).
1S
positioned at the Beginning of
A4-l
MNEMONIC
MEANING
CC
1 - Command Complete Interrupt
o - Attention Interrupt
CRC
This bit is set if during a read or read-after-write operation,
a CRC error is detecte&.
EDT
The tape in the cartridge is positioned in the End of Tape (EDT)
warning area or is physically the EDT. This latter condition
is undesirable. When it occurs, bit 0 (AC) is also set.
FM
File Mark. This bit is set after a Write File Mark command or
after a Read or Space command that terminates immediately after
traversing a File Mark record.
FP
The tape unit is loaded with a cartridge that is file protected
(refer also to AC).
AUXILIARY STATUS BYTE
MNEMONIC
A4-2
MEANING
DB
Device Busy.
The desired unit
IC
Illegal Command Code.
NR
Not Ready. The desired tape unit is not ready for one or more
of the following reasons:
1S
busy rewinding.
1.
Power (+5 volts dc) not applied to the unit.
2.
No cartridge installed.
3.
The BOT/EDT sensor lamp
1S
burned out.
T
When set, indicates that the command just completed was performed
in the test mode.
TR
Track Number. The binary coded number of the track selected
during performance of the command. This will always agree to
the TR field in the comrnand, except that TR will always be 0
for a rewind termination.
#
Unit Number. The number of the unit or test associated with
the interrupt.
SECTION 5
REFERENCE DATA
5.1
REFERENCE DATA
AS-l
Major Flow Diagrams
Sheet
,
AS-2
Contents
1 of 3
Control Structure
2 of 3
Non-Data-Transfer Commands
3 of 3
nata Transfer Commands
C
RESET
'J
INITPower-On
Self-Test
Rom
Failur e
I
i
I
Rom
Failure
!
RERRI
....,-
Rom Fa il
Halt
Rom Fail
Halt
T
I
-
- Override
- - - -
Override
-- ---
-
- -,
Controller
Initialize
!
I
>
\V
Sheet 2,3
EX E"
Executive
Command Received
ECMDD
Command
Decode
~
Sheet 3
Interrupt
Disabled
Interru t
Sheet 2
1
SEXIN
External
Interrupt
1
o
AS-3
Control Structure. (Sheet 1 of 3)
;J>
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01 ~"cel
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Write, IIrlte
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FlIp lIark
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Comma nd
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4
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Space
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Unload
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