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Document type:
User's Manual (MUT)
Title:
Mod. V775, 16 / 32 Channel Multievent TDC
Revision date:
10/09/2004
Revision:
10
4.2. Interrupter capability
The Mod. V775 houses a RORA-type VME INTERRUPTER. The INTERRUPTER responds
to 8 bit, 16 bit and 32 bit Interrupt Acknowledge cycles providing an 8-bit STATUS/ID on the
VME data lines D00..D07.
4.2.1. Interrupt Status/ID
The interrupt STATUS/ID is 8-bit wide, and it is contained in the 8LSB of the Interrupt
Vector Register (see § 4.11). The register is available at the VME address: Base Address
+ 0x100C.
4.2.2. Interrupt Level
The interrupt level corresponds to the value stored in the 3LSB of the Interrupt Level
Register (see § 4.10). The register is available at the VME address: Base Address +
0x100A. If the 3LSB of this register are set to 0, the Interrupt generation is disabled.
4.2.3. Interrupt Generation
An Interrupt is generated when the number of events stored in the memory equals the value
written in the Event Trigger Register at the VME address: Base Address + 0x1020 (see
§ 4.18). If the value in Event Trigger Register is set to 0 the interrupt is disabled (default
setting).
4.2.4. Interrupt Request Release
The INTERRUPTER removes its Interrupt request when a Read Access is performed to the
Output Buffer so that the number of events stored in the memory decreases and becomes
less than the value written in the Event Trigger Register.
4.3. Data transfer capability
The internal registers are accessible in D16 mode, unless otherwise specified. Access in
D32, BLT32, MBLT64, CBLT32 and CBLT64 is available for the data buffer.
4.4. Register address map
The Address map for the Model V775 is listed in Table 4.2. All register addresses are
referred to the Base Address of the board, i.e. the addresses reported in the Tables are the
offsets to be added to the board Base Address.
The Table gives also information about the effects of RESET on the registers. In particular,
column 2 through 4 refer to the following RESET operations:
NPO:
00102/97:V775x.MUTx/10
Filename:
V775_REV10.DOC
Number of pages:
72
Page:
36