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Contents 4 3.6.5 Cache, MMU, and DMA Devices .................................................... 60 3.6.6 Boot ROMs .......................................................................................... 60 3.6.7 SCSI ...................................................................................................... 61 3.6.8 Projects ................................................................................................. 61 Hardware Guidelines ................................................................................................ 63 4.1 Introduction ...................................................................................................... 63 4.2 Architectural Considerations .......................................................................... 64 4.2.1 Interrupt Handling ............................................................................ 64 4.2.2 Cache Issues ........................................................................................ 65 4.2.3 MMU Support .................................................................................... 66 4.2.4 Floating-Point Support ...................................................................... 66 4.2.5 Other Issues ........................................................................................ 67 Memory .............................................................................................................. 67 4.3.1 RAM ..................................................................................................... 68 4.3.2 ROM ..................................................................................................... 68 4.3.3 Ethernet RAM ..................................................................................... 68 4.3.4 NVRAM ............................................................................................... 69 4.3.5 Parity Checking .................................................................................. 69 4.3.6 Addressing .......................................................................................... 69 4.3.7 Bus ........................................................................................................ 70 VMEbus ............................................................................................... Multibus II ........................................................................................... PCI, cPCI, and PMC ........................................................................... Busless ................................................................................................. 70 74 76 76 Devices ............................................................................................................... 76 4.4.1 Interrupts ............................................................................................. 77 4.4.2 System Clock ...................................................................................... 79 4.3 4.4 vii