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VadaTech AMC520 User’s Manual
1 Document Overview
This document describes the AMC520 board including the FPGA reference design, host-side
device driver/tool, and configuration of the MMC microcontroller. It also describes how to go
about using/customizing the FPGA reference design for customer specific needs.
Further FPGA/software development is generally expected to be performed at the
customer’s site to add any additional application-specific functionality to the AMC520 board.
The reference design FPGA/software implementation is provided as an example and proofof-concept but is not considered a formal baseline for the customer’s application and it may
change at any time.
This document describes the Rev C and later version of the board. Prior board versions are
not supported.
1.1 Applicable Products
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VadaTech AMC520 (Virtex-6)
Related product:
o VadaTech AMC514 (Virtex-6 - AMC520 derives from this design)
1.2 Document References
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AMC520 FPGA Pin-out/Design Diagrams (found in AMC520 VHDL Sources release)
VadaTech AMC520 Datasheet (http://www.vadatech.com)
PICMG® AMC.0 R2.0 AdvancedMC Mezzanine Module (http://www.picmg.org)
PICMG® AMC.1 R2.0 AdvancedMC PCI Express and AS (http://www.picmg.org)
PICMG® AMC.2 R1.0 AdvancedMC Ethernet (http://www.picmg.org)
PICMG® uTCA.4 R1.0 Enhancements for Rear I/O and Precision Timing
(http://www.picmg.org)
Xilinx Virtex-6 Datasheets and User’s Guides
(http://www.xilinx.com/support/documentation/virtex-6.htm)
Xilinx Virtex-6 Integrated Block for PCI Express (PCIe) Documentation
(http://www.xilinx.com/products/ipcenter/V6_PCI_Express_Block.htm)
Xilinx Virtex-6 Embedded Tri-Mode Ethernet MAC Wrapper Documentation
(http://www.xilinx.com/products/ipcenter/V6_Embedded_TEMAC_Wrapper.htm)
Xilinx XAUI Documentation (http://www.xilinx.com/products/ipcenter/XAUI.htm)
Xilinx Memory Interface Generator Documentation
(http://www.xilinx.com/products/ipcenter/MIG.htm)
VADATECH FORM No. 3WI731-01 Rev. B
VT-MAN-CUS-100402-2.2.1
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