Download External memory interface for TC1775

AP32035
TC1775 EXTMEM
Connecting memories to the TC1775 EBU
6.7.3
Flash burst mode
To execute code using the burst read mode on ST Burst Flash devices (e.g.
M58BW016BT80) the Flash device must be initialized to perform burst read accesses.
The Flash memory device starts in asynchronous read mode after power-on and expects
a configuration data word in the Burst Configuration Register (BCR) to enter the burst
mode. The burst mode initialization code has to run outside the Flash memory.
The Set Burst Configuration Register command writes data to the Burst configuration
register. This operation is initiated by a standard two bus cycle command sequence. The
Set Burst Configuration Register command 0x60 is written to any address within the
Flash memory device to enter the procedure. In the second cycle the value 0x03 has to
be written to a valid address within the Flash memory device where the Burst
Configuration Word is transmitted on A[15:0].
BCR = 0x10CA;
BCR = BCR * 4;
Flash_Base = 0xA0000000;
// Value for Burst Configuration register
// ST Burst Configuration cmd value for 32-Bit
// Flash base address
Cycle
CMD
1
WR
Flash_Base
0x00000060
SET RCD CYCLE#1
2
WR
Flash_Base + BCR
0x00030003
SET RCD CYCLE#2
Table 24
Address
Data
Command
ST Set Burst Configuration Command sequence (32-Bit access)
Application Note
50
V 1.1, 2002-09