Download UM10211
Transcript
UM10211 NXP Semiconductors Chapter 19: LPC2300 I2C0, I2C1, I2C2 8.5 Miscellaneous states There are two I2STAT codes that do not correspond to a defined I2C hardware state (see Table 19–412). These are discussed below. 19.8.5.1 I2STAT = 0xF8 This status code indicates that no relevant information is available because the serial interrupt flag, SI, is not yet set. This occurs between other states and when the I2C block is not involved in a serial transfer. 19.8.5.2 I2STAT = 0x00 This status code indicates that a bus error has occurred during an I2C serial transfer. A bus error is caused when a START or STOP condition occurs at an illegal position in the format frame. Examples of such illegal positions are during the serial transfer of an address byte, a data byte, or an acknowledge bit. A bus error may also be caused when external interference disturbs the internal I2C block signals. When a bus error occurs, SI is set. To recover from a bus error, the STO flag must be set and SI must be cleared. This causes the I2C block to enter the “not addressed” slave mode (a defined state) and to clear the STO flag (no other bits in I2CON are affected). The SDA and SCL lines are released (a STOP condition is not transmitted). UM10211_1 User manual © NXP B.V. 2007. All rights reserved. Rev. 01 — 6 July 2007 443 of 617
Related documents
UM10211 LPC23XX User manual
UM10211 LPC23XX User manual
UM10211 LPC23XX User manual
LPC32x0
UM10316
UM10326
NXP LPC2104, LPC2105, LPC2106 User Manual
Lab 1 - California State University, Northridge
UM10326 LPC32x0 and LPC32x0/01 User manual
NXP LPC2468 User Manual
LPC2114/2124/2212/2214 USER MANUAL
You cannot Flash but only read this