Download 80296SA Microcontroller User`s Manual

80296SA USER’S MANUAL
Address:
Reset State:
SP_CON (Continued)
1FBBH
80H
The serial port control (SP_CON) register selects the communications mode and enables or disables the
receiver for all modes. For modes 1 and 3, it enables or disables even or odd parity. For modes 2 and 3,
it contains the ninth data bit to be transmitted. It also enables or disables the divide-by-two prescaler and
the baud-rate down counter.
7
0
BGD
PRS
Bit
Number
Bit
Mnemonic
3
REN
PAR
TB8
REN
PEN
M1
M0
Function
Receive Enable
In mode 1, 2, or 3, setting this bit enables receptions. When this bit is set, a
falling edge on the RXD pin starts a reception. In these modes, this bit has
no effect on transmissions.
In mode 0, clearing this bit enables transmissions and setting it enables
receptions.
Clearing this bit stops a reception in progress and inhibits further
receptions. In mode 0, clearing the RI flag in the SP_STATUS register
starts a reception; therefore, to avoid corrupting your reception, clear this
bit before clearing the RI bit.
2
PEN
Parity Enable
In modes 1 and 3, setting this bit enables parity. For mode 1, when this bit
is set, the seventh data bit takes the parity value on transmissions and
SP_STATUS.7 becomes the receiver parity error bit. For mode 3, when this
bit is set, SP_CON.4 (TB8) takes the parity value on transmissions and
SP_STATUS.7 becomes the receive parity error bit.
Clear this bit for mode 2.
For mode 0, this bit is ignored.
1:0
M1:0
Mode Selection
These bits select the communications mode.
M1
0
0
1
1
M0
0
1
0
1
mode 0, synchronous
mode 1, 8-bit asynchronous with optional parity
mode 2, 9-bit asynchronous with optional receive interrupt
mode 3, 9-bit asynchronous with optional parity
Figure 8-6. Serial Port Control (SP_CON) Register (Continued)
8-12