Download GPL162002A/162003A Programming Guide

GPL162002A/162003A Programming Guide
P_TFT_PIP0_VIR_SAH
0x7D13
Bit
15
14
13
12
11
Function
-
-
-
-
-
Default
0
0
0
0
0
P_TFT_PIP1_VIR_SAH
15
14
13
12
11
Function
-
-
-
-
-
Default
0
0
0
0
0
Default
Function
Default
Bit
[15:11]
[10:0]
8
7
6
5
4
3
2
1
0
0
0
0
0
PIP0_VIR_SAH
0
0
0
0
0
0
0
TFT PIP1 Virtual Frame Buffer Start High Address
10
9
8
7
6
5
4
3
2
0
0
PIP1_VIR_SAH
0
0x7D29
15
14
13
12
11
-
-
-
-
-
0
0
0
0
0
P_TFT_PIP3_VIR_SAH
Bit
9
0
0
0
0
0
0
15
14
12
11
-
-
-
-
-
0
0
0
0
0
Function
0
3
2
1
0
0
0
0
0
0
0
TFT PIP2 Virtual Frame Buffer Start High Address
10
9
8
7
6
5
4
PIP2_VIR_SAH
0
0x7D34
13
1
y
l
n
O
l
a
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t
n s
e
U
d
i
f
n 司
o
C 公
s
限
u 有
l
p 份
l
a
r
e 股
n
e 技
G 科
格
普
P_TFT_PIP2_VIR_SAH
Function
10
0x7D1E
Bit
Bit
TFT PIP0 Virtual Frame Buffer Start High Address
0
0
0
0
0
0
TFT PIP3 Virtual Frame Buffer Start High Address
10
9
8
7
0
0
0
0
6
5
4
3
2
1
0
0
0
0
0
PIP3_VIR_SAH
Type
0
0
0
Description
Condition
Reserved
PIP#_VIR_SAH
R/W
PIP# Virtual Start High Address.
This register is valid only when PIP#SCREN is
set to 1. The virtual frame start address means
the real address of data, not TFT PIP# buffer
start address.
See the following diagram for details.
P_TFT_PIP0_VIR_SAL
Bit
r
o
F
15
14
0x7D14
13
12
11
TFT PIP0 Virtual Frame Buffer Start Low Address
10
9
Function
Default
0
0
0
15
14
0
0
0
0x7D1F
13
12
11
0
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
TFT PIP1 Virtual Frame Buffer Start Low Address
10
9
Function
Default
7
PIP0_VIR_SAL
P_TFT_PIP1_VIR_SAL
Bit
8
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
PIP1_VIR_SAL
0
© Generalplus Technology Inc.
0
0
0
0
0
0
PAGE 144
0
0
V1.0 – Dec. 20, 2006