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APPENDICES
Number
Name
Meaning
Set by
(When Set)
Explanation
Corresponding
ACPU
D9†††
Corresponding
CPU
This register stores each status of CH2.
b15 to b8 b7 b6 b5 b4 b3 b2 b1 b0
0
0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1
Addition/subtraction
0: Addition
1: Subtraction
Underflow detection flag
0: Not detected
1: Detected
Overflow detection flag
0: Not detected
1: Detected
SD1902
CH2 status
monitor
Sampling flag
0: Not operating
1: Operating
CH2 status monitor
Frequency
measurement flag
0: Not operating
1: Operating
Rotation speed
measurement flag
0: Not operating
1: Operating
Pulse measurement flag
0: Not operating
1: Operating
PWM output flag
0: Not operating
1: Operating
Fixed to 0.
A
S
(Every END
processing)
New
LCPU
Appendix 3 Special Register List
• This register stores a value indicating the external I/
O signal status of CH2.
• Unused signal status is fixed at off.
• When Normal Mode is set for Operation Mode
Setting (high-speed counter function parameter), a
value according to the setting configured for
Function Input Logic Setting (high-speed counter
function parameter) is stored in the function input
status. Therefore, when a voltage is applied to the
function input terminal while Negative logic is set for
Function input logic setting, this register turns off.
• When other than A Phase/B Phase is selected for
Count Source Selection (high-speed counter function
parameter), the phase A input status and phase B
input status are fixed at off.
b15 to b7 b6 b5 b4 b3 b2 b1 b0
0
SD1903
CH2 external I/O
status monitor
CH2 external I/O
status monitor
0/1 0/1 0/1 0/1 0/1 0/1 0/1
Phase Z input
status
0: OFF
1: ON
Function input
status
0: OFF
1: ON
Latch counter
input status
0: OFF
1: ON
Phase A input
status
0: OFF
1: ON
Phase B input
status
0: OFF
1: ON
Coincidence
output No.1
0: OFF
1: ON
Coincidence
output No.2
0: OFF
1: ON
Fixed to 0.
373