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Download ECE5465/Intel arch reference/Intel 64 and 32 Arch Sw Dev Man V3B
Transcript
VM ENTRIES of the Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 2B for the error numbers. • The checks in Section 23.3 and Section 23.4 cause processor state to be loaded from the host-state area of the VMCS (as would be done on a VM exit). Information about the failure is stored in the VM-exit information fields. See Section 23.7 for details. EFLAGS.TF = 1 causes a VM-entry instruction to generate a single-step debug exception only if failure of one of the checks in Section 23.1 and Section 23.2 causes control to pass to the following instruction. A VM-entry does not generate a singlestep debug exception in any of the following cases: (1) the instruction generates a fault; (2) failure of one of the checks in Section 23.3 or in loading MSRs causes processor state to be loaded from the host-state area of the VMCS; or (3) the instruction passes all checks in Section 23.1, Section 23.2, and Section 23.3 and there is no failure in loading MSRs. Section 26.15 describes the dual-monitor treatment of system-management interrupts (SMIs) and system-management mode (SMM). Under this treatment, code running in SMM returns using VM entries instead of the RSM instruction. A VM entry returns from SMM if it is executed in SMM and the “entry to SMM” VM-entry control is 0. VM entries that return from SMM differ from ordinary VM entries in ways that are detailed in Section 26.15.4. 23.1 BASIC VM-ENTRY CHECKS Before a VM entry commences, the current state of the logical processor is checked in the following order: 1. If the logical processor is in virtual-8086 mode or compatibility mode, an invalid-opcode exception is generated. 2. If the current privilege level (CPL) is not zero, a general-protection exception is generated. 3. If there is no current VMCS, RFLAGS.CF is set to 1 and control passes to the next instruction. 4. If there is a current VMCS, the following conditions are evaluated in order; any of these cause VM entry to fail: a. if there is MOV-SS blocking (see Table 21-3) b. if the VM entry is invoked by VMLAUNCH and the VMCS launch state is not clear c. if the VM entry is invoked by VMRESUME and the VMCS launch state is not launched If any of these checks fail, RFLAGS.ZF is set to 1 and control passes to the next instruction. An error number indicating the cause of the failure is stored in the 23-2 Vol. 3
