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PowerDNA API Reference Manual, Release 4.0
DQ_TIMEOUT_ERROR
nothing is heard from the IOM for Time out duration
DQ_IOM_ERROR
error occurred at the IOM when performing this command
DQ_SUCCESS
successful completion
Other negative values
low level IOM error
Description:
When this function is called for the first time, the firmware stops any ongoing operation on the
device specified and reprograms it in accordance with the channel list supplied. Thus, the user cannot
call this function when the layer is involved in any streaming or data mapping operations.
If the user specifies a timeout delay that is too short, this function can time out when called for
the first time because it is executed as a pending command and layer programming takes up to 10ms.
Once this function is called, the layer continuously acquires data and every next call function
returns the latest acquired data.
If you would like to cancel ongoing sampling, call the same function with 0xffffffff as the first
channel element.
The channel list (cl) is an array of uint32 elements with a length (CLSize) from 1 to 4. Each
element of the channel list contains a bit-packed word that defines the channel number, the front-end
multiplexer configuration and the gain. The following examples show the string of helper macros that
are used to assemble the mux setting, channel number and gain setting.
Example 1. First element (0) of the channel list specifies channel 2 with the front-end mux set
to read the S+ and S- inputs with a gain of 10.
cl[0] = DQ_LNCL_CHANGAIN (DQ_AI224_SET_CHAN(DQ_AI224_MUX_SS,2),
DQ_AI224_GAIN_10);
Example 2. Second element (1) of the channel list specifies channel 3 with the front-end mux
set to read the difference between the bridge completion voltage and the S- input with a gain of 1.
cl[1] = DQ_LNCL_CHANGAIN (DQ_AI224_SET_CHAN(DQ_AI224_MUX_CS,3),
DQ_AI224_GAIN_1);
When using these macros, the valid channel numbers are numbered from 0 to 3. The following
defines are used to select the front-end multiplexers:
DQ_AI224_MUX_SS
// S+ to SDQ_AI224_MUX_CS
// Bridge comp - SDQ_AI224_MUX_EXCP
// P+ to SDQ_AI224_MUX_PPS
// P+ to PS+
DQ_AI224_MUX_NULL
// GND only for nulling
DQ_AI224_MUX_PS
// PS+ to PSDQ_AI224_MUX_EXCN
// P- to SDQ_AI224_MUX_5K
// Vdrop on 5k prec. resistor
The following defines are used to select gain:
DQ_AI224_GAIN_1
DQ_AI224_GAIN_2
DQ_AI224_GAIN_4
DQ_AI224_GAIN_5
DQ_AI224_GAIN_8
DQ_AI224_GAIN_10
DQ_AI224_GAIN_20
DQ_AI224_GAIN_40
DQ_AI224_GAIN_50
DQ_AI224_GAIN_80
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