Download SN8F27E64

SN8F27E60 Series
8-Bit Flash Micro-Controller with Embedded ICE and ISP
2.1.1 RESET VECTOR (0000H)
A one-word vector address area is used to execute system reset.
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Power On Reset (POR=1).
Watchdog Reset (WDT=1).
External Reset (RST=1).
After power on reset, external reset or watchdog timer overflow reset, then the chip will restart the program from
address 0000h and all system registers will be set as default values. It is easy to know reset status from POR, WDT,
and RST flags of PFLAG register. The following example shows the way to define the reset vector in the program
memory.
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Example: Defining Reset Vector
ORG
JMP
…
0
START
ORG
15H
START:
…
…
ENDP

; 0000H
; Jump to user program address.
; 0015H, The head of user program.
; User program
; End of program
Note: The head of user program should skip interrupt vector area to avoid program execution error.
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