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5.2 Using The 166 With Byte-Wide Memories .......................................................................................................... 30
5.3 Using DRAM With The 166 Family ..................................................................................................................... 31
6. Single Chip 166 Family Considerations .................................................................................................................. 32
6.1 Single Chip Operation ........................................................................................................................................... 32
6.2 In-Circuit Reprogrammability Of FLASH EPROM ............................................................................................. 32
6.3 Total Security For Proprietary Software ............................................................................................................... 32
6.4 Keeping An External Bus ...................................................................................................................................... 32
6.5 Hitex’s In-Circuit FLASH Programming Utility Toolkit ...................................................................................... 32
6.5 Accommodating In-Circuit FLASH Programming ............................................................................................... 33
6.7 In-Circuit FLASH Programming Via CAN .......................................................................................................... 33
7. The Basic Memory Map .......................................................................................................................................... 34
7.1 On-Chip RAM Regions ......................................................................................................................................... 34
7.1.1 166 Variants ........................................................................................................................................... 34
7.1.2 167CR & 167SR, C165, Some 161 Variants ......................................................................................... 34
7.1.4 C167CS, C161CS ................................................................................................................................... 34
7.2 Planning The Memory Map .................................................................................................................................. 34
7.2.1 External ROM Applications .................................................................................................................... 34
7.2.2 Internal ROM Applications ..................................................................................................................... 35
7.3 A Typical 167 System Memory Map .................................................................................................................... 35
7.4 How CPU Throughput Is Related To The Bus Mode ........................................................................................... 36
7.5 Implications Of Bus Mode/Trading Port Pins For IO ........................................................................................... 36
8. System Programming Issues ................................................................................................................................... 37
8.1 Serial Port Baud Rates ........................................................................................................................................... 37
8.1.1 166 Variants ............................................................................................................................................ 37
Baudrates for 20 MHz ...................................................................................................................................... 37
Baudrates for 16 MHz ...................................................................................................................................... 37
8.1.2 Enhanced Baudrate Generator On 167 Variants ..................................................................................... 37
8.1.3 The Synchronous Port On The 167 ......................................................................................................... 37
8.2 Interrupt Performance ........................................................................................................................................... 37
8.2.1 Conventional Interrupt Servicing Factors ............................................................................................... 37
8.2.2 Event-Driven Data Transfers Via The PEC System ............................................................................... 38
PEC Usage Examples ....................................................................................................................................... 38
8.2.3 Extending The PEC Address Ranges And Sizes Above 64K ................................................................. 39
8.2.4 Software Interrupts .................................................................................................................................. 39
8.2.5 Hardware Traps ....................................................................................................................................... 39
8.2.6 Interrupt Vectors And Booting Up The 166 ........................................................................................... 39
8.2.7 Interrupt Structure ................................................................................................................................... 40
8.3 The Bootstrap Loader ............................................................................................................................................ 40
8.3.1 On-Chip Bootstrap Booted Systems ....................................................................................................... 40
8.3.2 Freeware Bootstrap Utilities For 167 ...................................................................................................... 41
8.4 166 Family Stacks ................................................................................................................................................. 41
8.5 Power Consumption .............................................................................................................................................. 42
8.6 Understanding The DPPs ...................................................................................................................................... 42
8.6.1 166 Derivatives ....................................................................................................................................... 42
8.6.2 167 Derivatives ....................................................................................................................................... 43
9. Allocating Pins/Port Pins In Your Application ....................................................................................................... 44
9.1 General Points About Parallel IO Ports ................................................................................................................. 44
9.2 Allocating Port Pins To Your Application ............................................................................................................ 44
9.3 Port 0 ..................................................................................................................................................................... 44
Port 0 Pin Allocations: ..................................................................................................................................... 44
9.4 Port 1 ..................................................................................................................................................................... 44
9.5 Port 2 ..................................................................................................................................................................... 45
9.5.1 The CAPCOM Unit ................................................................................................................................. 45
9.5.2 Time-Processor Unit Versus CAPCOM ................................................................................................. 45
9.5.3 32-bit Period Measurements ................................................................................................................... 45
9.5.4 Generating PWM With The 166 CAPCOM Unit ................................................................................... 46
9.5.5 Sinewave Synthesis Using The CAPCOM ............................................................................................. 46
166 Designer’s Guide - Page 4