Download Si8250/1/2UM - Silicon Labs
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Si8250/1/2UM SFR Definition 16.2. IP: Interrupt Priority — R/W R/W R/W R/W R/W R/W R/W Reset Value — PENAB PCP0 PTRDET PS0 PAIN0/VIN POCP PINT0 10000000 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Bit Addressable SFR Address: 0xB8 Bit 7: Unused. Bit 6: PENAB: External Interrupt (ENABLE) Priority Control 0: External interrupt is set to low priority level. 1: External interrupt is set to high priority level. Bit 5: PCP0: Comparator0 Interrupt Priority Control. 0: Comparator0 interrupt is set to low priority level. 1: Comparator0 interrupt is set to high priority level. Bit 4: PTRDET: Transient Detector Interrupt Priority Control 0: Transient Detector interrupt is set to low priority level. 1: Transient Detector interrupt is set to high priority level. Bit 3: PS0: Enable UART Interrupt Priority Control 0: UART interrupt is set to low priority level. 1: UART interrupt is set to high priority level. Bit 2: PAIN0/VIN: AIN0/VIN Window Detector Interrupt Priority Control 0: AIN0/VIN window detector interrupt is set to low priority level. 1: AIN0/VIN window detector interrupt is set to high priority level. Bit 1: POCP: Enable Overcurrent Protection Fault Interrupt Priority Control 0: Disable overcurrent protection fault is set to low priority level. 1: Enable overcurrent protection fault interrupt is set to high priority level. Bit 0: PINT0: Enable External Interrupt (INT0) Interrupt Priority Control 0: External Interrupt is set to low priority level. 1: External Interrupt is set to high priority level. 140 Rev. 0.7