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Download A20 User Manual V1.20 - linux
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Register Name: SPI_CTL Offset: 0x08 Bit Read/Write Default Value: 0x0012_001C Default Description 0: Slave Mode 1: Master Mode EN 0 R/W SPI Module Enable Control 0 0: Disable 1: Enable 6.3.4.4. SPI INTERRUPT CONTROL REGISTER Register Name: SPI_INTCTL Offset: 0x0C Default Value: 0x0000_0000 Bit Read/Write Default Description 31:18 / / / SS_INT_EN SSI Interrupt Enable 17 R/W 0 Chip Select Signal (SSx) from valid state to invalid state 0: Disable 1: Enable TX_INT_EN 16 R/W 0 Transfer Completed Interrupt Enable 0: Disable 1: Enable 15 / / / TF_UR_INT_EN 14 R/W 0 TXFIFO under run Interrupt Enable 0: Disable 1: Enable TF_OF_INT_EN 13 R/W 0 TX FIFO Overflow Interrupt Enable 0: Disable 1: Enable 12 R/W A20 User Manual (Revision 1.2) 0 TF_E34_INT_EN Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 596 / 812
