Download LPC-P2919 development prototype board

I2C
The LPC2919 contain two I2C-bus controllers.
The I2C-bus is bidirectional for inter-IC control using only two wires: a
serial clock line (SCL) and a serial data line (SDA). Each device is recognized by a
unique address and can operate as either a receiver-only device or as a transmitter
with the capability to both receive and send information (such as memory).
Transmitters and/or receivers can operate in either master or slave mode,
depending on whether the chip has to initiate a data transfer or is only addressed.
The I2C is a multi-master bus, and it can be controlled by more than one bus master
connected to it.
The main features if the I2C-bus interfaces are:
SPI
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I2C0 and I2C1 use standard I/O pins with bit rates of up to 400 kbit/s (Fast I2Cbus) and do not support powering off of individual devices connected to the
same bus lines.
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Easy to configure as master, slave, or master/slave.
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Programmable clocks allow versatile rate control.
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Bidirectional data transfer between masters and slaves.
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Multi-master bus (no central master).
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Arbitration between simultaneously transmitting masters without corruption of
serial data on the bus.
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Serial clock synchronization allows devices with different bit rates to
communicate via one serial bus.
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Serial clock synchronization can be used as a handshake mechanism to suspend
and resume serial transfer.
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All I2C-bus controllers support multiple address recognition and a bus monitor
mode.
The LPC2919 contains three Serial Peripheral Interface modules (SPIs) to
allow synchronous serial communication with slave or master peripherals.
The key features are:
–
Master or slave operation.
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Each SPI supports up to four slaves in sequential multi-slave operation.
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Supports timer-triggered operation.
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Programmable clock bit rate and prescale based on SPI source clock
(BASE_SPI_CLK), independent of system clock.
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Separate transmit and receive FIFO memory buffers; 16 bits wide, 32 locations
deep.
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Programmable choice of interface operation: Motorola SPI or Texas Instruments
Synchronous Serial Interfaces.
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Programmable data-frame size from 4 to 16 bits.
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Independent masking of transmit FIFO, receive FIFO and receive overrun
interrupts.
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