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Download VME INTERFACE BOARD
Transcript
BG#IN, AS, DTACK VME BUS ARBITRATION DSP-WR TO TIMING BOARD BR#, BG#OUT D0-D7 FIBER OPTIC TRANSMITTER # = 0 TO 3 VMEbus IRQA IRQB VME SSI WRAM DSP56002 PA AM0-AM5 VME PA DSP-WR A0-A14 A01-A15 VME FROM TIMING BOARD RSTWDT RESET IRQ5 INTERRUPT RQINTR FIBER OPTIC RECEIVER D0-D23 PROCESSOR D00-D07 VME ADDRESS A01-A31 32K X 24 SRAM SHIFT IRQA, BRDSEL RDCOM DECODE REGISTER 1K X 16 FIFO IRQB RST-FIFO RDFIFO D0-D7 BOOT ROM A0-A15 Misc. DSP ADDRESS DECODE ADDRESS BUS A00 - A15 WRHADR D00-D15 AM0-AM5 Misc. RDFIFO WRHADR WRHDATA RDCOM RST-FIFO RQINTR DSP-WR WRAM RSTWDT CE-ROM A16-A31 VME DSP-WR DATA BUS D00-D23 D00-D31 VME BRDSEL D00-D23 RDCOM WRHDATA D16-D31 VME Fig. 1: Block diagram of the VME interface board. VMEbus Interface Board, pg. #2 Updated Jan. 13, 1999
