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Freescale Semiconductor, Inc. M68MPB916Y3UM/D Freescale Semiconductor, Inc... March 1998 M68MPB916Y3 MCU PERSONALITY BOARD USER’S MANUAL © MOTOROLA, INC., 1998; All Rights Reserved For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc... Freescale Semiconductor, Inc. Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Motorola does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and the Motorola logo are registered trademarks of Motorola Inc. SDI is a trademark of Motorola Inc. Motorola Inc. is an Equal Opportunity/Affirmative Action Employer. For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. CONTENTS CONTENTS Freescale Semiconductor, Inc... CHAPTER 1 GENERAL INFORMATION 1.1 1.2 1.3 1.4 INTRODUCTION .............................................................................................................. 1-1 SPECIFICATIONS............................................................................................................. 1-2 EQUIPMENT REQUIRED ................................................................................................ 1-2 CUSTOMER SUPPORT .................................................................................................... 1-3 CHAPTER 2 HARDWARE PREPARATION AND INSTALLATION 2.1 2.2 INTRODUCTION .............................................................................................................. 2-1 HARDWARE PREPARATION......................................................................................... 2-1 2.2.1 Clock Select Header (W1) ......................................................................................... 2-4 2.2.2 VDDA Select Header (W2) ....................................................................................... 2-5 2.2.3 Voltage Reference High Select Header (W3)............................................................ 2-6 2.2.4 Voltage Reference Low Select Header (W4)............................................................. 2-7 2.2.5 MCU Clock Source Select Header (W5)................................................................... 2-8 2.2.6 Using a 32 KHz Clock............................................................................................... 2-9 2.2.7 MCU ID Code Select Header (W6)......................................................................... 2-10 2.2.8 VSSA Insertion Point (E1) ...................................................................................... 2-10 2.3 MEVB CONFIGURATION............................................................................................. 2-11 2.4 MPB – MMDS INSTALLATION.................................................................................... 2-13 CHAPTER 3 MEVB QUICK START GUIDE 3.1 3.2 3.3 INTRODUCTION .............................................................................................................. 3-1 CONFIGURING THE MPB............................................................................................... 3-1 CONFIGURING THE MPFB............................................................................................. 3-1 3.3.1 MPFB Memory Devices ............................................................................................ 3-1 3.3.2 MPFB Jumper Headers.............................................................................................. 3-2 3.4 MEVB INSTALLATION INSTRUCTIONS..................................................................... 3-3 3.4.1 Power Supply – MPFB Connection........................................................................... 3-4 3.4.2 Personal Computer – BDM Connection .................................................................... 3-5 3.5 SOFTWARE INSTALLATION......................................................................................... 3-5 M68MPB16Y3UM/D For More Information On This Product, Go to: www.freescale.com iii Freescale Semiconductor, Inc. CONTENTS CHAPTER 4 MEVB SUPPORT INFORMATION 4.1 INTRODUCTION .............................................................................................................. 4-1 CHAPTER 5 MAPI SUPPORT INFORMATION Freescale Semiconductor, Inc... 5.1 INTRODUCTION .............................................................................................................. 5-1 CHAPTER 6 SCHEMATIC DIAGRAMS 6.1 INTRODUCTION .............................................................................................................. 6-1 FIGURES 2-1. 5-1. 5-2. 5-3. 5-4. 5-5. MPB Jumper Headers and Insertion Point Location Diagram (top view).......................... 2-2 MAPI Interface Connector Layout...................................................................................... 5-1 MAPI Interface Connector P1 Pin Assignments ................................................................ 5-2 MAPI Interface Connector P2 Pin Assignments ................................................................ 5-3 MAPI Interface Connector P3 Pin Assignments ................................................................ 5-4 MAPI Interface Connector P4 Pin Assignments ................................................................ 5-5 TABLES 1-1. 2-1. 2-2. 3-1. 4-1. 4-2. 4-3. 4-4. 4-5. 4-6. 4-7. 4-8. iv MPB Specifications ............................................................................................................ 1-2 Jumper Header Types ......................................................................................................... 2-3 MPB Jumper Header Descriptions ..................................................................................... 2-3 MPFB Quick Start Jumper Header Configuration.............................................................. 3-2 Logic Analyzer Connector J7 Pin Assignments ................................................................. 4-2 Logic Analyzer Connector J8 Pin Assignments ................................................................. 4-2 Logic Analyzer Connector J9 Pin Assignments ................................................................. 4-3 Logic Analyzer Connector J10 Pin Assignments ............................................................... 4-3 Logic Analyzer Connector J11 Pin Assignments ............................................................... 4-4 Logic Analyzer Connector J12 Pin Assignments ............................................................... 4-4 Logic Analyzer Connector J13 Pin Assignments ............................................................... 4-6 Logic Analyzer Connector J14 Pin Assignments ............................................................... 4-8 For More Information On This Product, Go to: www.freescale.com M68MPB16Y3UM/D Freescale Semiconductor, Inc. CONTENTS TABLES (continued) Freescale Semiconductor, Inc... 4-9. Logic Analyzer Connector J15 Pin Assignments ............................................................... 4-9 4-10. Logic Analyzer Connector J16 Pin Assignments ............................................................... 4-9 4-11. Logic Analyzer Connector J17 Pin Assignments ............................................................. 4-10 4-12. Logic Analyzer Connector J18 Pin Assignments ............................................................. 4-11 4-13. Logic Analyzer Connector J19 Pin Assignments ............................................................. 4-12 4-14. Logic Analyzer Connector J20 Pin Assignments ............................................................. 4-12 M68MPB16Y3UM/D For More Information On This Product, Go to: www.freescale.com v Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... CONTENTS vi For More Information On This Product, Go to: www.freescale.com M68MPB16Y3UM/D Freescale Semiconductor, Inc. GENERAL INFORMATION CHAPTER 1 GENERAL INFORMATION Freescale Semiconductor, Inc... 1.1 INTRODUCTION This manual provides general information, hardware preparation, installation instructions, a quick start guide, and support information for the M68MPB916Y3 MCU Personality Board (MPB). The MPB is one component of Motorola’s modular approach to MC68HC16Y3 and MC68HC916Y3 Microcontroller Unitbased product development. This modular approach lets you easily configure our development systems to fit your requirements. The MPB may be used in either the M68MMDS1632 Motorola Modular Development System (MMDS) or the M68MEVB1632 Modular Evaluation Board (MEVB). Alternately, you may install the MPB directly in your target system if the target system includes an modular active probe interconnect (MAPI) interface. The MCU device on the MPB defines which MCU is emulated/evaluated by the MMDS or MEVB. Both systems are invaluable tools for designing, debugging, and evaluating MCU operation of the M68HC16 and M68300 MCU Families. By providing the essential MCU timing and I/O circuitry, these systems simplify user evaluation of prototype hardware/software products. MPB product includes: • M68MPB916Y3 MCU Personality Board (MPB) • Plastic overlay for use with the MEVB – pin outs for the logic analyzer connectors on the MPFB (specifically for the MC68HC916Y3 MCU) • Documentation M68MPB16Y3UM/D For More Information On This Product, Go to: www.freescale.com 1-1 Freescale Semiconductor, Inc. GENERAL INFORMATION 1.2 SPECIFICATIONS Table 1-1 lists MPB specifications. Table 1-1. MPB Specifications Freescale Semiconductor, Inc... Characteristic Specifications On-Board Clock Case style: 14 or 8-pin hybrid crystal clock oscillator (frequency as required by MCU). External Clock dc – 20.97 MHz (or maximum MCU allows). MCU I/O ports HCMOS compatible Temperature Operating Storage 0° to +40° C -40° to +85° C Relative humidity 0 to 90% (non-condensing) Power requirements +5 Vdc ± 5% @ 500 mA (max.) Dimensions MCU Personality Board 3.25 x 3.25 in. (82.6 x 82.6 mm) 1.3 EQUIPMENT REQUIRED The external requirements for MPB operation are either an MEVB or MMDS system. MMDS operation requirements are described in the M68MMDS1632 Motorola Modular Development System User’s Manual, M68MMDS1632/D. Operation requirements for the MEVB are described in this manual and the M68MPFB1632 Modular Platform Board User’s Manual, M68MPFB1632/D. 1-2 For More Information On This Product, Go to: www.freescale.com M68MPB16Y3UM/D Freescale Semiconductor, Inc. GENERAL INFORMATION 1.4 CUSTOMER SUPPORT For information about a Motorola distributor or sales office near you call: Freescale Semiconductor, Inc... AUSTRALIA, Melbourne – (61-3)887-0711 Sydney – 61(2)906-3855 BRAZIL, Sao Paulo – 55(11)815-4200 CANADA, B. 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Freescale Semiconductor, Inc... GENERAL INFORMATION 1-4 For More Information On This Product, Go to: www.freescale.com M68MPB16Y3UM/D Freescale Semiconductor, Inc. HARDWARE PREPARATION AND INSTALLATION CHAPTER 2 HARDWARE PREPARATION AND INSTALLATION Freescale Semiconductor, Inc... 2.1 INTRODUCTION This chapter provides unpacking instructions, hardware preparation information, and installation instructions for the MPB. When you unpack the MPB from its shipping carton, verify that all items are in good condition. Save packing material for storing and shipping the MPB. NOTE Should the MPB arrive damaged, save all packing material, and contact the carrier’s agent. 2.2 HARDWARE PREPARATION This portion of the manual explains how to prepare the MPB before use, as well as how to configure the MPB for system operation. MPB installation in the MMDS and MEVB are also described. The MPB has been factory tested and is shipped with installed jumpers. A jumper installed on a jumper header provides a connection between two points in the MPB circuit. There are two types of jumper headers on the MPB: three-pin and two-pin with a cut-trace short. A cut-trace short has a copper trace between the feed-through holes (bottom or solder side of the MPB). Table 2-1 describes each type of jumper header. There are five jumper headers on the MPB (Table 2-2 is a quick reference guide for the jumper headers). These jumper headers may be re-configured to customize MPB functionality. The following paragraphs are a detailed description of each jumper header function. There is also an insertion point (E1) for connecting an external ground. Figure 2-1 shows the location of the MPB jumper headers and the insertion point. NOTE Verify that all socketed parts are seated in their sockets. M68MPB16Y3UM/D For More Information On This Product, Go to: www.freescale.com 2-1 Freescale Semiconductor, Inc. HARDWARE PREPARATION AND INSTALLATION CAUTION Depending on the application, it may be necessary to cut the wiring trace short (cut-trace short) on W2. Be careful not to cut adjacent PCB wiring traces or too deep on the multi-layer circuit board. NOTE Freescale Semiconductor, Inc... If the cut-trace short on a jumper header is cut, a user-supplied fabricated jumper must be installed on the jumper header to return the MPB to its default setting. Figure 2-1. MPB Jumper Headers and Insertion Point Location Diagram (top view) 2-2 For More Information On This Product, Go to: www.freescale.com M68MPB16Y3UM/D Freescale Semiconductor, Inc. HARDWARE PREPARATION AND INSTALLATION Table 2-1. Jumper Header Types Freescale Semiconductor, Inc... Jumper Header Type Symbol Description two-pin with cut-trace short Two-pin jumper header with cut-trace short, designated as WX (X = the jumper header number). After removing the cut-trace short, use a fabricated jumper to return the jumper header to its factory default state. three-pin Three-pin jumper header, designated as WX (X = the jumper header number). Use a fabricated jumper to create a short between two of the three pins of the jumper header. Table 2-2. MPB Jumper Header Descriptions Jumper Header W1 W2 Type Description 1 2 3 Jumper between pins 1 and 2 (factory default); selects the MPB on-board crystal clock source. 1 2 Jumper installed or cut-trace short intact (factory default); selects the on-board VDDA power source. Jumper between pins 2 and 3; selects an external clock source as the MCU EXTAL input signal. No jumper or cut-trace short; use an external power source by connecting an external power source to W2 pin 2. NOTE Jumper header W2 is not populated by the factory. W3 W4 W5 W6 1 2 3 Jumper installed on pins 1 and 2 (factory default); selects the MPB on-board VRH power source. 1 2 3 Jumper installed on pins 1 and 2 (factory default); selects the MPB on-board VRL power source. 1 2 3 Jumper installed on pins 1 and 2 (factory default); selects the MCU-internal phase-lock-loop frequency synthesizer as the system clock. 1 2 3 Jumper installed on pins 1 and 2 (factory default); selects an MC68HC916Y3 MCU as the MCU type for this MPB. M68MPB16Y3UM/D Jumper installed on pins 2 and 3; selects external VRH power source. Jumper installed on pins 2 and 3; selects external VRL power source. Jumper installed on pins 2 and 3; selects the EXTAL input as the system clock. The MCU-internal phase-lock-loop frequency synthesizer is disabled. Jumper installed on pins 2 and 3; selects an MC68HC16Y3 MCU as the MCU type for this MPB. For More Information On This Product, Go to: www.freescale.com 2-3 Freescale Semiconductor, Inc. HARDWARE PREPARATION AND INSTALLATION 2.2.1 Clock Select Header (W1) Freescale Semiconductor, Inc... Jumper header W1 connects the MCU external clock (EXTAL) pin to either an on-board or external (target system) clock source. The drawing below shows the factory configuration: fabricated jumper on pins 1 and 2. This configuration selects the MPB on-board clock source; crystal oscillator in socket at located Y1. (This crystal provides for operation at the maximum rate the MCU allows via the internal phase-locked loop or direct clock input.) When the MPB is installed in the active probe or directly on a target system and the target system clock is used as the MPB clock, move the fabricated jumper to W1 pins 2 and 3. This connects the MCU EXTAL pin to the MAPI bus input pin. The frequency of the external clock signal can be from dc to 20.97 MHz (or to the maximum the MCU allows). W1 1 2 3 NOTE You can not drive the MPB clock circuit from an external source (target system) with a discrete crystal. If a target system clock source is used to drive the MPB clock circuit, always use a logic driven clock such as a hybrid oscillator. 2-4 For More Information On This Product, Go to: www.freescale.com M68MPB16Y3UM/D Freescale Semiconductor, Inc. HARDWARE PREPARATION AND INSTALLATION Freescale Semiconductor, Inc... 2.2.2 VDDA Select Header (W2) Jumper header W2 selects the MPB VDDA power source; either MPB power (VDDI) or an external source. The drawing below shows the factory configuration: cut-trace short on pins 1 and 2. This configuration connects filtered VDDI to VDDA. To use an external power source, remove the cut-trace short from W2 pins 1 and 2. Then connect the external power source to W2 pin 2. Removal of the cut-trace short isolates the MCU VDDA pin from the other MPB circuitry. Isolation lets you connect a precision VDDA source for accurate 10-bit analog/digital (A/D) generation. When connecting an external VDDA power supply to the MPB connect the power supply ground to insertion point E1. For more information on A/D generation refer to the Analog-To-Digital Converter Reference Manual, ADCRM/AD. W2 1 2 NOTES If the cut-trace short has been cut, a fabricated jumper must be installed on W2 to return it to the factory configuration. Jumper header W2 is not populated by the factory. M68MPB16Y3UM/D For More Information On This Product, Go to: www.freescale.com 2-5 Freescale Semiconductor, Inc. HARDWARE PREPARATION AND INSTALLATION 2.2.3 Voltage Reference High Select Header (W3) Freescale Semiconductor, Inc... Jumper header W3 selects the voltage reference high (VRH) source; either MPB power (VDDA) or an external VRH source. The drawing below shows the factory configuration: fabricated jumper on pins 1 and 2. This configuration selects VDDA as the VRH source. To use an external VRH source, first place the fabricated jumper on W3 pins 2 and 3. Then connect the MCU VRH pin to the external VRH source. Each configuration defines which method is best when connecting the MCU VRH pin to the external VRH source: • •MPB/MPFB – connect via the MPFB logic analyzer connector (refer to Chapter 4 for the appropriate logic analyzer pin) • •MPB/MMDS1632 – connect via the VRH pin of the target MCU socket • •MPB/Target System – connect via the VRH pin of the target system MAPI bus Alternately, you may remove the jumper and wire-wrap directly to W3 pin 2. Connecting directly to pin 2 is an option regardless of the configuration. W3 1 2 3 2-6 For More Information On This Product, Go to: www.freescale.com M68MPB16Y3UM/D Freescale Semiconductor, Inc. HARDWARE PREPARATION AND INSTALLATION 2.2.4 Voltage Reference Low Select Header (W4) Freescale Semiconductor, Inc... Jumper header W4 selects the voltage reference low (VRL) source; either MPB power (VSSA) or an external VRL source. The drawing below shows the factory configuration: fabricated jumper on pins 1 and 2. This configuration selects VSSA as the VRL source. To use an external VRL source, first place the fabricated jumper on W4 pins 2 and 3. Then connect the MCU VRL pin to the external VRL source. Each configuration defines which method is best when connecting the MCU VRL pin to the external VRL source: • •MPB/MPFB – connect via the MPFB logic analyzer connector (refer to Chapter 4 for the appropriate logic analyzer pin) • •MPB/MMDS1632 – connect via the VRL pin of the target MCU socket • •MPB/Target System – connect via the VRL pin of the target system MAPI bus Alternately, you may remove the jumper and wire-wrap directly to W4 pin 2. Connecting directly to pin 2 is an option regardless of the configuration. W4 1 2 3 M68MPB16Y3UM/D For More Information On This Product, Go to: www.freescale.com 2-7 Freescale Semiconductor, Inc. HARDWARE PREPARATION AND INSTALLATION 2.2.5 MCU Clock Source Select Header (W5) Freescale Semiconductor, Inc... Jumper header W5 selects the MCU clock; either the MCU-internal phase-lockloop frequency synthesizer or the EXTAL input. The drawing below shows the factory configuration: fabricated jumper on pins 1 and 2. This configuration selects the MCU-internal phase-lock-loop frequency synthesizer as the clock. To use the EXTAL input as the clock, place the fabricated jumper on 2 and 3. W5 1 2 3 NOTE J14 pin-4 and W16 on the MPFB are marked MODCLK, but this signal, when using an M68HC916Y3, is FASTREF. The M68HC916Y3 MEVB overlay is correct and marked FASTREF. Use W16 on the MPFB to select the MCU PLL clock input speed. 2-8 For More Information On This Product, Go to: www.freescale.com M68MPB16Y3UM/D Freescale Semiconductor, Inc. HARDWARE PREPARATION AND INSTALLATION 2.2.6 Using a 32 KHz Clock Freescale Semiconductor, Inc... The factory installed crystal oscillator in location Y1 is rated at 4.194 megahertz. You may change Y1 to change the clock speed of the MPB. The only other oscillator you may install is 32 kilohertz. If you change Y1 to the slower value (32 KHz) you must replace the following capacitors and resistor (see diagram below): C60 – 1 µf C56 – 1 µf R52 – 18 kΩ VDDSYN M68MPB16Y3UM/D For More Information On This Product, Go to: www.freescale.com 2-9 Freescale Semiconductor, Inc. HARDWARE PREPARATION AND INSTALLATION 2.2.7 MCU ID Code Select Header (W6) Freescale Semiconductor, Inc... Jumper header W6 selects the MCU ID code; either the M68HC16Y3 MCU or M68HC916Y3 MCU. The drawing below shows the factory configuration: fabricated jumper on pins 1 and 2. Use this configuration when an M68HC16Y3 MCU is installed on the MPB. To use the MPB with an M68HC916Y3 MCU installed, place the fabricated jumper on 2 and 3. W6 1 2 3 NOTE These jumper settings only apply to when using the M68HC916Y3 MPB in an MMDS1632. 2.2.8 VSSA Insertion Point (E1) Insertion point E1 is a plate through hole that lets you connect an external ground to the MPB VSSA pin (refer to paragraph 2.2.2). Insert an external ground wire in E1 and solder it into the plate through hole. NOTE Insertion point E1 is not populated by the factory. 2-10 For More Information On This Product, Go to: www.freescale.com M68MPB16Y3UM/D Freescale Semiconductor, Inc. HARDWARE PREPARATION AND INSTALLATION 2.3 MEVB CONFIGURATION The MEVB contains: Freescale Semiconductor, Inc... • MPB – MCU-device-specific board that defines the MCU to be evaluated. • M68MPFB1632 Modular Platform Board (MPFB) – which provides the interface connections to the host computer, logic analyzer connections, and the platform for installing the MPB. For more information about the MPFB and MEVB system connections refer to the M68MPFB1632 Modular Platform Board User's Manual, M68MPFB1632/D. Chapter 3 of this manual contains information to help you get started using your MEVB. CAUTION Turn OFF MPFB power when installing the MPB on the MPFB or removing the MPB from the MPFB. Sudden power surges could damage MEVB integrated circuits. To install the MPB on the MPFB (refer to Figure 2-2): 1. Inspect all connectors for bent or damaged pins. 2. Align the MPB reference mark with the MPFB reference mark. 3. Rotate the MPB until the four MAPI bus connectors on its bottom mate with the MAPI bus connectors on the top of the MPFB. (There is only one way to connect the MPB and the MPFB.) 4. Firmly press the MPB onto the MPFB. CAUTION Support the bottom side of MPFB when installing the MPB on the MPFB. Excessive flexing of the MPFB could damage the printed circuit. M68MPB16Y3UM/D For More Information On This Product, Go to: www.freescale.com 2-11 Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... HARDWARE PREPARATION AND INSTALLATION Figure 2-2. MPB – MPFB Interconnection (with SDI interface connector) After you have installed the MPB, install the plastic overlay on the MPFB: place the overlay over logic analyzer connectors J12 through J20 and press down. Holes in the overlay slide down over plastic clips on the MPFB. These clips hold the overlay in place. 2-12 For More Information On This Product, Go to: www.freescale.com M68MPB16Y3UM/D Freescale Semiconductor, Inc. HARDWARE PREPARATION AND INSTALLATION 2.4 MPB – MMDS INSTALLATION Freescale Semiconductor, Inc... The M68MMDS1632 Motorola Modular Development System (MMDS) consists of the station module and an active probe. The active probe consists of a three board set, two cables, and a box: • MPB – MCU-device-specific board that defines the MCU to be evaluated. • Enhanced Target Control Board (TCB) – the interface between the MPB, target system, and the station module. The TCB must be purchased separately. For more information about the TCB refer to the MMDS1632 Motorola Modular Development System User's Manual, MMDS1632UM/D. • Package Personality Board (PPB) – the board that connects the active probe to the target system. The PPB must be purchased separately. For more information about the PPB refer to the appropriate PPB configuration guide. • Active probe cables (2) – the interface between the active probe and the station module. 01-RE90340W01 REV 0 and 01-RE90341W01 REV 0 are printed on the active probe cables. The active probe cables come with the TCB. For more information about the active probe cables refer to the MMDS1632 Motorola Modular Development System User's Manual, MMDS1632UM/D. • Active probe box – the protective enclosure for the TCB. CAUTION Turn off MMDS and target system power when installing or removing MMDS components. Sudden power surges could damage MMDS and target system integrated circuits. To configure an active probe (refer to Figure 2-3): 1. Inspect all connectors for bent or damaged pins. 2. Rotate the MPB until the four MAPI bus connectors on its bottom mate with the MAPI bus connectors on the top of the TCB. (There is only one way to connect the MPB and the TCB.) Firmly press the MPB and the TCB together. 3. Rotate the PPB until the four MAPI bus connectors on its top mate with the MAPI bus connectors on the bottom of the TCB. (There is only one way to connect the PPB and the TCB.) Firmly press the PPB and the TCB together. M68MPB16Y3UM/D For More Information On This Product, Go to: www.freescale.com 2-13 Freescale Semiconductor, Inc. HARDWARE PREPARATION AND INSTALLATION 4. Connect one end of the 01-RE90341W01 REV 0 active probe cable to connector P6 on the MMDS control board; connect the other end to connector J6 on the TCB. Connect one end of the 01-RE90340W01 REV 0 active probe cable to connector P5 on the MMDS control board; connect the other end to connector J5 on the TCB. Secure the connector clamps on TCB connectors J5 and J6. Freescale Semiconductor, Inc... The active probe is now ready to connect to the target system (refer to the PPB configuration guide for information on connecting the active probe to the target system.) Figure 2-3. Active Probe Interconnection (with Active Probe Box) 2-14 For More Information On This Product, Go to: www.freescale.com M68MPB16Y3UM/D Freescale Semiconductor, Inc. MEVB QUICK START GUIDE CHAPTER 3 MEVB QUICK START GUIDE Freescale Semiconductor, Inc... 3.1 INTRODUCTION This quick start guide is intended for the user who may not be familiar with Motorola’s development tools. This chapter explains the MEVB hardware and software set-up for M68MEVB916Y3 operation. Hardware set-up consists of configuring the MPB and MPFB jumper headers. While software set-up consists of installing and running the appropriate macro script file within the debugger. For the purpose of this quick start guide the MPB jumper headers should be configured in their default positions. Chapter 2 of this manual contains the default jumper header settings for the MPB. 3.2 CONFIGURING THE MPFB The MPFB includes jumper-selectable options such as chip select usage, memory type selection and memory size selection for the pseudo ROM sockets, and reset data control. 3.2.1 MPFB Memory Devices Pseudo ROM refers to memory locations U2 & U4. The two pseudo ROM sockets provide a generic memory socket, and accepts a variety of RAM, EPROM, or EEPROM devices. The pseudo ROM sockets, as shipped from the factory, contain two 32K x 8 RAM devices. These memory are 28-pin package devices. M68MPB16Y3UM/D For More Information On This Product, Go to: www.freescale.com 3-1 Freescale Semiconductor, Inc. MEVB QUICK START GUIDE 3.2.2 MPFB Jumper Headers Configure your MPFB jumper headers per the instructions in Table 3-1. Table 3-1 contains information exclusively intended for quick start and ignores the other jumper headers. Freescale Semiconductor, Inc... Table 3-1. MPFB Quick Start Jumper Header Configuration Jumper Header Type Description W2 123 Install a jumper on pins 1 and 2 to configure pin 1 of the memory devices in the pseudo ROM sockets (U2 & U4) as a standard address line. W3 123 Install a jumper on pins 1 and 2 to indicate that the memory devices in the pseudo ROM sockets (U2 & U4) have 28-pins. W4 123 Install a jumper on pins 1 and 2 to set the pseudo ROM port size (memory data width) as word. W5 123 Install a jumper on pins 2 and 3 to enable the PRU. W6 123 W6 selects the MCU operation mode. Each 3-pin jumper header set corresponds to an MCU data line. While the reset pin is low, the reset data values are driven on the data bus (D0 – D15). (The MEVB reset data circuit is open drain; a high state is provided via a pull-up resistor.) Each reset data line may be set high (H) or low (L). Consult the appropriate MCU user's manual, data book, or technical summary for reset data information. W10 1 3 5 2 4 6 Install a jumper on pins 1 and 2 to indicate that RAM is installed in the pseudo ROM sockets (U2 & U4). W12 1 3 5 7 9 2 4 6 8 10 Install a jumper on pins 3 and 4 to indicate that the two devices installed in the pseudo ROM sockets (U2 & U4) are 32K x 8. 3-2 For More Information On This Product, Go to: www.freescale.com M68MPB16Y3UM/D Freescale Semiconductor, Inc. MEVB QUICK START GUIDE Freescale Semiconductor, Inc... Table 3-1. MPFB Quick Start Jumper Header Configuration (continued) Jumper Header Type Description W14 123 Jumper header W14 selects the MCU signal for the memory devices in the fast RAM sockets (U9 & U10) and pseudo ROM sockets (U2 & U4). Pins 1 and 2 select the MCU chip select for the memory devices in the fast RAM sockets. While pins 2 and 3 of jumper header W14 select the chip select for the memory devices in the pseudo ROM sockets. Jumper installed on CSBOOT pins 2 and 3 (factory default); use CSBOOT as the memory device chip enable for memory devices in the pseudo ROM sockets. W16 12 No jumper installed; the MCU FASTREF signal is pulled high (logic 1) via a resistor during reset. NOTE J14 pin-4 and W16 on the MPFB are marked MODCLK, but this signal, when using an M68HC16Y3, is FASTREF. The M68HC16Y3 MEVB overlay is correct and marked FASTREF. Use W16 on the MPFB to select the MCU PLL clock input speed. W17 12 W18 123 Install a jumper on pins 1 and 2 for unrestricted writes to the memory devices in the pseudo ROM sockets (U2 & U4). W19 123 Install a jumper on pins 1 and 2 to ground the A19 signal to the MPFB memory arrays. W22 123 Install a jumper on pins 2 and 3 to select the evaluation MCU (on the MPB) as an M68HC16 MCU device. No jumper installed; the BERR signal is pulled high (logic 1) via a resistor during reset. 3.3 MEVB INSTALLATION INSTRUCTIONS MEVB installation requires a user-supplied power supply and host computer. The host computer must have a parallel port and must run MS-DOS, as required by ICD16. The following paragraphs explain MPFB connections. Refer to Chapter 2 for instructions to interconnect the MPB and MPFB. M68MPB16Y3UM/D For More Information On This Product, Go to: www.freescale.com 3-3 Freescale Semiconductor, Inc. MEVB QUICK START GUIDE 3.3.1 Power Supply – MPFB Connection Freescale Semiconductor, Inc... Use MPFB connector J5 to connect a user-supplied power supply to the MEVB. Contact 1 is ground; black lever. Contact 2 is VDD (+5 volts); red lever. Use 20 or 22 AWG wire for power connections. For each wire, trim back the insulation 1/4 in. (.635 cm), lift the appropriate lever of J5 to release tension on the contacts, then insert the bare wire into J5 and close the lever. The MEVB requires a +5Vdc @ 1.0 amp power supply for operation. A 1.5 amp fuse is installed on the MPFB +5Vdc power supply input line. BLK RED GND J5 +5V CAUTIONS Do not use wire larger than 20 AWG in connector J5. Such wire could damage the connector. Turn off MEVB power when installing or removing the MPB from the MPFB. Sudden power surges could damage MEVB integrated circuits. 3-4 For More Information On This Product, Go to: www.freescale.com M68MPB16Y3UM/D Freescale Semiconductor, Inc. MEVB QUICK START GUIDE 3.3.2 Personal Computer – BDM Connection Freescale Semiconductor, Inc... Personal computer communication with the MEVB requires background debug mode (BDM) hardware. Connect your BDM hardware between your computer’s I/O port and the BDM header on the MPFB (MPFB connector J6). The drawing below shows signal assignments for connector J6. For additional information about your BDM software/hardware, including debugging and assembly information, see the appropriate user's manual. J6 DS 1 GND 3 GND 5 RESET 7 +5 Vdc 9 • • • • • • • • • • 2 BERR* 4 BKPT* 6 FREEZE 8 DSI 10 DSO 3.4 SOFTWARE INSTALLATION After you have set up the MEVB hardware you must install the software on your computer. Follow the installation procedure in the appropriate software operations manual. The MCU must be initialized before the MEVB will function. The following is one possible initialization for the MPB16Y3. You may adapt this example to your debugger. This initialization enables the maximum system clock frequency and disables the software watchdog while enabling the bus monitor. CSBOOT is set to zero-wait state and the block size set to 64K starting at $00000. The SRAM is enabled to reside at $10000 with the stack pointer initialized at $103FE and the instruction pointer (IP) initialized to $00200 (PK=0, IP=200). Load your program at address $00200. M68MPB16Y3UM/D For More Information On This Product, Go to: www.freescale.com 3-5 Freescale Semiconductor, Inc. MEVB QUICK START GUIDE Below is the MPBY3.ICD initialization macro program listing. Freescale Semiconductor, Inc... symbol SCIMCR FFA00 symbol SYNCR FFA04 symbol CSBARBT FFA48 symbol CSORBT FFA4A symbol START 00200 dmmw SCIMCR 40CF dmmw SYNCR B000 watchdog dmmw CSBARBT 0003 dmmw CSORBT 7830 mdf6 START pk=0 a=AA b=BB e=0000 ix=0000 iy=0000 iz=0000 hr=0000 ir=0000 k=0000 sp=03fe sk=1 symbol RAMBAH FFB04 symbol RAMMCR FFB00 dmmw RAMBAH 0001 dmmb RAMMCR 00 dmml 10000 4D6F746F dmml 10004 726F6C61 dmml 10008 20363848 dmml 1000C 43313620 dmml 10010 41647661 dmml 10014 6E636564 dmml 10018 20204D43 dmml 1001C 55732020 dmml 10020 36384843 mdf3 10000 ip=START 3-6 Set module mapping to $FFF000-$FFFFFF Set system clock frequency to 16.78 MHz Disable the watcdog timer Change CSBOOT block size to 64K Change wait state to zero Display program in PMM window Initialize CPU registers Initialize the stack pointer Set SRAM base address Enable SRAM array Check SRAM: write Motorola 68HC16 advanced MCUs Display SRAM in DMM window Start entering your program here For More Information On This Product, Go to: www.freescale.com M68MPB16Y3UM/D Freescale Semiconductor, Inc. MEVB SUPPORT INFORMATION CHAPTER 4 MEVB SUPPORT INFORMATION Freescale Semiconductor, Inc... 4.1 INTRODUCTION The information in this chapter is relevant when the MPB is used in an MEVB (the MPB installed on a MPFB). Signals on the MPFB logic analyzer connectors are defined by the MPB type. The tables of this chapter describe MPFB logic analyzer connector signals when an M68MPB9916Y3 is installed on the MPFB. The signal descriptions on J12 – J20 are the logic analyzer pin-outs on the plastic overlay supplied with the MPB. NOTE The signal descriptions in the following tables are for quick reference only. The MC68HC916Y3 User's Manual, MC68HC916Y3UM/AD, contains a complete description of the MC68HC916Y3 MCU signals. Also contained in this chapter are MAPI bus interface layout and pin assignments information for MPB connectors P1, P2, P3, and P4. Tables 4-1 through 4-14 list pin assignments for MPFB connectors J7 through J20. Table 4-1. Logic analyzer connector J7 Table 4-8. Logic analyzer connector J14 Table 4-2. Logic analyzer connector J8 Table 4-9. Logic analyzer connector J15 Table 4-3. Logic analyzer connector J9 Table 4-10. Logic analyzer connector J16 Table 4-4. Logic analyzer connector J10 Table 4-11. Logic analyzer connector J17 Table 4-5. Logic analyzer connector J11 Table 4-12. Logic analyzer connector J18 Table 4-6. Logic analyzer connector J12 Table 4-13. Logic analyzer connector J19 Table 4-7. Logic analyzer connector J13 Table 4-14. Logic analyzer connector J20 M68MPB16Y3UM/D For More Information On This Product, Go to: www.freescale.com 4-1 Freescale Semiconductor, Inc. MEVB SUPPORT INFORMATION Freescale Semiconductor, Inc... Table 4-1. Logic Analyzer Connector J7 Pin Assignments Pin Mnemonic Signal 1, 2 SPARE No connection 3 OE(ALL) I/O PRU OUTPUT ENABLE – Input, active high; when low disables all PRU outputs. 4 – 11 PEPAR7 – PEPAR0 PEPAR OUTPUTS – Output signals that show the complement (negated contents) of the PEPAR register. 12 – 19 PE7 – PE0 PORT E I/O SIGNALS – PRU replacement of the Port E function. 20 GND GROUND Table 4-2. Logic Analyzer Connector J8 Pin Assignments 4-2 Pin Mnemonic Signal 1, 2 SPARE 3 OE(ABG) I/O PRU OUTPUT ENABLE – Input, active high; when low disables port A, port B, and port G outputs. 4 – 11 PA7 – PA0 PORT A I/O SIGNALS – PRU replacement of the Port A function. 12 – 19 PB7 – PB0 PORT B I/O SIGNALS – PRU replacement of the Port B function. 20 GND No connection GROUND For More Information On This Product, Go to: www.freescale.com M68MPB16Y3UM/D Freescale Semiconductor, Inc. MEVB SUPPORT INFORMATION Freescale Semiconductor, Inc... Table 4-3. Logic Analyzer Connector J9 Pin Assignments Pin Mnemonic Signal 1, 2 SPARE No connection 3 OE(H) I/O PRU OUTPUT ENABLE – Input, active high; when low disables the port H outputs. 4 – 11 PH7 – PH0 PORT H I/O SIGNALS – PRU replacement of the Port H function. 12 – 19 PG7 – PG0 PORT G I/O SIGNALS – PRU replacement of the Port G function. 20 GND GROUND Table 4-4. Logic Analyzer Connector J10 Pin Assignments Pin Mnemonic Signal 1 +5V +5 VDC POWER – Input voltage (+5 Vdc @ 1.0 A) used by the MEVB logic circuits. (To make this pin no connection, remove the jumper from header on the MPFB.) 2 SPARE 3 AS 4 – 19 A15 – A0 20 GND M68MPB16Y3UM/D No connection ADDRESS STROBE – Active-low output signal that indicates whether a valid address is on the address bus. ADDRESS BUS BITS 15 – 0 – Sixteen bits of the 24-bit address bus. GROUND For More Information On This Product, Go to: www.freescale.com 4-3 Freescale Semiconductor, Inc. MEVB SUPPORT INFORMATION Freescale Semiconductor, Inc... Table 4-5. Logic Analyzer Connector J11 Pin Assignments Pin Mnemonic Signal 1 +5V +5 VDC POWER – Input voltage (+5 Vdc @ 1.0 A) used by the MEVB logic circuits. (To make this pin no connection, remove the jumper from header on the MPFB.) 2 SPARE 3 DS DATA STROBE – Active-low output signal. During a read cycle, indicates that an external device should place valid data on the data bus. During a write cycle, indicates that valid data is on the data bus. 4 – 19 D15 – D0 DATA BUS 15 – 0 – 16 bits of the MCU bi-directional data bus lines. 20 GND No connection GROUND Table 4-6. Logic Analyzer Connector J12 Pin Assignments Pin Mnemonic 1, 2 SPARE 3 CLKOUT 4 BERR BUS ERROR – Active-low signal that indicates that a memory access error has occurred. 5 BKPT / BREAKPOINT – Active-low input signal that signals a hardware breakpoint to the CPU. DSCLK Development Serial Clock – Clock input signal for the background debug mode. FREEZE FREEZE – Output signal that indicates the CPU has acknowledged a breakpoint. 6 QUOT 7 4-4 LAT-DSO / (Latched IPIPE0) Signal No connection SYSTEM CLOCK OUT – Output signal that is the MCU internal system clock. QUOTIENT OUT – Output signal that furnishes the quotient bit of the polynomial divider for test purposes. LATCHED INSTRUCTION PIPE 0 – Latched output signal of the first state of IPIPE0 for CPU16-based MCUs; indicates instruction pipeline activity. For More Information On This Product, Go to: www.freescale.com M68MPB16Y3UM/D Freescale Semiconductor, Inc. MEVB SUPPORT INFORMATION Table 4-6. Logic Analyzer Connector J12 Pin Assignments (continued) Pin 8 Freescale Semiconductor, Inc... 9 Mnemonic LAT-DSI LATCHED INSTRUCTION PIPE 1 – Latched output (Latched IPIPE1) signal of the first state of IPIPE1 for CPU16-based MCUs; indicates instruction pipeline activity. DSO / (IPIPE0) 10 Signal DSI / DEVELOPMENT SERIAL OUT – Serial data output signal for background debug mode. INSTRUCTION PIPE 0 for CPU16-based MCUs. DEVELOPMENT SERIAL IN – Serial data input signal for background debug mode. (IPIPE1) INSTRUCTION PIPE 1 for CPU16-based MCUs. 11 DSACK1 DATA AND SIZE ACKNOWLEDGE 1 – Active-low input signal that allows asynchronous data transfers and dynamic bus sizing between the MCU and external devices. 12 DSACK0 DATA AND SIZE ACKNOWLEDGE 0 – Active-low input signal that allows asynchronous data transfers and dynamic bus sizing between the MCU and external devices. 13 FC2 / FUNCTION CODE 2 – Output signal that identifies the processor state and address space of the current bus cycle. CS5 CHIP SELECT 5 – Output signal that selects peripheral or memory devices at programmed addresses. 14 FC1 FUNCTION CODE 1 – Output signal that identifies the processor state and address space of the current bus cycle. 15 FC0 / FUNCTION CODE 0 – Output signal that identifies the processor state and address space of the current bus cycle. CS3 CHIP SELECT 3 – Output signal that selects peripheral or memory devices at programmed addresses. 16 SIZ1 TRANSFER SIZE – Active-high output signals that Indicates the number of bytes to be transferred during a bus cycle. 17 SIZ0 TRANSFER SIZE 0 – Active-high output signals that Indicates the number of bytes to be transferred during a bus cycle. M68MPB16Y3UM/D For More Information On This Product, Go to: www.freescale.com 4-5 Freescale Semiconductor, Inc. MEVB SUPPORT INFORMATION Freescale Semiconductor, Inc... Table 4-6. Logic Analyzer Connector J12 Pin Assignments (continued) Pin Mnemonic Signal 18 R/W READ/WRITE – Active-high output signal that indicates the direction of data transfer on the bus. 19 BGACK / 20 BUS GRANT ACKNOWLEDGE – Active-low input signal that indicates that an external device has assumed bus mastership. CSE EMULATOR CHIP SELECT – Output signal that selects external emulation devices at internally-mapped addresses. CSE is used to emulate I/O ports. GND GROUND Table 4-7. Logic Analyzer Connector J13 Pin Assignments 4-6 Pin Mnemonic Signal 1 +5V +5 VDC POWER – Input voltage (+5 Vdc @ 1.0 A) used by the MEVB logic circuits. (To make this pin no connection, remove the jumper from header on the MPFB.) 2 SPARE 3 DSACK1 DATA AND SIZE ACKNOWLEDGE 1 – Active-low input signal that allows asynchronous data transfers and dynamic bus sizing between the MCU and external devices. 4 PULL-UP Not connected; pulled high through a resistor on the MPB. 5 HALT 6 AS ADDRESS STROBE – Active-low output signal that indicates that a valid address is on the address bus. 7 DS DATA STROBE – Active-low output signal. During a read cycle, indicates that an external device should place valid data on the data bus. During a write cycle, indicates that valid data is on the data bus. No connection HALT – Active-low input/output signal that suspends external bus activity, to request a retry when used with BERR, or for single-step operation. For More Information On This Product, Go to: www.freescale.com M68MPB16Y3UM/D Freescale Semiconductor, Inc. MEVB SUPPORT INFORMATION Table 4-7. Logic Analyzer Connector J13 Pin Assignments (continued) Pin Mnemonic Signal 8 BR / BUS REQUEST – Active-low input signal that indicates that an external device requires bus mastership. CS0 CHIP SELECT 0 – Output signal that selects peripheral or memory devices at programmed addresses. BG / BUS GRANT – Active-low output signal that indicates that the MCU has relinquished the bus. CSM INTERNAL MODULE CHIP SELECT – Active-low output signal that selects external emulation devices at internally-mapped addresses. CSM is used to emulate memory. Freescale Semiconductor, Inc... 9 10 CSBOOT BOOT CHIP SELECT – An active-low output chip select for external boot startup ROM 11 CLKOUT SYSTEM CLOCK OUTPUT – MCU internal clock output signal. 12 A23 / ADDRESS BUS BIT 23 – One bit of the 24-bit address bus. CS10 CHIP SELECT 10 – Output signal that selects peripheral or memory devices at programmed addresses. A22 / ADDRESS BUS BIT 22 – One bit of the 24-bit address bus. CS9 CHIP SELECT 9 – Output signal that selects peripheral or memory devices at programmed addresses. A21 / ADDRESS BUS BIT 21 – One bit of the 24-bit address bus. CS8 CHIP SELECT 8 – Output signal that selects peripheral or memory devices at programmed addresses. A20 / ADDRESS BUS BIT 20 – One bit of the 24-bit address bus. CS7 CHIP SELECT 7 – Output signal that selects peripheral or memory devices at programmed addresses. A19 / ADDRESS BUS BIT 19 – One bit of the 24-bit address bus. CS6 CHIP SELECT 6 – Output signal that selects peripheral or memory devices at programmed addresses. 13 14 15 16 17 – 19 A18 – A16 20 GND M68MPB16Y3UM/D ADDRESS BUS 18 – 16 – Three bits of the 24-bit address bus. GROUND For More Information On This Product, Go to: www.freescale.com 4-7 Freescale Semiconductor, Inc. MEVB SUPPORT INFORMATION Freescale Semiconductor, Inc... Table 4-8. Logic Analyzer Connector J14 Pin Assignments 4-8 Pin Mnemonic Signal 1, 2 SPARE 3 DSACK0 DATA AND SIZE ACKNOWLEDGE 0 – Active-low input signal that allows asynchronous data transfers and dynamic bus sizing between the MCU and external devices. 4 FASTREF FASTREF – Selection of crystal or clock input frequency driven into the VCO for generation of the MCU system clock. 1=fast reference, 0=slow reference 5 TSC THREE STATE CONTROL – When TSC is logic high, this input signal forces all output drivers to a highimpedance state. 6 RESET 7 PULL-UP 8 SPARE 9 – 15 IRQ1 – IRQ7 16 – 19 SPARE 20 GND No connection RESET – Active-low, bi-directional signal to start a system reset. Not connected; pulled high through a resistor on the MPB. No connection TARGET INTERRUPT REQUEST 1 – 7 - Active-low input signals from the target that asynchronously provides an interrupt priority level to the CPU. IRQ1 has the lowest priority, IRQ7 has the highest. No connection GROUND For More Information On This Product, Go to: www.freescale.com M68MPB16Y3UM/D Freescale Semiconductor, Inc. MEVB SUPPORT INFORMATION Freescale Semiconductor, Inc... Table 4-9. Logic Analyzer Connector J15 Pin Assignments Pin Mnemonic Signal 1–3 SPARE 4 – 13 GND GROUND 14 PCLK AUXILIARY TIMER CLOCK INPUT – External input clock source for the GPT. 15 PWMB PULSE WIDTH MODULATION B – Repetitive output signals whose high time to low time ratio can be controlled by the CPU. 16 PWMA PULSE WIDTH MODULATION A – Repetitive output signals whose high time to low time ratio can be controlled by the CPU. 17 PAI 18, 19 SPARE 20 GND No connection PULSE ACCUMULATOR INPUT – Input signal that increments an 8-bit counter. No connection GROUND Table 4-10. Logic Analyzer Connector J16 Pin Assignments Pin Mnemonic 1–4 SPARE 5 IC1 INPUT CAPTURE 1 – Input signal that latches the contents of the GPT timer counter (TCNT) into the input capture register TIC1 when a selected edge occurs at the pin. 6 IC2 INPUT CAPTURE 2 – Input signal that latches the contents of the GPT timer counter (TCNT) into the input capture register TIC2 when a selected edge occurs at the pin. 7 IC3 INPUT CAPTURE 3 – Input signal that latches the contents of the GPT timer counter (TCNT) into the input capture register TIC3 when a selected edge occurs at the pin. 8 OC1 OUTPUT COMPARE 1 – Output signal that is generated when the GPT timer counter (TCNT) and TOC1 comparator register contain the same value. M68MPB16Y3UM/D Signal No connection For More Information On This Product, Go to: www.freescale.com 4-9 Freescale Semiconductor, Inc. MEVB SUPPORT INFORMATION Freescale Semiconductor, Inc... Table 4-10. Logic Analyzer Connector J16 Pin Assignments (continued) Pin Mnemonic 9 OC2 OUTPUT COMPARE 2 – Output signal that is generated when the GPT timer counter (TCNT) and TOC2 comparator register contain the same value. 10 OC3 OUTPUT COMPARE 3 – Output signal that is generated when the GPT timer counter (TCNT) and TOC3 comparator register contain the same value. 11 OC4 OUTPUT COMPARE 4 – Output signal that is generated when the GPT timer counter (TCNT) and TOC4 comparator register contain the same value. 12 IC4 / INPUT CAPTURE 4 – Input signal that latches the contents of the GPT timer counter (TCNT) into the input capture register TIC4 when a selected edge occurs at the pin. OC5 OUTPUT COMPARE 5 – Output signal that is generated when the GPT timer counter (TCNT) and TOC5 comparator register contain the same value. 13 – 19 SPARE 20 GND Signal No connection GROUND Table 4-11. Logic Analyzer Connector J17 Pin Assignments 4-10 Pin Mnemonic Signal 1–4 SPARE 5 VSSA 6 – 11 AN5 – AN0 12 VRH VOLTAGE REFERENCE HIGH – Input reference supply voltage (high) line (must set jumper on the MPB). 13 VRL VOLTAGE REFERENCE LOW – Input reference supply voltage (low) line (must set jumper on the MPB). 14, 15 AN6, AN7 No connection A/D GROUND – A/D ground reference. ANALOG TO DIGITAL CONVERSION 5 -0 – Analog input lines to the MCU device. ANALOG TO DIGITAL CONVERSION 6 and 7 – Analog input lines to the MCU device. For More Information On This Product, Go to: www.freescale.com M68MPB16Y3UM/D Freescale Semiconductor, Inc. MEVB SUPPORT INFORMATION Freescale Semiconductor, Inc... Table 4-11. Logic Analyzer Connector J17 Pin Assignments (continued) Pin Mnemonic 16 VSSA 17 – 19 SPARE 20 VSSA Signal A/D GROUND – A/D ground reference. No connection A/D GROUND – A/D ground reference. Table 4-12. Logic Analyzer Connector J18 Pin Assignments Pin Mnemonic 1–4 SPARE No connection 5 PCS0 / PERIPHERAL CHIP SELECT 0 – Active-low output SPI peripheral chip select signal. SS Signal SLAVE SELECT – Bi-directional, active-low signal that initiates serial transmission when SPI is in slave mode; causes mode fault in master mode. 6 MOSI MASTER-IN, SLAVE-OUT – Serial input to SPI in master mode; serial output from SPI in slave mode. 7 MISO MASTER-OUT, SLAVE-IN – Serial output from SPI in master mode; serial input to SPI in slave mode. 8 SCK SPI SERIAL CLOCK – In master mode, the clock signal from the SPI; in slave mode the clock signal to the SPI. 9 TXDA TRANSMIT DATA A – Serial data output line to serial communication interface A. 10 RXDA RECEIVE DATA A – Serial data input line to serial communication interface A. 11 TXDB TRANSMIT DATA B– Serial data output line to serial communication interface B. 12 RXDB RECEIVE DATA B – Serial data input line to serial communication interface B. 13 – 16 TPU0 – TPU3 17 – 19 SPARE 20 GND M68MPB16Y3UM/D TIME PROCESSOR UNIT CHANNELS – TPU input/output channels. No connection GROUND For More Information On This Product, Go to: www.freescale.com 4-11 Freescale Semiconductor, Inc. MEVB SUPPORT INFORMATION Freescale Semiconductor, Inc... Table 4-13. Logic Analyzer Connector J19 Pin Assignments Pin Mnemonic 1–4 SPARE 5 – 12 TPU4 – TPU11 13 – 19 SPARE 20 GND Signal No connection TIME PROCESSOR UNIT CHANNELS – TPU input/output channels.. No connection GROUND Table 4-14. Logic Analyzer Connector J20 Pin Assignments 4-12 Pin Mnemonic Signal 1–4 SPARE 5–8 GND GROUND 9 PCS2 PERIPHERAL CHIP SELECT 2 – Active-low output SPI peripheral chip select signal. 10 PCS1 PERIPHERAL CHIP SELECT 1 – Active-low output SPI peripheral chip select signal. 11 – 13 GND GROUND 14 T2CLK 15 – 18 TPU15 – TPU12 19 SPARE 20 GND No connection TPU CLOCK – External input clock source to the TPU. TIME PROCESSOR UNIT CHANNELS – TPU input/output channels. No connection GROUND For More Information On This Product, Go to: www.freescale.com M68MPB16Y3UM/D Freescale Semiconductor, Inc. MAPI SUPPORT INFORMATION CHAPTER 5 MAPI SUPPORT INFORMATION Freescale Semiconductor, Inc... 5.1 INTRODUCTION The information in this chapter is relevant when the MPB is to be installed on a target system. The figures in this chapter show the MAPI interface connector layout and pin assignments for MPB connectors P1, P2, P3, and P4. The connectors required to interface to the MAPI bus are: 2 Robinson Nugent 2 X30 plugs P50L-060P-AS-TGF 2 Robinson Nugent 2 X40 plugs P50L-080P-AS-TGF CL 1 1 1 2.500 CL 1.250 CL 1 CL CL CL 1.250 2.500 Figure 5-1. MAPI Interface Connector Layout M68MPB16Y3UM/D For More Information On This Product, Go to: www.freescale.com 5-1 Freescale Semiconductor, Inc. MAPI SUPPORT INFORMATION Freescale Semiconductor, Inc... VRH VRL AN6 AN7 VSSA IC1 IC2 IC3 OC1 OC2 OC3 OC4 IC4/OC5 PAI PWMA PWMB PCLK GND GND GND GND GND GND GND GND GND GND A23 / CS10 A22 / CS9 A21 / CS8 A20 / CS7 A19 / CS6 FC2 / CS5 FC1 FC0 / CS3 BGACK / CSE BG / CSM BR / CS0 CSBOOT +5V 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 VSSA VSSA VSSA VSSA VSSA GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND VPP1 Figure 5-2. MAPI Interface Connector P1 Pin Assignments 5-2 For More Information On This Product, Go to: www.freescale.com M68MPB16Y3UM/D Freescale Semiconductor, Inc. MAPI SUPPORT INFORMATION Freescale Semiconductor, Inc... VSSA VSSA VSSA VSSA VSSA VSSA VSSA GND No Connect GND A1 A3 A5 A7 A9 A10 A12 A14 A16 A18 No Connect GND GND GND GND GND GND GND GND GND 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 AN0 AN1 AN2 AN3 AN4 AN5 VSSA GND +5V GND A2 A4 A6 A8 GND A11 A13 A15 A17 GND +5V GND PCS0/SS MOSI MISO SCK TXDA RXDA TXDB RXDB Figure 5-3. MAPI Interface Connector P2 Pin Assignments M68MPB16Y3UM/D For More Information On This Product, Go to: www.freescale.com 5-3 Freescale Semiconductor, Inc. MAPI SUPPORT INFORMATION Freescale Semiconductor, Inc... GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND EXTAL GND GND +5V 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 TPU0 TPU1 TPU2 TPU3 TPU4 TPU5 TPU6 TPU7 TPU8 TPU9 TPU10 TPU11 TPU12 TPU13 TPU14 TPU15 T2CLK GND GND GND PCS1 PCS2 GND GND GND GND VSTBY DSO / IPIPE0 DSI / IPIPE1 HALT RESET BERR BKPT / DSCLK TSC FREEZE GND GND CLKOUT GND +5V Figure 5-4. MAPI Interface Connector P3 Pin Assignments 5-4 For More Information On This Product, Go to: www.freescale.com M68MPB16Y3UM/D Freescale Semiconductor, Inc. MAPI SUPPORT INFORMATION Freescale Semiconductor, Inc... +5V GND D1 D3 D5 D7 D8 D10 D12 D14 GND A0 DSACK0 DSACK1 PULL-UP PULL-UP DS AS SIZ0 SIZ1 R/W FASTREF IRQ1 IRQ2 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 +5V 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 +5V D0 D2 D4 D6 GND D9 D11 D13 D15 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND VPP4 Figure 5-5. MAPI Interface Connector P4 Pin Assignments M68MPB16Y3UM/D For More Information On This Product, Go to: www.freescale.com 5-5 Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... MAPI SUPPORT INFORMATION 5-6 For More Information On This Product, Go to: www.freescale.com M68MPB16Y3UM/D Freescale Semiconductor, Inc. SCHEMATIC DIAGRAMS CHAPTER 6 SCHEMATIC DIAGRAMS Freescale Semiconductor, Inc... 6.1 INTRODUCTION This chapter contains the M68MPB916Y3 MCU Personality Board (MPB) schematic diagrams. These schematic diagrams are for reference only and may deviate slightly from the circuits on your MPB. M68MPB16Y3UM/D For More Information On This Product, Go to: www.freescale.com 6-1 D For More Information On This Product, Go to: www.freescale.com 4 ZONE O A REV DATE: 02/11/94 L.H. 3 02/11/94 L.H. PROJECT LEADER: DATE: 02/11/94 L.H. GEDABV: MPB16Y3C GEDTTL: BOARD 2 AUSTIN, TEXAS 78735 1 A REV: USA L.H. B.B. APPROVED SHEET 1 OF 8 63ASE90507W DWG. NO. SCHEMATIC MPB16Y3C LAST_MODIFIED=Tue Nov 15 17:58:05 1994 A SIZE TITLE: 6501 WILLIAM CANNON DRIVE WEST MICROPROCESSOR AND MEMORY TECHNOLOGIES GROUP 02/11/94 11/15/94 DATE 1 C D A A DESIGN ENGINEER: DATE: ADDED PULLUPS TO PCS1* & PCS2* ORIGINAL RELEASE DESCRIPTION REVISIONS 63ASE90507W DRAWN BY: MOTOROLA RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. MOTOROLA DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN. TITLE & REVISITION STATUS NOTES BYPASS CAPACITORS, CLEAN POWER & SIGNAL FILTERS MODULAR ACTIVE PROBE INTERCONNECT P1 & P3 MODULAR ACTIVE PROBE INTERCONNECT P2 & P4 MCU & CLOCK PULLUPS/PULLDOWNS/PERSONALITY ID SIGNAL CROSS REFERENCES TABLE OF CONTENTS Freescale Semiconductor, Inc... 3 2 DWG. NO. A B C 1 2 3 4 5 6 7 8 4 Freescale Semiconductor, Inc. REV: D For More Information On This Product, Go to: www.freescale.com 4 GEDABV: MPB16Y3C GEDTTL: BOARD 2 1 A REV: SHEET 2 OF 8 63ASE90507W DWG. NO. LAST_MODIFIED=Tue Nov 15 18:04:33 1994 A NOTES C D A A SIZE DEVICE TYPE NUMBER IS FOR REFERENCE ONLY. THE NUMBER VARIES WITH THE MANUFACTURER. SPECIAL SYMBOL USAGE: * DENOTES - ACTIVE LOW SIGNAL. <> DENOTES - VECTORED SIGNALS. INTERPRET DIAGRAM IN ACCORDANCE WITH AMERICAN NATIONAL STANDARDS INSTITUTE SPECIFICATIONS, CURRENT REVISION, WITH THE EXCEPTION OF LOGIC BLOCK SYMBOLOGY. CODE FOR SHEET TO SHEET REFERENCES IS AS FOLLOWS: 5 C7 < > OUTPUT SHEET INPUT ZONE VCC LOCATIONS UNLESS OTHERWISE SPECIFIED, VCC IS APPLIED TO: PIN 8 OF ALL 8-PIN ICS PIN 14 OF ALL 14-PIN ICS PIN 16 OF ALL 16-PIN ICS PIN 20 OF ALL 20-PIN ICS, ETC. GROUND LOCATIONS UNLESS OTHERWISE SPECIFIED, GROUND IS APPLIED TO: PIN 4 OF ALL 8-PIN ICS PIN 7 OF ALL 14-PIN ICS PIN 8 OF ALL 16-PIN ICS PIN 10 OF ALL 20-PIN ICS, ETC. 1 63ASE90507W 3 8. 7. 6. 5. 4. 3. NOTES: 1. UNLESS OTHERWISE SPECIFIED: ALL RESISTORS ARE IN OHMS, 5%, 1/8 WATT. ALL CAPACITORS ARE IN UF. 50V. ALL VOLTAGES ARE DC. 2. INTERRUPTED LINES CODED WITH THE SAME LETTER OR LETTER COMBINATIONS ARE ELECTRICALLY CONNECTED. Freescale Semiconductor, Inc... 3 2 DWG. NO. A B C 4 Freescale Semiconductor, Inc. REV: D For More Information On This Product, Go to: www.freescale.com VRL MAPI-VRL 4C4> MAPI-VRH 4C4> 6B4< VRH 6B4< GND 4 C66 GND C71 VSSA 2 1 VSSA C68 0.1UF 1 0.1UF 2 VSSA VDDA W4 1 2 3 W3 1 2 3 1 0.1UF 2 C67 C53 1 0.1UF 2 GND ADC MODULE GND 1 0.1UF 2 GND C52 1 0.1UF 2 VRH & VRL SELECTION GND 1 0.1UF 1 0.1UF C64 2 2 C63 GND C51 1 0.1UF C3 1 0.1UF GND 2 2 FOR VDDE OF MCU AND OSCILLATOR +5V AND GND DECOUPLING C72 GND 3 1 0.1UF 2 GND C57 1 0.1UF 2 C73 VSSA C8 0.1UF 1 C6 0.1UF 1 VSSA 2 2 GND 1 0.1UF 2 GND C62 1 0.1UF 2 VSSA C9 0.1UF 1 2 VSSA L4 1UH L3 ADC MODULE TANT + 1 C2 10UF 2 25V 2 2 E1 C54 1 0.1UF 2 TANT + 1 C4 10UF 2 25V VSSA VSSA C70 0.1UF 1 2 VSSA 1 2 C69 0.1UF AN<7> C5 1 0.1UF 2 C55 VSSA VDDA VSSI 1 0.1UF 2 VDDI AN<7..0> 1 4C4> 5C1> GEDABV: MPB16Y3C GEDTTL: BOARD 2 1 A REV: SHEET 3 OF 8 63ASE90507W DWG. NO. LAST_MODIFIED=Thu Nov 17 10:06:11 1994 A A A SIZE C D 63ASE90507W BYPASS CAPACITORS, CLEAN POWER & SIGNAL FILTERS VSSA C12 0.1UF 1 2 AN<6> AN<5> AN<4> AN<3> AN<2> AN<1> AN<0> ANALOG SIGNAL FILTERS ADC MODULE 1 1 2 W2 (CUT TRACE ON BOARD) C11 0.1UF 1 2 2 FERRITE BEAD 1 L1 1UH 2 VDDA/VSSA GENERATION TANT C7 10UF 25V 1 L52 VDDI/VSSI GENERATION FERRITE BEAD 1 1 C10 0.1UF 1 2 VSSI VDDI GND + 1 C1 + 1 10UF 2 25V 2 TANT +5V Freescale Semiconductor, Inc... 3 2 DWG. NO. A B C +5V 4 Freescale Semiconductor, Inc. REV: D For More Information On This Product, Go to: www.freescale.com CSBOOT* VPP1 6A1< CS<10..0>* 6D1> 6D1<> PCLK PWMB PWMA PAI IC4/OC5 OC4 OC3 OC2 OC1 IC3 IC2 IC1 AN<7> AN<6> MAPI-VRL MAPI-VRH 4 +5V CS<10>* CS<9>* CS<8>* CS<7>* CS<6>* CS<5>* CS<4>* CS<3>* CS<2>* CS<1>* CS<0>* VSSA GND 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 11 13 15 17 19 21 23 25 1 3 5 7 9 A N A L O G # 1 GND1 GND1 GND1 GND1 GND1 GND1 GND1 GND1 GND2 GND2 GND2 GND2 GND2 3 RN P50L-080S-BS-TGF GND I/O GND I/O GND I/O GND I/O GND I/O GND I/O GND I/O GND I/O GND I/O GND I/O GND I/O GND I/O GND I/O GND I/O GND CS10 GND CS9 GND CS8 GND CS7 GND CS6 GND CS5 GND CS4 GND CS3 GND CSE/2 GND CSM/1 GND CS0 CSBOOT GND VDD VPP1 I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O A N A# L2 O G P1 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 12 14 16 18 20 22 24 26 2 4 6 8 10 GND MAPI BUS P1 GND VSSA GND +5V GND GND 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 9 11 13 15 17 19 21 23 1 3 5 7 A N A L O G # 4 I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 10 12 14 16 18 20 22 24 2 4 6 8 GND +5V TPU<12> TPU<13> TPU<14> TPU<15> TPU<4> TPU<5> TPU<6> TPU<7> TPU<8> TPU<9> TPU<10> TPU<11> TPU<0> TPU<1> TPU<2> TPU<3> 6C1< 6D1> 6D1<> VSTBY DSO DSI 6C4> GEDABV: MPB16Y3C GEDTTL: BOARD 2 1 A REV: SHEET 4 OF 8 63ASE90507W DWG. NO. LAST_MODIFIED=Thu Nov 17 10:06:14 1994 A C D A A SIZE 6A1< 6D1> CLKOUT MAPI-EXTAL 6D1< TSC 6D1< FREEZE BKPT* 6C4< 6C4<> RESET* BERR* 6C4<> HALT* PCS2* 6B1<> 7A1< 6B1<> 7A1< 6B4< 7B1< 6C4<> 7A4< PCS1* T2CLK TPU<15..0> 1 63ASE90507W MODULAR ACTIVE PROBE INTERCONNECT P1 & P3 RN P50L-080S-BS-TGF GND I/O I/O GND I/O GND I/O GND I/O GND I/O GND I/O GND I/O GND I/O GND I/O GND I/O GND I/O GND I/O GND I/O GND VSTBY GND DSO GND DSI GND HALT GND RESET GND BERR GND BKPT GND TSC GND GND FREEZE GND GND GND EXTAL GND CLKOUT GND GND VDD VDD GND4 GND4 GND4 GND4 GND4 GND4 GND4 GND4 GND3 GND3 GND3 GND3 A N A# L3 O G P3 MAPI BUS P3 Freescale Semiconductor, Inc... 3 2 DWG. NO. A B 6C1<> 7C4< 6C1<> 7C4< 6C1<> 7C4< 6C1<> 7C1< 6B1<> 7C1< 6B1< 6B1> 6B1> 7C1< 6B1< C 7C4< 7C4< 6C1<> 7C4< 6C1<> 7C4< 6C1<> 3B4< 3B4< 6B4< 3B1< 6B4< 3B1< 4 Freescale Semiconductor, Inc. REV: D RMC* DS* AS* SIZ0 SIZ1 7C4< 6D4<> 6D4<> 6D4<> 6C4<> VPP4 IRQ<7..1>* 7A4< 6D4<> 6A1< FSREF 4 45 47 49 51 53 55 57 59 IRQ<1>* IRQ<2>* IRQ<3>* IRQ<4>* IRQ<5>* IRQ<6>* IRQ<7>* GND 23 25 27 29 31 33 35 37 39 41 43 1 3 5 7 9 11 13 15 17 19 21 A<0> D<1> D<3> D<5> D<7> D<8> D<10> D<12> D<14> +5V GND GND GND GND GND GND GND VPP4 GND GND GND GND GND GND GND GND GND GND GND VDD D0 D2 D4 D6 GND D9 D11 D13 D15 GND 3 RN P50L-060S-BS-TGF I/O I/O I/O I/O I/O I/O I/O VDD A0 DSACK0 DSACK1 AVEC RMC DS AS SIZ0 SIZ1 R/W MODCLK VDD GND D1 D3 D5 D7 D8 D10 D12 D14 GND P4 46 48 50 52 54 56 58 60 24 26 28 30 32 34 36 38 40 42 44 2 4 6 8 10 12 14 16 18 20 22 GND D<9> D<11> D<13> D<15> D<0> D<2> D<4> D<6> +5V MAPI BUS P4 GND GND NC VSSA A<1> A<3> A<5> A<7> A<9> A<10> A<12> A<14> A<16> A<18> NC 45 47 49 51 53 55 57 59 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 1 3 5 7 9 11 13 A N A L O G # 3 A N A L O G # 2 I/O I/O I/O I/O I/O I/O I/O I/O GND VDD GND A2 A4 A6 A8 GND A11 A13 A15 A17 GND VDD GND I/O I/O I/O I/O I/O I/O I/O 46 48 50 52 54 56 58 60 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 2 4 6 8 10 12 14 GND A<11> A<13> A<15> A<17> A<2> A<4> A<6> A<8> AN<0> AN<1> AN<2> AN<3> AN<4> AN<5> VSSA RXDB TXDB RXDA TXDA SCK MISO MOSI SS* AN<5..0> 1 6B1<> 6B1<> 6B1<> 6B1<> 6B1<> 6B1<> 6B1<> 6B1<> 2 1 A REV: SHEET 5 OF 8 63ASE90507W DWG. NO. LAST_MODIFIED=Thu Nov 17 10:06:18 1994 GEDABV: MPB16Y3C GEDTTL: BOARD A A A C D 63ASE90507W SIZE 7B4< 7B4< 7B4< 7B4< 7B4< 7B1< 7B1< 7B1< 3B1< 6B4< MODULAR ACTIVE PROBE INTERCONNECT P2 & P4 RN P50L-060S-BS-TGF GND3 GND3 GND3 GND3 GND3 GND3 GND3 GND3 GND VPP2 GND A1 A3 A5 A7 A9 A10 A12 A14 A16 A18 VPP3 GND GND2 GND2 GND2 GND2 GND2 GND2 GND2 P2 +5V MAPI BUS P2 Freescale Semiconductor, Inc... 3 2 DWG. NO. A B AVEC* 7C4< R/W* DSACK1* 6D4<> 6C4> DSACK0* 6D4<> 7D4< 6D4<> For More Information On This Product, Go to: www.freescale.com C D<15..0> A<18..0> 6D4<> 7D1> 6D1> 4 Freescale Semiconductor, Inc. REV: D VSSI 1 4 1 2 R52 20K C56 VSSSYN XFC 2 100PF VSSI 21 75 101 137 67 71 69 9 1 160 7 6 5 4 3 2 159 158 8 /PF0 /PF1 /PF2 /PF3 /PF4 /PF5 /PF6 /PF7 M O D U L E T P U M O D U L E A D C VSSI VSSI VSSI VSSI MODCLK/VDDSYN XFC VSSSYN VDDA VRH VRL AN0/PADA0 AN1/PADA1 AN2/PADA2 AN3/PADA3 AN4/PADA4 AN5/PADA5 AN6/PADA6 AN7/PADA7 VSSA TPUCH0 TPUCH1 TPUCH2 TPUCH3 TPUCH4 TPUCH5 TPUCH6 TPUCH7 TPUCH8 TPUCH9 TPUCH10 TPUCH11 TPUCH12 TPUCH13 TPUCH14 TPUCH15 T2CLK R/W* CLKOUT BERR* HALT* RESET* DSACK0*/PE0 DSACK1*/PE1 -------/---------/--DS* /PE4 AS* /PE5 SIZ0 /PE6 SIZ1 /PE7 FSREF IRQ1* IRQ2* IRQ3* IRQ4* IRQ5* IRQ6* IRQ7* 3 CSBOOT* PQS0/ MISO PQS1/ MOSI PQS2/ SCK PQS3/PCS0*/SS* PQS4/ PCS1* PQS5/ PCS2* PMC4/RXDB PMC5/TXDB PMC6/RXDA PMC7/TXDA PGP0/ IC1 PGP1/ IC2 PGP2/ IC3 PGP3/ OC1 PGP4/ OC2 PGP5/ OC3 PGP6/ OC4 PGP7/IC4/OC5 PAI PWMA PWMB PCLK VSTBY IPIPE1/DSI IPIPE0/DSO DSCLK/BKPT FREEZE TSC VSSE VSSE VSSE VSSE VSSE VSSE VSSE VSSE VSSE VSSE VSSE VSSE XTAL EXTAL (VPP ON 916Y3) N/C (VPP ON 916Y3) N/C M C C I Q S M M O D U L E G P T A0 A1 A2 PB0/ A3 PB1/ A4 PB2/ A5 PB3/ A6 PB4/ A7 PB5/ A8 PB6/ A9 PB7/A10 PA0/A11 PA1/A12 PA2/A13 PA3/A14 PA4/A15 PA5/A16 PA6/A17 PA7/A18 VDDI VDDE VDDE VDDE VDDE VDDE VDDE BR*/ CS0* BG*/ CSM* BGACK*/ CSE* PC0/FC0/ CS3* PC1/FC1/ ---PC2/FC2/ CS5* PC3/A19/ CS6* PC4/A20/ CS7* PC5/A21/ CS8* PC6/A22/ CS9* E/A23/CS10* SCIM INTERFACE MC68HC16Y3 160 QFP FOR THE NOTE: 1) PLACE THE CAP BETWEEN VDDSYN & XFC AS CLOSE TO MCU PINS AS POSSIBLE. FERRITE BEAD L2 C61 2 0.1UF 1 1 VSSA VDDA 43 44 45 46 49 50 51 52 53 54 55 56 59 60 61 62 63 89 74 78 77 76 93 92 91 90 99 98 88 87 86 85 84 83 82 81 D0 /PH0 D1 /PH1 D2 /PH2 D3 /PH3 D4 /PH4 D5 /PH5 D6 /PH6 D7 /PH7 D8 /PG0 D9 /PG1 D10/PG2 D11/PG3 D12/PG4 D13/PG5 D14/PG6 D15/PG7 SOCKET CLAM SHELL YAMAICHI U1 +5V 2 W1 GEDABV: MPB16Y3C GEDTTL: BOARD MCU & CLOCK MCUEXTAL 3 1 XTALOSC C59 0.1UF 1 C58 0.1UF 1 GND 2 2 Y1 OUT14 SMT-SO 2 4A1> 4C4<> 7C4< 4C4<> 7C4< 4C4<> 7C4< 4C4<> 7C4< 4C4<> 7C4< 4C4<> 7C4< 4C4<> 7C4< 4C4<> 7C1< 4C4> 4C4< 7C1< 4B4< 7C1< 4B4> 5B1<> 7B4< 5B1<> 7B4< 5B1<> 7B4< 5B1<> 7B4< 4B1<> 7A1< 4B1<> 7A1< 5B1<> 7B1< 5B1<> 7B1< 5B1<> 7B1< 5B1<> 7B4< 4A4> 5B4> 4B4< 4B1<> 4B1< 4B1> 4A1< 4B1> 4B1> 4B4< 5D4< 7D1> 8 OR 14 PIN CANS / DIPS. 14 PIN DIP SOCKET FOR MAPI-EXTAL VPP4 VPP1 TXDA RXDA TXDB RXDB PCS2* PCS1* SS* SCK MOSI MISO PCLK PWMB PWMA PAI IC4/OC5 OC4 OC3 OC2 OC1 IC3 IC2 IC1 VSTBY TSC FREEZE BKPT* DSO DSI CSBOOT* CS<10..0>* A<18..0> 1 A REV: SHEET 6 OF 8 63ASE90507W DWG. NO. 11 OUT8 8 LAST_MODIFIED=Thu Nov 17 10:06:22 1994 A SIZE GND 156 142 129 121 107 94 73 58 48 41 27 11 66 NC 68 138 64 35 34 36 33 97 96 42 39 38 37 155 154 153 152 151 150 149 148 147 146 145 144 65 140 141 139 79 80 GND CS<0>* CS<1>* CS<2>* CS<3>* CS<4>* CS<5>* CS<6>* CS<7>* CS<8>* CS<9>* CS<10>* 123 124 125 126 127 128 131 132 133 134 135 122 A<0> A<1> A<2> A<3> A<4> A<5> A<6> A<7> A<8> A<9> A<10> A<11> A<12> A<13> A<14> A<15> A<16> A<17> A<18> VDDI 100 12 13 14 15 16 17 18 19 20 22 23 24 25 28 29 30 31 32 136 26 47 72 108 130 157 C D A A 2 TANT + 1 C65 1UF 2 25V C60 2 1000PF 1 VDDSYN AN<0> AN<1> AN<2> AN<3> AN<4> AN<5> AN<6> AN<7> TPU<0> TPU<1> TPU<2> TPU<3> TPU<4> TPU<5> TPU<6> TPU<7> TPU<8> TPU<9> TPU<10> TPU<11> TPU<12> TPU<13> TPU<14> TPU<15> 33 1 <1>* <2>* <3>* <4>* <5>* <6>* <7>* 119 118 117 116 115 114 113 112 111 110 109 106 105 104 103 102 VDDI VDDE VDDE VDDE VDDE VDDE VDDE 1 63ASE90507W W5 L51 1 2 1 2 3 1UH VDDI AN<7..0> VRL 3B4> 5C1> 4C4> VRH 3B4> 2 R51 IRQ IRQ IRQ IRQ IRQ IRQ IRQ D<0> D<1> D<2> D<3> D<4> D<5> D<6> D<7> D<8> D<9> D<10> D<11> D<12> D<13> D<14> D<15> 70 10 40 57 95 120 143 VDDI +5V Freescale Semiconductor, Inc... 3 2 DWG. NO. A B T2CLK TPU<15..0> RESET* HALT* BERR* CLKOUT R/W* SIZ1 SIZ0 AS* DS* DSACK1* DSACK0* IRQ<7..1>* FSREF D<15..0> 4C1> 7A4< 4C1<> For More Information On This Product, Go to: www.freescale.com C 5C4<> 5C4<> 5C4<> 5C4<> 5C4< 4A1< 4B1> 4B1<> 4B1<> 5C4<> 7D4< 5B4<> 7A4< 5B4<> 5C4<> 5C4<> 4 Freescale Semiconductor, Inc. REV: D For More Information On This Product, Go to: www.freescale.com TPU<15..0> IRQ<7..1>* 5B4<> 6D4<> TXDA SCK MISO MOSI SS* 4C1<> 6C4<> 5B1<> 6B1<> 5B1<> 6B1<> 5B1<> 6B1<> 5B1<> 6B1<> 5B1<> 6B1<> OC4 OC3 OC2 OC1 IC3 IC2 4 4 13 3 14 2 15 1 12 8 7 6 5 4 3 2 1 R2 220K R1 220K R3 220K RN1 1M RN3 1M RN5 1M RN2 1M 2 2 2 RN4 220K +5V 16 9 8 5 6 7 10 11 16 9 15 14 13 12 11 10 16 5 6 7 8 14 13 12 16 6 7 5 1 2 3 4 16 5 12 4 13 3 14 2 NC NC A<8> A<10> A<5> A<6> A<7> A<2> A<3> +5V NC NC NC NC NC TPU<10> TPU<11> TPU<12> TPU<13> TPU<14> TPU<15> +5V NC NC NC NC +5V +5V GND NC W6 2 3 2 2 2 R5 220K R4 220K 1 1 1 +5V 6B1> 4C4> PWMA PAI 4B1<> 6B1<> GEDABV: MPB16Y3C GEDTTL: BOARD 2 1 SHEET 7 OF 8 63ASE90507W DWG. NO. LAST_MODIFIED=Thu Nov 17 10:06:24 1994 A A REV: 4B1<> 6B1<> PCS2* 4C1> 5B1<> 6B1<> 5B1<> 6B1<> PCS1* T2CLK RXDB TXDB 5B1<> 6B1<> 6B1> PWMB RXDA 4B4> 4C4<> 6B1<> 5D4< 6D1> PCLK IC4/OC5 A<18..0> PULL-UPS / PULL-DOWNS / PERSONALITY ID MC68HC16Y1 1 R53 220K C D A A SIZE A<9> A<4> A<1> MC68HC916Y1 1 63ASE90507W 3 IRQ<1>* IRQ<2>* IRQ<3>* IRQ<4>* IRQ<5>* IRQ<6>* IRQ<7>* NC TPU<2> TPU<3> TPU<4> TPU<5> TPU<6> TPU<7> TPU<8> TPU<9> 1 2 3 4 15 NC 11 TPU<0> 9 TPU<1> 10 9 10 11 12 13 14 15 NC 8 1 RMC* 5C4<> IC1 1 AVEC* 5C4<> 4C4<> 6C1<> 4C4<> 6C1<> 4C4<> 6C1<> 4C4<> 6C1<> 4C4<> 6C1<> 4C4<> 6C1<> 4C4<> 6C1<> 1 FSREF 6 7 8 9 10 11 1 15 5B4<> 6D4<> NC NC NC NC NC NC MCU PERSONALITY CODE: MC68HC16Y1=108HEX & MC68HC916Y1=109HEX (USING A<10..1>) Freescale Semiconductor, Inc... 3 2 DWG. NO. A B C 4 Freescale Semiconductor, Inc. REV: D For More Information On This Product, Go to: www.freescale.com 4 A <18..0> AN <7..0> AS * AVEC * BERR * BKPT * CLKOUT CS <10..0> * CSBOOT * D <15..0> DS * DSACK0 * DSACK1 * DSI DSO FREEZE FSREF HALT * IC1 IC2 IC3 IC4/OC5 IRQ <7..1> * MAPI-EXTAL MAPI-VRH MAPI-VRL MISO MOSI OC1 OC2 OC3 OC4 PAI PCLK PCS1 * PCS2 * PWMA PWMB R/W * RESET * RMC * RXDA RXDB SCK SIZ0 SIZ1 SS * T2CLK TPU <15..0> TSC TXDA 5D4< 6D1> 7D1> 3B1< 4C4> 5C1> 6B4< 5C4<> 6D4<> 5C4<> 7C4< 4B1> 6C4< 4B1> 6D1< 4A1< 6C4> 4B4< 6D1<> 4B4< 6D1> 5C4<> 6D4<> 5C4<> 6D4<> 5C4<> 6D4<> 5C4<> 6D4<> 4B1<> 6D1<> 4B1< 6D1> 4A1< 6D1> 5B4<> 6D4<> 7D4< 4B1<> 6C4<> 4C4<> 6C1<> 7C4< 4C4<> 6C1<> 7C4< 4C4<> 6C1<> 7C4< 4C4<> 6B1<> 7C1< 5B4<> 6D4<> 7A4< 4A1> 6A1< 3B4< 4C4> 3B4< 4C4> 5B1<> 6B1<> 7B4< 5B1<> 6B1<> 7B4< 4C4<> 6C1<> 7C4< 4C4<> 6C1<> 7C4< 4C4<> 6C1<> 7C4< 4C4<> 6C1<> 7C4< 4C4> 6B1< 7C1< 4B4> 6B1< 7C1< 4B1<> 6B1<> 7A1< 4B1<> 6B1<> 7A1< 4C4< 6B1> 7C1< 4B4< 6B1> 7C1< 5C4< 6C4> 4B1<> 6C4<> 5C4<> 7C4< 5B1<> 6B1<> 7B1< 5B1<> 6B1<> 7B1< 5B1<> 6B1<> 7B4< 5C4<> 6D4<> 5C4<> 6C4<> 5B1<> 6B1<> 7B4< 4C1> 6B4< 7B1< 4C1<> 6C4<> 7A4< 4B1> 6D1< 5B1<> 6B1<> 7B4< *** Signal Cross-Reference *** --- for the entire design -- 3 TXDB VPP1 VPP4 VRH VRL VSTBY 2 LAST_MODIFIED=Tue Nov 15 18:03:45 1994 1 A REV: SHEET 8 OF 8 63ASE90507W DWG. NO. C D A A GEDABV: MPB16Y3C GEDTTL: BOARD SIGNAL CROSS REFERENCES 1 63ASE90507W A SIZE 5B1<> 6B1<> 7B1< 4A4> 6A1< 5B4> 6A1< 3B4> 6B4< 3B4> 6B4< 4B1> 6C1< Freescale Semiconductor, Inc... 3 2 DWG. NO. A B C 4 Freescale Semiconductor, Inc. REV: Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... SCHEMATIC DIAGRAMS 6-10 For More Information On This Product, Go to: www.freescale.com M68MPB16Y3UM/D