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NT3H1101/NT3H1201
NXP Semiconductors
NTAG I2C - Energy harvesting Type 2 Tag with I2C interface
Table 13.
Bit
…continuedConfiguration bytes
Field
Access
via RF
Access
via I²C
Default
values
Description
Configuration register: LAST_NDEF_BLOCK
7-0
LAST_NDEF_BLOCK
R&W
R&W
00h
Address of last BLOCK (16bytes) of NDEF
message from I²C addressing. An RF read of
the last page of the I2C block, specified by
LAST_NDEF_BLOCK sets the register
NDEF_DATA_READ to 1b and triggers
FD_OFF if FD_OFF is set to 10b
01h is page 04h (first page of the User Memory)
from RF addressing
02h is page 08h
03h is page 0Ch
………
37h is page DCh - memory sector 0 (last
possible page of User memory for NTAG I²C 1k)
......
77h is page DCh - memory sector 1 (last page
possible of the User Memory for NTAG I²C 2k)
Configuration register: SRAM_MIRROR_BLOCK
7-0
SRAM_MIRROR_
R&W
R&W
F8h
BLOCK
Address of first BLOCK (16bytes) of SRAM
buffer when mirrored into the User memory from
I²C addressing
01h is page 04h (first page of the User Memory)
from RF addressing
02h is page 08h
03h is page 0Ch
………
34h is page D0h - memory sector 0 (last
possible page of User memory for NTAG I²C 1k)
......
74h is page D0h - memory sector 1 (last page
possible of the User Memory for NTAG I²C 2k)
Configuration register: WDT_LS
7-0
WDT_LS
R&W
R&W
48h
Least Significant byte of watchdog time
control register
NT3H1101/1201
Product data sheet
COMPANY PUBLIC
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Rev. 3.3 — 15 July 2015
265433
© NXP Semiconductors N.V. 2015. All rights reserved.
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