Download SPARC/CPU-5TE Technical Reference Manual

Hardware Description
3.6.2
SPARC CPU-5TE Technical Reference Manual
Address Map of Local I/O Devices on SPARC CPU-5TE
The following table lists the physical addresses for all local I/O devices and the accesses
permitted $7(B)yte, (H)alf Word and (W)ord).
Table 32: NCR89C105 Chip Address Map
Physical
Address
Page 68
Device
Access
$7000 0000 ->
$70FF FFFF
Boot EPROM and User EPROM
B,H,W
$7100 0000 ->
$711F FFFF
Keyboard, Mouse, and Serial Ports
B
$7100 0000
$7100 0002
$7100 0004
$7100 0006
$7110 0000
$7110 0002
$7110 0004
$7110 0006
Mouse Control Port
Mouse Data Port
Keyboard Control Port
Keyboard Data Port
TTYB Control Port
TTYB Data Port
TTYA Control Port
TTYA DATA Port
$7120 0000 ->
$712F FFFF
RTC/NVRAM
B,H,W
$7130 0000 ->
$7137 FFFF
Boot EPROM and User EPROM Programming
B
$7138 0000 ->
$713F FFFF
Additional Registers
B
$7140 0000 ->
$714F FFFF
Floppy Controller
B
$7140 0002
$7140 0004
$7140 0004
$7140 0005
$7140 0006
$7140 0007
$7140 0007
Digital Output Register (DOR)
Main Status Register (MSR, Read Only)
Datarate Select Register (DSR, Write Only)
FIFO
Reserved (Test mode select)
Digital Input Register (DIR, Read Only)
Configuration Control Register (CCR, Write Only)
$7150 0000 ->
$717F FFFF
Reserved
$7180 0000
89C105 Configuration Register
B
$7190 0000 ->
$719F FFFF
Auxiliary I/O Registers
B
$7190 0000
Aux 1 Register (Miscellaneous System Functions)
$7191 0000
Aux 2 Register (Software Power-down Control)
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