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Using the Core Insertion Flow
X-Ref Target - Figure 11-2
ChipScope
Wizard
Fast and simple
ChipScope Window
in Main PlanAhead GUI
Precise control
ChipScope Tcl debug commands
X11122
Figure 11-2:
Debug Core Insertion Modes
Deciding Which Debug Core Insertion Mode to Use
Table 11-1 summarizes how to decide what insertion mode(s) to use based on the
debugging goal.
Table 11-1:
Debugging Goals and Core Insertion Modes
Debugging Goal
Core Insertion Mode
Quickly create ILA debug core(s) with default settings for the
selected nets
ChipScope Wizard
Change parameters on existing debug cores
ChipScope Window
Manually create or delete existing debug cores
ChipScope Window
Manually create, delete, or configure trigger or data ports on an ILA
core
ChipScope Window
Manually assign nets to the trigger/data/clock channels
Play back a recorded script of debug commands later
ChipScope Window
Tcl Commands
Selecting Nets for Debug
The first step in the PlanAhead/ChipScope debug flow is to identify the set of nets to
debug. PlanAhead makes the debug net selection process as simple as picking a set of nets
or busses in the Netlist view, and selecting the Add to ChipScope Unassigned Nets
popup command. Net selection is also available by selecting nets or busses in the
Schematic view.
Unassigned Nets List
PlanAhead maintains an Unassigned Nets list (Figure 11-3) in the ChipScope view
(Window > ChipScope). The Unassigned Nets list is a convenient place to bookmark nets
of interest while browsing the design. Nets may be stored for later debug by dragging and
dropping from the netlist or schematic view into the Unassigned Nets list. Nets may also
PlanAhead User Guide
UG632 (v 11.4)
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