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Chapter 12: Programming and Debugging the Design Figure 12-2: Generate Bitstream Dialog Box You can set ISE BitGen options prior to running the command.When you select an option, a description of the option displays in the dialog box. For more information about BitGen options, see the Command Line Tools User Guide (UG628), cited in Appendix E, Additional Resources. 2. Click OK to start BitGen. You can view the command status in the Compilation view and Messages view and the BitGen report file in the Reports view after it completes. PlanAhead generated the resulting bit file in the project Run directory. Debugging the Design with ChipScope The PlanAhead™ application is integrated with the ChipScope™ Pro debug software. The ChipScope Pro integration provides simplified post-Synthesis insertion and connection of the ChipScope Pro Integrated Logic Analyzer (ILA) debug cores in the PlanAhead tool. Overview of ChipScope Integration in PlanAhead PlanAhead provides a GUI wizard for quick and easy design debug for most situations. A non-wizard GUI and Tcl command flow are available for precision debug core and net connection control. This flow provides a robust ILA core connection solution without leaving the PlanAhead tool. Figure 12-3, page 371 illustrates the debug core integration. 370 www.xilinx.com PlanAhead User Guide UG632 (v13.4) January 18, 2012
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