Download Intel Xeon Phi (MIC) User`s Manual - GPU Clusterware

Transcript
INTEL XEON PHI (MIC)
USER’S MANUAL October 31, 2014
Table of Figures
FIGURE 1: LOGICAL DESIGN OF THE CYI XEON PHI CLUSTER (PHI.CYTERA.CYI.AC.CY)
FIGURE 2: QPHIX INSTALLATION LOGICAL DIAGRAM
FIGURE 3: INTEL XEON PHI (KNIGHTS CORNER) HIGH-LEVEL MICRO-ARCHITECTURE
FIGURE 4: INTEL MIC ARCHITECTURE CORE OVERVIEW
FIGURE 5 : CORE PIPELINE COMPONENTS
FIGURE 6 : GANGLIA* MONITORING SYSTEM DATA FLOW DIAGRAM
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Table of Tables
TABLE 1: DESCRIPTION OF CO-PROCESSOR COMPONENTS ........................................................................................30
TABLE 2 : CACHE HIERARCHY .......................................................................................................................................34
The Cyprus Institute - CaSToRC
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