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PNX17xx Series
NXP Semiconductors
Volume 1 of 1
Chapter 20: 2D Drawing Engine
Table 18: Mono Host F Color or SurfAlpha
Bit
Acces
s
Symbol
Offset 0x04 F420
Value
Description
Mono Host F Color or SurfAlpha
31:24
FCol[31:24]alpha[7:0]
R/W
0
23:16
FCol[23:16]R/V/Y[7:0]
R/W
0
15:8
FCol[15:8]G/Y/U[7:0]
R/W
0
7:0
FCol[7:0]B/U/V[7:0]
R/W
0
Specifies the foreground color for host bitmap monochrome
expansion. For alpha-blending, this register specifies the global
surface alpha values.
This register holds the foreground color for host bitmap monochrome expansion. The
appropriate number of bytes need to be loaded in accordance with the current color
depth. Thus, if the current depth is 8 bits, only the lowest byte need be written. If the
depth is 16 bits, the lowest two bytes need to be written.
When used as SurfAlpha, this register always contains four unsigned 8-bit alpha
values, regardless of color depth.
Note: When reading the value of this register, the lower byte will be replicated in all
four byte lanes in 8 bpp mode. In 16 bpp mode, the lower word will be replicated in
the upper word. In 32 bpp mode, all bits are unique and will read back the 32-bit data
that was written. This register is unchanged by drawing operations.
Table 19: Mono Host B Color or HAlpha Color
Bit
Acces
s
Symbol
Offset 0x04 F424
Value
Description
Mono Host B Color or HAlpha Color
31:24
BCol[31:24]
R/W
0
23:16
BCol[23:16]R/V/Y[7:0]
R/W
0
15:8
BCol[15:8]G/Y/U[7:0]
R/W
0
7:0
BCol[7:0]B/U/V[7:0]
R/W
0
Hold the background color for host bitmap monochrome expansion.
For alpha-blending this register may provide color data.
This register holds the background color for host bitmap monochrome expansion.
The appropriate number of bytes need to be loaded in accordance with the current
color depth. Thus, if the current depth is 8 bits, only the lowest byte need be written. If
the depth is 16 bits, the lowest two bytes need to be written.
When used as HostAlphaColor, the least significant three bytes of this register always
contain 8-bit color values, regardless of the current depth. The most significant byte is
supplied by the expanded host data during a 4-bit or 8-bit alpha expand BLT. In the
YUV formats, the order of the components in the least significant three bytes matches
that of the current PFormat.
When reading the value of this register, the lower byte will be replicated into all four
byte lanes in 8 bpp mode. In 16 bpp mode, the lower word will be replicated into the
upper word. In 32-bpp mode, or when A[3:0] in BltCtl are non-zero, all bits are unique
and will read back the 32-bit data that was written. This register is unchanged by
drawing operations.
PNX17XX_SER_1.11
Preliminary data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 1.11 — 05 February 2007
20-21