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MITX-6771 Technical Specification Manual Version: R1.00 Revisions Version Description of Version Date Completed R1.00 Release Version 7/3/2014 TSM_MITX_20140703_R1-00 Page 1 of 26 Preface This Technical Specification Manual (TSM) specifies the board layout, components, connectors, and the I/O connection ports, motherboards features. Intended Audience The TSM is intended to provide detailed, technical information about the MITX-6771 and its components to the vendors, system integrators, and other engineers and technicians who need this level of information. It is specifically not intended for general audiences. What This Document Contains Chapter 1 2 3 4 Description Introduction Product Description Technical Reference BIOS Features TSM_MITX_20140703_R1-00 Page 2 of 26 1. Introduction 1.1 Product introduction. The MITX-6771 is a Thin mini-ITX Intel Bay Trail platform based motherboard. It has a Intel Celeron Processor J1900 (2M Cache, up to 2.42 GHz) on board with two SO-DIMM slots support up to 8G of DDR3L RAM. The I /O interfaces include: HDMI, VGA, LVDS header, Gigabit Ethernet, Mic-in, Audio-out, 5x USB USB2.0, 1x USB3.0, 2x COM, 1x mini-PCIE+ USB with SIM slot and 1x mSATA slot. TSM_MITX_20140703_R1-00 Page 3 of 26 2. Product Description 2.1 Specification Table 1 summarizes the major features of the board. Table 1. Specification Essentials Platform Codename Form Factor Processor Chipset BIOS System Memory Ethernet Storage Expansion Power Bay Trail mini-ITX Intel Celeron J1900 2.42 GHz SoC AMI 2x 204-Pin DDR3L SO-DIMM, up to 4GB each 1x RJ45 ,Realtek RTL8111F, GbE x1, (OEM option of second GbE x 1) 1x SATA 3Gb/s, 1x mSATA (mini-PCIe) 1x mini-PCIe with USB + SIM ,1x PCIe x1 slot 12/19V DC 2.5mm power jack Graphic Graphic Controller Display Interface LCD Interface Display Resolution Dual Display I/O Serial Port Parallel Port USB PS/2 Port Audio Intel HD Graphics 1x VGA, 1x HDMI 1x dual/single channel 18/24-bit LVDS VGA - 1920x 1200, HDMI - 1920x 1200, LVDS - 1920x 1200 Dual independent display 2x RS-232 header 1x LPT 4x USB2.0, 1x USB3.0 header, 1x USB2.0 header 1x KB, 1x MS header Realtek ALC662, Line-out and MIC-in jack Advanced Technologies Wake On LAN Features and Options Yes Drop-in Intel Marshalltown board replacement. Intel embedded processor, long product life cycle, dual COM Port, parallel port Mechanical & Environmental Operating Temperature Storage Temperature Operating Humidity Dimensions 0 ~ 60° C (32 ~ 140° F) -40 ~ 85° C (-40 ~ 185° F) 5% ~ 95%, 40ºC, non-condensing 170 x 170 mm (6.7" x 6.7") TSM_MITX_20140703_R1-00 Page 4 of 26 2.2 Board Layout Figure 1 shows the location of the major components on the top-side of the MITX-6771. D A B C E DD CC F BB AA G Z H Y X I W V J U K Figure 1: MITX-6771 (Top) T L S R Q P O N Figure 1. Major Board Components (Top) TSM_MITX_20140703_R1-00 Page 5 of 26 M Table 2 lists the components identified in Figure 1 Table 2. Components Show in Figure 1 Item from Figure 1 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z AA BB CC DD Connector F_Audio SIM_Card JVGA Back Panel Connectors ATX1 SATA_PW1 SATA_PW2 M-SATA SATA2 CPU FAN SYS FAN CLR_CMOS LVDS LVDS-PWR_SEL BLT_PWR MON_SW BLT_PWR_SEL F_PANEL COM1, COM2 USB TPM_Hearder LPT USB KS/MS Mini-PCIE PCIE USB INT_SPK SPDIF Description Front panel audio header SIM Card socket VGA header Back Panel Connectors Internal power connector SATA power connector SATA power connector mSATA full or half-mini card slot SATA data connector 3-wire CPU fan header 3-wire system fan header Clear CMOS jumper LVDS connector Flat panel voltage selection jumper Flat panel backlight power header Momentary Switch header Flat panel backlight selection header Front panel header Serial port headers USB headers (on some configuration) Trusted Platform Module Header Parallel port header USB headers KS/MS PCI Express Full/Half-Mini card slot PCI Express 1.0a x1 connector USB 3.0 header Internal stereo speakers connector S/PDIF header Factory use TSM_MITX_20140703_R1-00 Page 6 of 26 2.3 Back Panel Connectors A B C D E Figure 2. Back Panel Connectors Table 3 lists the components identified in Figure 2 Table 3. Components Show in Figure 2 Item A B C D E F G H Description DC input jack USB2.0 ports LAN connector VGA connector USB2.0 ports HDMI connector Analog line-out Microphone in TSM_MITX_20140703_R1-00 Page 7 of 26 F G H 2.4 Dimension 170mm/ 6.7" 170mm/ 6.7" Figure 3. Board Dimension TSM_MITX_20140703_R1-00 Page 8 of 26 2.5 Block Diagram Figure 4 is a block diagram of the major functional areas of the board. Figure 4. Block Diagram TSM_MITX_20140703_R1-00 Page 9 of 26 3. Technical Reference 3.1 Connectors and Headers (TOP) Figure 5 shows the locations of the connectors and headers on the top-side of the board. Figure 5. Connectors and Headers (top) TSM_MITX_20140703_R1-00 Page 10 of 26 Table 4 - 29 lists the connectors and headers identified in Figure 5. Table 4. Front panel audio header (Figure. 5. A) Pin 1 Signal Name MIC_L Description Front Panel MIC in Left 2 3 4 5 6 7 8 9 10 GND MIC_R N/A FRONT_R F_IO_SENCE GND N/A FRONT_L F_IO_SENCE Ground Front Panel MIC in Right Front Panel Audio out Right Front Audio Jack detection Ground Front Panel Audio out Left Front Audio Jack detection Table 5. VGA header (Figure. 5. B) Pin 1 2 3 4 5 6 7 8 9 10 11 12 Signal Name DAC_5V 5V_VSYNC 5V_HSYNC GND VGA_R GND VGA_G GND VGA_B GND VGA_DDC_DATA VGA_DDC_CLK Table 6. Internal power connector (Figure. 5. C) Pin 1 2 Signal Name Power (12/19V DC) GND Table 7. SATA power connector 1 (Figure. 5. D) Pin 1 2 3 4 5 6 7 Signal Name VVC_3V VVC_3V VVC_3V GND GND GND VVC_5V TSM_MITX_20140703_R1-00 Page 11 of 26 8 9 10 11 12 13 14 15 VVC_5V VVC_5V GND GND GND VVC_12V VVC_12V VVC_12V Table 8. SATA power connector 2 (Figure. 5. E) Pin 1 2 3 4 Signal Name 5V GND GND 12V Table 10. SATA data connector (Figure. 5. G) Pin 1 2 3 4 5 6 7 8 9 Signal Name GND SATA_TXP SATA_TXN GND SATA_RXN SATA_RXP GND GND GND Table 11. 3-wire CPU fan header (Figure. 5. H) Pin 1 2 3 Signal Name GND 12V DC FAN_TAC Table 12. 3-wire system fan header (Figure. 5. I) Pin Signal Name 1 GND 2 +12V DC 3 FAN_TAC TSM_MITX_20140703_R1-00 Page 12 of 26 Table 13. Clear CMOS jumper (Figure. 5. J) Pin Description 1, 2 Open Normal 1, 2 Close Clear CMOS Table 14. LVDS connector (Figure. 5. K) Pin 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 Signal Name LVDS_PWR LVDS_PWR GND LVDS_TX_A0N LVDS_TX_A1N LVDS_TX_A2N GND LVDS_TX_CLKAN LVDS_TX_A3N LVDS_TX_B0N LVDS_TX_B1N LVDS_TX_B2N GND LVDS_TX_CLKBN LVDS_TX_B3N Pin 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 Table 15. Flat panel LVDS voltage power jumper (Figure. 5. L) Pin Description 1, 2 Close 12V 3. 4 Close 5V 4, 5 Close 3.3V Table 16. Flat panel backlight power header (Figure. 5. M) Pin 1 2 3 4 5 6 7 8 Signal Name LCD_BKLT_ON BKLT_PWM VIN_LVDS_F VIN_LVDS_F GND GND BLT_UP BLT_DOWN TSM_MITX_20140703_R1-00 Page 13 of 26 Signal Name LVDS_PWR GND GND LVDS_TX_A0P LVDS_TX_A1P LVDS_TX_A2P GND LVDS_TX_CLKAP LVDS_TX_A3P LVDS_TX_B0P LVDS_TX_B1P LVDS_TX_B2P GND LVDS_TX_CLKBP LVDS_TX_B3P Table 17. Panel Switch header (Figure. 5. N) Pin 1 2 Signal Name DISPLAY_ON/OFF GND Table 18. Flat panel backlight power selection header (Figure. 5. O) Pin Description 1, 2 Close 12V 2, 3 Close VDC Table 19. Front panel header (Figure. 5. P) Pin 1 2 3 4 5 6 7 8 9 10 Signal Name HD_LEDPWR_LEDHD-LED+ PWR_LED+ RESET Power Button GND GND NC Key Table 20. Serial port headers (Figure. 5. Q) Pin 1 2 3 4 5 6 7 8 9 10 Signal Name NDCD MSIN NSOUT NDTR GND NDSR NDSS NCTS NRI N/A Table 21. Parallel port header (Figure. 5. R) Pin 1 3 5 7 9 11 Signal Name P_STB P_D0 P_D1 P_D2 P_D3 P_D4 Pin 2 4 6 8 10 12 TSM_MITX_20140703_R1-00 Page 14 of 26 Signal Name P_AFD ERRJ P_INIT P_SLIN GND GND 13 15 17 19 21 23 25 P_D5 P_D6 P_D7 ACKJ BUSY PE SLCT 14 16 18 20 22 24 26 GND GND GND GND GND LPT_DET# NC Table 22. Front USB 2.0 headers (Figure. 5. S) Pin 1 2 3 4 5 6 7 8 9 10 Signal Name VCC VCC USBUSBUSB+ USB+ GND GND Key GND Table 23. KS/MS (Figure. 5. T) Pin 1 2 3 4 5 6 Signal Name PS2POWER KDAT KCLK MDAT MCLK GND Table 24. PCI Express Full/Half-Mini card slot (Figure. 5. F, U) Pin 1 2 3 4 5 6 7 8 9 10 11 12 M-PCIE WAKE# +3.3 V aux Reserved GND Reserved 1.5 V CLKREQ# Reserved GND Reserved REFCLKReserved M-SATA TSM_MITX_20140703_R1-00 Page 15 of 26 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 REFCLK+ Reserved GND Reserved Reserved GND Reserved Reserved GND PERST# PERn0 +3.3 V aux PERp0 GND GND +1.5 V GND SMB_CLK PETn0 SMB_DATA PETp0 GND GND USB_DGND USB_D+ +3.3 V aux GND +3.3 V aux LED_WWAN# Reserved LED_WLAN# Reserved LED_WPAN# Reserved +1.5V Reserved GND Reserved +3.3 V aux (mSATA) GND (mSATA) 3.3 V (mSATA) 3.3 V NC (mSATA indicator) (mSATA) Vendor (mSATA) Vendor (mSATA) DA/DSS (mSATA) Presence Detection Table 26. USB 3.0 header (Figure. 5. W) Pin 1 2 Signal Name USB_PWR NC TSM_MITX_20140703_R1-00 Page 16 of 26 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 NC GND NC NC GND NC NC NC DATA+ DATAGND USB3_TXP0_R USB3_TXN0_R GND USB3_TXP0_R USB3_TXN0_R USB-PWR NC Table 27. Internal stereo speakers connector (Figure. 5. X) Pin 1 2 3 4 Signal Name LOUTLOUT+ ROUT+ ROUT- Table 28. S/PDIF header (Figure. 5. Y) Pin 1 2 3 4 Signal Name 5V NC SPDIF_OUT_R GND TSM_MITX_20140703_R1-00 Page 17 of 26 4. BIOS Features 4.1 Introduction The board uses an AMI BIOS that is stored in the Serial Peripheral Interface Flash Memory (SPI Flash) and can be updated using a disk-based program. 4.2 BIOS Updates The BIOS can be updated using a flash utility which requires booting from DOS. . Using this utility, the BIOS can be updated from a file on a hard disk, a USB drive (a flash drive or a USB hard drive). Ask technical support for the utility and up-to-date BIOS file. Verify that the updated BIOS matches the target system to prevent accidentally installing an incompatible BIOS. 4.3 Boot Options In the BIOS Setup program, the user can choose to boot from a hard drive, optical drive, removable drive, or the network. The default setting is for the "UEFI: Built-in EFI Shell" when no other boot devices present Pressing the <F12> key during POST causes a boot device menu to be displayed. This menu displays the list of available boot devices. The network can be selected as a boot device. This selection allows booting from the onboard LAN or a network add-in card with a remote boot ROM installed. 4.4 BIOS Setup program The BIOS Setup program can be used to view and change the BIOS settings for the computer. The BIOS Setup program is accessed by pressing the <Del> key after the Power-On Self-Test (POST) memory test begins and before the operating system boot begins. The menu bar is shown below. Table 30. BIOS Setup Program Menu Bar Main Advanced Chipset Security Boot Save& Exit BIOS Info WakeUp Cfg North Bridge Password Description Boot Option Priorities Save Changes and Exit Memory Info Super IO Cfg South Bridge System Date System Time Super IO Hardware Monitor Administrator Password Discard Changes and Exit User Password Access Level Save Changes and Reset CPU Cfg TSM_MITX_20140703_R1-00 Page 18 of 26 PPM Cfg Discard Changes and Reset IDE Cfg Miscellaneous Cfg Save Options Boot Override Network Stack Cfg Launch EFI Shell from filesystem device CSM Cfg Realtek PCIe GBE Family Controller Reset System with TXE disable Mode Table 31. BIOS Setup Program Function Keys BIOS Setup Program Function Key <←> or <→> Description Selects a different menu screen (Moves the cursor left or right) <↑> or <↓> Selects an item (Moves the cursor up or down) <Tab> Selects a field (Not implemented) <Enter> Executes command or selects the submenu <F10> Save the current values and exits the BIOS Setup program <Esc> Exits the menu 4.4.1 BIOS Setting Note: Default field is in bold under field column. Table 32. BIOS Setting - Main Main Advanced Chipset Item Field System Date System Time MM/DD/YYYY HH:MM:SS Security Boot Save& Exit Description Table 33. BIOS Setting - Advanced - WakeUp Configuration Main Advanced Chipset Security Boot Save& Exit WakeUp Configuration Item Resume On RTC Alarm Resume on Lan Field Disabled Enabled Disabled Enabled Description Real Time Clock Wakeup Select Enabled for Wake_On_LAN support TSM_MITX_20140703_R1-00 Page 19 of 26 Table 33-1. Advanced - Super IO Configuration Main Advanced Chipset Security Boot Save& Exit Super IO Configuration Serial Port 1 Configuration Item Field Serial Port Disabled Enabled Description Select Enabled to enable the onboard serial port Auto IO=3F8h; IRQ=4; IO=3F8h; IRQ=3,4,5,6,7,9,10,11,12 Change Settings IO=2F8h; IRQ=3,4,5,6,7,9,10,11,12; IO=3E8h; IRQ=3,4,5,6,7,9,10,11,12; IO=2E8h; IRO=3,4,5,6,7,9,10,11,12; Serial Port 2 Configuration Item Field Serial Port Disabled Enabled This feature specifies the base I/O port address and the Interrupt Request address of Serial Port Description Select Enabled to enable the onboard serial port Auto IO=2F8h; IRQ=3; IO=3F8h; IRQ=3,4,5,6,7,9,10,11,12 Change Settings IO=2F8h; IRQ=3,4,5,6,7,9,10,11,12; IO=3E8h; IRQ=3,4,5,6,7,9,10,11,12; IO=2E8h; IRO=3,4,5,6,7,9,10,11,12; Parallel Port Configuration Item Field Parallel Port Disabled Enabled This feature specifies the base I/O port address and the Interrupt Request address of Serial Port Auto IO=378h; IRQ=5; DMA=3; IO=378h; IRQ=5,6,7,9,10,11,12;DMA=1,3; IO=278h; IRQ=5,6,7,9,10,11,12;DMA=1,3; IO=3BCh; IRQ=5,6,7,9,10,11,12;DMA=1,3; Standard Parallet Port Mode (SPP) EPP Mode ECP Mode EPP Mode & ECP Mode Change Settings Device Mode Description Select Enabled to enable the onboard Parallel port This feature specifies the base I/O port address and the Interrupt Request address of Parallel Port Select the feature of mode of the onboard Parallel Port Table 33-2. Advanced - Super IO Hardware Monitor Main Advanced Chipset Security Boot Save& Exit Super IO Hardware Monitor PC Hardware Monitor Status Item Field Description Smart Fan Mode Full on Mode Automatic Mode Manual Mode 1 PWM 2 PWM Select how the system controls the speeds of the onboard fans Select the fans to run at x PWM (Pulse Width Modulation) per PWM slope setting TSM_MITX_20140703_R1-00 Page 20 of 26 4 PWM 8 PWM Celsius degree Table 33-3. Advanced - CPU Configuration Main Advanced Chipset Security Boot Save& Exit CPU Configuration Socket O CPU Information CPU Thermal Configuration Item Field Active Processor Cores ALL 1 Limit CPUID Maximum Disabled Enabled Execute Disable Bit Disabled Enabled Hardware Prefetcher Disabled Enabled Adjacent Cache Line Prefetch Disabled Enabled Intel Virtualization Technology Disabled Enabled Power Technology Disable Energy Efficient TSM_MITX_20140703_R1-00 Page 21 of 26 Description This feature determines how many CPU cores will be activated for each CPU. When all is selected, all cores in the CPU will be activated Select Enabled to set the maximum CPU ID value and to boot a legacy OS that cannot support processors with extended CPUID functions. The options are Enabled and Disabled (for the Windows OS) Set to Enabled to enable the Execute Disable Bit to allow the processor to designate areas in the system memory where an application code can execute and where it cannot, thus preventing a worm or a virus from flooding illegal codes to overwhelm the processor or damage the system during an attack If set to Enabled, the hardware prefetcher will prefetch streams of data and instructions from the main memory to the L2 cache to improve CPU performance Select Enabled for the CPU to prefetch both cache lines for 128 bytes as comprised. Select Disabled for the CPU to prefetch both cache lines for 64 bytes Select Enabled to use the Intel Virtualization Technology to allow one platform to run multiple operating systems and applications in independent partitions, creating multiple "virtual" systems in one physical computer This feature allows the user to configure power management Custom settings Table 33-4. Advanced - PPM Configuration Main Advanced Chipset Security Boot Save& Exit PPM Configuration Item Field EIST Disabled Enabled CPU C State Report Enhanced C State Max CPU C-State Soix Description Select to Enable Intel EIST (Enhanced Intel SpeedStep Technology) Disabled Enabled Disabled Enabled C7 C6 C1 Disabled Enabled Select to Enable C State Report Select to Enable Enhanced C State Select C State Mode Select to Enable Soix active idle state Table 33-5. Advanced - IDE Configuration Main Advanced Chipset Security Boot Save& Exit IDE Configuration Item Serial-ATA SATA Test Mode SATA Speed Support SATA ODD Port SATA Mode Serial-ATA Port 0 SATA Port0 HotPlug Serial-ATA Port 1 SATA Port1 HotPlug Field Disabled Enabled Disabled Enabled Gen 1 Gen 2 Port0 ODD Port1 ODD No ODD Description Select the mode for the installed SATA drives Select to Enable test mode Select SATA speed Select SATA Optical Disc Drive for SATA port IDE Mode AHCI Mode Disabled Enabled Disabled Enabled Disabled Enabled Disabled Enabled Select the option of IDE Mode or AHCI Mode for installed SATA drive Select Enabled to enable a SATA port specified by the user Select to Enable SATA hot-plug Select Enabled to enable a SATA port specified by the user Select to Enable SATA hot-plug Table 33-6. Advanced - Miscellaneous Configuration TSM_MITX_20140703_R1-00 Page 22 of 26 Main Advanced Chipset Security Boot Save& Exit Miscellaneous Configuration Item Field Windows 8.X Android Windows 7 OS Selection Description Select OS to be installed Table 33-7. Advanced - Network Stack Configuration Main Advanced Chipset Security Boot Save& Exit Network Stack Configuration Item Field Network Stack Disabled Enabled Description Select Enabled to enable PXE (Preboot Execution Environment) or UEFI (Unified Extensible Firmware Interface) for network stack support Table 33-8. Advanced - CSM Configuration Main Advanced Chipset Security Boot Save& Exit CSM Configuration Item Field Disabled Enabled Do not launch UEFI only Legacy only Legacy first UEFI first Do not launch UEFI only Legacy only Legacy first UEFI first Do not launch UEFI only Legacy only Legacy first UEFI first UEFI first Legacy only CSM Support Network Storage Video Other PCI devices Description Select to Enable Compatibility Support Module (CSM) Network boot option filter Storage boot option filter Video boot option filter Other PCI devices boot option filter Table 34. BIOS Setting - Chipset Main Advanced Chipset Security North Bridge South Bridge USB Configuration TSM_MITX_20140703_R1-00 Page 23 of 26 Boot Save& Exit Item Field PCI mode Disabled On off Enabled Disabled Auto Smart Auto Enabled Disabled Enabled Disabled Enabled Disabled Enabled Disabled Enabled Disabled Enabled Disabled Enabled Disabled Description Select Enabled USB OTG Port support Select Enabled USB VBUS support Item Field Restore AC Power Loss Power off Power on Last State Description Select Power-Off for the system power to remain off after a power loss. Select PowerOn for the system power to be turned on after a power loss. Select Last State to allow the system to resume its last power state before a power loss. USB OTG Support USB VBUS XHCI Mode USB2 Link Power Management USB 2.0(EHCI) Support USB Per Port Control USB Port 0 USB Port 1 USB Port 2 USB Port 3 Select USB XHCI Mode support Select Enabled USB USB2 Link Power Management support Select Enabled USB 2.0 EHCI support Select Enabled USB per port control Select Enabled for USB Port 0 support Select Enabled for USB Port 1 support Select Enabled for USB Port 2 support Select Enabled for USB Port 3 support Restore AC Power Loss Table 35. BIOS Setting - Security Main Advanced Chipset Security Boot Save& Exit Chipset Security Boot Save& Exit Administrator Password User Password Table 36. BIOS Setting - Boot Main Advanced Boot Option Priorities Item Field Boot Option #1 UEFI: Built-in EFI Shell Description Prioritize the order of bootable devices that the system to boot from Table 37. BIOS Setting - Save & Exit Main Advanced Chipset Security TSM_MITX_20140703_R1-00 Page 24 of 26 Boot Save & Exit Item Field Save Changes and Exit Yes/ No Discard Changes and Exit Yes/ No Save changes and Reset Yes/ No Save Options Item Field Save Changes Yes/ No Discard changes Yes/ No Restore Defaults Yes/ No Save as User Defaults Yes/ No Restore User Defaults Yes/ No Description Select this option to leave the BIOS setup utility and reboot the computer for the new system configuration parameters can take effect Select this option to quit the BIOS Setup without making any permanent changes to the system configuration, and reboot the computer Select this option to leave the BIOS setup utility and reboot the computer for the new system configuration parameters can take effect Description Select this option to save all changes made. This will not reset (reboot) the system Select this option and press <Enter> to discard all the changes and return to the AMI BIOS Utility Program Select this option and press <Enter> to restore to factory setting defaults Select to enables the user to save any changes to the BIOS setup for future use Select to retrieve user-defined settings that were saved previously Boot Override UEFI: Built-in EFI Shell Yes/ No Launch EFI Shell from Filesystem device Yes/ No Reset System with TXE disable Mode Yes/ No Override the Boot Option Priorities sequence in the Boot menu and immediately boot the system with built-in EFI Shell Select to launch EFI Shell for your computer Select this item and press <Enter> to reset your system when your system is in TXE Disabled mode TSM_MITX_20140703_R1-00 Page 25 of 26