Download BIS M-62_ Processor Unit

BIS M-62_ MANUAL
9
When the slave sees Bit 2 In the OBCB & OBDCB set, it knows it needs to resynchronize its
handshaking bits in the IBCB & IBDCB.
So the Slave will acknowledge the resynchronization request by setting Bit 2, and will clear
Bit 1 and Bit 0 in the IBCB & IBDCB.
Note that whatever values Bit 1 or Bit 0 had, they will be set to 0. This process forces the
handshaking into a known state.
(See the Green changes below)
Output Buffer
Input Buffer
Byte #
Byte #
Value
00:
84
01:
02:
03:
04:
05:
06:
07:
08:
09:
10:
11:
12:
13:
14:
15:
16:
17:
18:
19:
20:
..
30:
31:
00
06
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
164
84
Output Buffer Control Byte
(OBCB)
7
6
5
4
3
2
1
0
[1] [0] [0] [0] [0] [1] [0] [0]
(Always 0)
(Packet length in bytes)
Data Consistency Byte (OBDCB)
Value
00
84
01:
02:
03:
04:
05:
06:
07:
08:
09:
10:
11:
12:
13:
14:
15:
16:
17:
18:
19:
20:
..
30:
31:
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
..
00
84
Input Buffer Control Byte
(IBCB)
7
6
5
4
3
2
1
0
[1] [0] [0] [0] [0] [1] [0] [0]
Data Consistency Byte (IBDCB)