Download Data Sheet - Analog Devices

ADV7181
FIELD 1
622
623
624
625
1
2
3
4
5
6
7
8
9
10
22
23
24
OUTPUT
VIDEO
H
V
PVBEG[4:0] = 0x5
PVEND[4:0] = 0x4
F
PFTOG[4:0] = 0x3
FIELD 2
310
311
312
313
314
315
316
317
318
319
320
321
322
335
336
337
OUTPUT
VIDEO
H
V
PVBEG[4:0] = 0x5
PVEND[4:0] = 0x4
04820-025
F
PFTOG[4:0] = 0x3
Figure 25. PAL Default (BT.656). The polarity of H, V, and F is embedded in the data.
FIELD 1
622
623
624
625
1
2
3
4
5
6
7
8
9
10
11
23
24
OUTPUT
VIDEO
HS
OUTPUT
VS
OUTPUT
PVBEG[4:0] = 0x1
FIELD
OUTPUT
PVEND[4:0] = 0x4
PFTOG[4:0] = 0x6
FIELD 2
310
311
312
313
314
315
316
317
318
319
320
321
322
323
336
337
OUTPUT
VIDEO
HS
OUTPUT
VS
OUTPUT
PVEND[4:0] = 0x4
PFTOG[4:0] = 0x6
Figure 26. PAL Typical VSync/Field Positions Using Register Writes in Table 121
Rev. B | Page 47 of 104
04820-026
PVBEG[4:0] = 0x1
FIELD
OUTPUT