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MEMORY MAP
S3C72K8/P72K8
BMOD — Basic Timer Mode Register
BT
Bit
3
2
1
0
Identifier
.3
.2
.1
.0
RESET Value
0
0
0
0
Read/Write
W
W
W
W
Bit Addressing
1/4
4
4
4
BMOD.3
Basic Timer Restart Bit
1
BMOD.2–.0
Restart basic timer, then clear IRQB flag, BCNT and BMOD.3 to logic zero
Input Clock Frequency and Signal Stabilization Interval Control Bits
0
0
0
Input clock frequency:
Interrupt interval time (wait time):
fxx/212 (1.02 kHz)
220/fxx (250 ms)
0
1
1
Input clock frequency:
Interrupt interval time (wait time):
fxx/29 (8.18 kHz)
217/fxx (31.3 ms)
1
0
1
Input clock frequency:
Interrupt interval time (wait time):
fxx/27 (32.7 kHz)
215/fxx (7.82 ms)
1
1
1
Input clock frequency:
Interrupt interval time (wait time):
fxx/25 (131 kHz)
213/fxx (1.95 ms)
NOTES:
1. When a RESET occurs, the oscillation stabilization time is 31.3 ms (217/fxx) at 4.19 MHz..
2. 'fxx' is the system clock rate given a clock frequency of 4.19 MHz.
4-8
F85H